X-Git-Url: https://git.proxmox.com/?p=mirror_edk2.git;a=blobdiff_plain;f=UefiCpuPkg%2FPiSmmCpuDxeSmm%2FIa32%2FSmmInit.nasm;h=f7bb9b9a82e52f216f8e1e21cdd5f991b449eba8;hp=a5c62e77ce5e0204989ad4e05f44f5dae282b07d;hb=6b0841c166f079c7f5c21196dd239e26172bfd97;hpb=e21e355e2ca7fefb15b4df7078f995d3fb9c2b89 diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm index a5c62e77ce..f7bb9b9a82 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmInit.nasm @@ -22,7 +22,7 @@ extern ASM_PFX(SmmInitHandler) extern ASM_PFX(mRebasedFlag) extern ASM_PFX(mSmmRelocationOriginalAddress) -global ASM_PFX(gSmmCr3) +global ASM_PFX(gPatchSmmCr3) global ASM_PFX(gSmmCr4) global ASM_PFX(gSmmCr0) global ASM_PFX(gSmmJmpAddr) @@ -41,23 +41,35 @@ ASM_PFX(gcSmiInitGdtr): DQ 0 global ASM_PFX(SmmStartup) + +BITS 16 ASM_PFX(SmmStartup): - DB 0x66, 0xb8 -ASM_PFX(gSmmCr3): DD 0 + mov eax, 0x80000001 ; read capability + cpuid + mov ebx, edx ; rdmsr will change edx. keep it in ebx. + and ebx, BIT20 ; extract NX capability bit + shr ebx, 9 ; shift bit to IA32_EFER.NXE[BIT11] position + mov eax, strict dword 0 ; source operand will be patched +ASM_PFX(gPatchSmmCr3): mov cr3, eax - DB 0x67, 0x66 - lgdt [cs:ebp + (ASM_PFX(gcSmiInitGdtr) - ASM_PFX(SmmStartup))] - DB 0x66, 0xb8 +o32 lgdt [cs:ebp + (ASM_PFX(gcSmiInitGdtr) - ASM_PFX(SmmStartup))] + DB 0x66, 0xb8 ; mov eax, imm32 ASM_PFX(gSmmCr4): DD 0 mov cr4, eax - DB 0x66, 0xb8 + mov ecx, 0xc0000080 ; IA32_EFER MSR + rdmsr + or eax, ebx ; set NXE bit if NX is available + wrmsr + DB 0x66, 0xb8 ; mov eax, imm32 ASM_PFX(gSmmCr0): DD 0 - DB 0xbf, PROTECT_MODE_DS, 0 ; mov di, PROTECT_MODE_DS + mov di, PROTECT_MODE_DS mov cr0, eax - DB 0x66, 0xea ; jmp far [ptr48] + DB 0x66, 0xea ; jmp far [ptr48] ASM_PFX(gSmmJmpAddr): DD @32bit DW PROTECT_MODE_CS + +BITS 32 @32bit: mov ds, edi mov es, edi