X-Git-Url: https://git.proxmox.com/?p=mirror_edk2.git;a=blobdiff_plain;f=Vlv2TbltDevicePkg%2FPlatformDxe%2FIchRegTable.c;fp=Vlv2TbltDevicePkg%2FPlatformDxe%2FIchRegTable.c;h=0000000000000000000000000000000000000000;hp=cac61bffd08593d13857ab2070e86fa8af993392;hb=5347c48016f27061475fdb053e867a06ce73492f;hpb=96ef5a8e30a8da33eaab09f13cc8d752342717a5 diff --git a/Vlv2TbltDevicePkg/PlatformDxe/IchRegTable.c b/Vlv2TbltDevicePkg/PlatformDxe/IchRegTable.c deleted file mode 100644 index cac61bffd0..0000000000 --- a/Vlv2TbltDevicePkg/PlatformDxe/IchRegTable.c +++ /dev/null @@ -1,134 +0,0 @@ -/** @file - - Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.
- - SPDX-License-Identifier: BSD-2-Clause-Patent - - - -Module Name: - - - IchRegTable.c - -Abstract: - - Register initialization table for Ich. - - - ---*/ - -#include -#include "PlatformDxe.h" -extern EFI_PLATFORM_INFO_HOB mPlatformInfo; - -#define R_EFI_PCI_SVID 0x2C - -EFI_REG_TABLE mSubsystemIdRegs [] = { - - // - // Program SVID and SID for PCI devices. - // Combine two 16 bit PCI_WRITE into one 32 bit PCI_WRITE in order to boost performance - // - PCI_WRITE ( - MC_BUS, MC_DEV, MC_FUN, R_EFI_PCI_SVID, EfiPciWidthUint32, - V_PCH_DEFAULT_SVID_SID, OPCODE_FLAG_S3SAVE - ), - - PCI_WRITE ( - IGD_BUS, IGD_DEV, IGD_FUN_0, R_EFI_PCI_SVID, EfiPciWidthUint32, - V_PCH_DEFAULT_SVID_SID, OPCODE_FLAG_S3SAVE - ), - - PCI_WRITE( - DEFAULT_PCI_BUS_NUMBER_PCH, 0, 0, R_EFI_PCI_SVID, EfiPciWidthUint32, - V_PCH_DEFAULT_SVID_SID, OPCODE_FLAG_S3SAVE - ), - PCI_WRITE ( - DEFAULT_PCI_BUS_NUMBER_PCH, PCI_DEVICE_NUMBER_PCH_LPC, PCI_FUNCTION_NUMBER_PCH_LPC, R_PCH_LPC_SS, EfiPciWidthUint32, - V_PCH_DEFAULT_SVID_SID, OPCODE_FLAG_S3SAVE - ), - PCI_WRITE ( - DEFAULT_PCI_BUS_NUMBER_PCH, PCI_DEVICE_NUMBER_PCH_SATA, PCI_FUNCTION_NUMBER_PCH_SATA, R_PCH_SATA_SS, EfiPciWidthUint32, - V_PCH_DEFAULT_SVID_SID, OPCODE_FLAG_S3SAVE - ), - PCI_WRITE ( - DEFAULT_PCI_BUS_NUMBER_PCH, PCI_DEVICE_NUMBER_PCH_SMBUS, PCI_FUNCTION_NUMBER_PCH_SMBUS, R_PCH_SMBUS_SVID, EfiPciWidthUint32, - V_PCH_DEFAULT_SVID_SID, OPCODE_FLAG_S3SAVE - ), - PCI_WRITE ( - DEFAULT_PCI_BUS_NUMBER_PCH, PCI_DEVICE_NUMBER_PCH_USB, PCI_FUNCTION_NUMBER_PCH_EHCI, R_PCH_EHCI_SVID, EfiPciWidthUint32, - V_PCH_DEFAULT_SVID_SID, OPCODE_FLAG_S3SAVE - ), - PCI_WRITE ( - DEFAULT_PCI_BUS_NUMBER_PCH, PCI_DEVICE_NUMBER_PCH_PCIE_ROOT_PORTS, PCI_FUNCTION_NUMBER_PCH_PCIE_ROOT_PORT_1, R_PCH_PCIE_SVID, EfiPciWidthUint32, - V_PCH_DEFAULT_SVID_SID, OPCODE_FLAG_S3SAVE - ), - PCI_WRITE ( - DEFAULT_PCI_BUS_NUMBER_PCH, PCI_DEVICE_NUMBER_PCH_PCIE_ROOT_PORTS, PCI_FUNCTION_NUMBER_PCH_PCIE_ROOT_PORT_2, R_PCH_PCIE_SVID, EfiPciWidthUint32, - V_PCH_DEFAULT_SVID_SID, OPCODE_FLAG_S3SAVE - ), - PCI_WRITE ( - DEFAULT_PCI_BUS_NUMBER_PCH, PCI_DEVICE_NUMBER_PCH_PCIE_ROOT_PORTS, PCI_FUNCTION_NUMBER_PCH_PCIE_ROOT_PORT_3, R_PCH_PCIE_SVID, EfiPciWidthUint32, - V_PCH_DEFAULT_SVID_SID, OPCODE_FLAG_S3SAVE - ), - PCI_WRITE ( - DEFAULT_PCI_BUS_NUMBER_PCH, PCI_DEVICE_NUMBER_PCH_PCIE_ROOT_PORTS, PCI_FUNCTION_NUMBER_PCH_PCIE_ROOT_PORT_4, R_PCH_PCIE_SVID, EfiPciWidthUint32, - V_PCH_DEFAULT_SVID_SID, OPCODE_FLAG_S3SAVE - ), - TERMINATE_TABLE -}; - -/** - Updates the mSubsystemIdRegs table, and processes it. This should program - the Subsystem Vendor and Device IDs. - - @retval Returns VOID - -**/ -VOID -InitializeSubsystemIds ( - ) -{ - - EFI_REG_TABLE *RegTablePtr; - UINT32 SubsystemVidDid; - - SubsystemVidDid = mPlatformInfo.SsidSvid; - - RegTablePtr = mSubsystemIdRegs; - - // - // While we are not at the end of the table - // - while (RegTablePtr->Generic.OpCode != OP_TERMINATE_TABLE) { - // - // If the data to write is the original SSID - // - if (RegTablePtr->PciWrite.Data == - ((V_PCH_DEFAULT_SID << 16) | - V_PCH_INTEL_VENDOR_ID) - ) { - - // - // Then overwrite it to use the alternate SSID - // - RegTablePtr->PciWrite.Data = SubsystemVidDid; - } - - // - // Go to next table entry - // - RegTablePtr++; - } - - RegTablePtr = mSubsystemIdRegs; - - - // - // Program the SSVID/SSDID - // - ProcessRegTablePci (mSubsystemIdRegs, mPciRootBridgeIo, NULL); - -}