]> git.proxmox.com Git - mirror_edk2.git/commit
UefiCpuPkg/CpuExceptionHandlerLib: Setup single step in #PF handler
authorJian J Wang <jian.j.wang@intel.com>
Thu, 9 Aug 2018 08:17:19 +0000 (16:17 +0800)
committerJian J Wang <jian.j.wang@intel.com>
Wed, 29 Aug 2018 23:22:29 +0000 (07:22 +0800)
commit16b918bbaf51211a32ae04d9d8a5ba6ccca25a6a
treee860f3d6a6c77f63b63b7ba6ce95a06e171da88b
parent8f2613628acf601a2a17bb64bb49ef73f85cfe2c
UefiCpuPkg/CpuExceptionHandlerLib: Setup single step in #PF handler

Once the #PF handler has set the page to be 'present', there should
be a way to reset it to 'not-present'. 'TF' bit in EFLAGS can be used
for this purpose. 'TF' bit will be set in interrupted function context
so that it can be triggered once the cpu control returns back to the
instruction causing #PF and re-execute it.

This is an necessary step to implement non-stop mode for Heap Guard
and NULL Pointer Detection feature.

Cc: Eric Dong <eric.dong@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Jian J Wang <jian.j.wang@intel.com>
Reviewed-by: Eric Dong <eric.dong@intel.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ExceptionHandlerAsm.nasm
UefiCpuPkg/Library/CpuExceptionHandlerLib/Ia32/ExceptionTssEntryAsm.nasm
UefiCpuPkg/Library/CpuExceptionHandlerLib/X64/ExceptionHandlerAsm.nasm