MdePkg/PciExpress21.h: Fix the PCI industry standard register defines

MdePkg/PciExpress21.h: Fix the PCI industry standard register defines

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2007
The following two PCI Capability Structure registers are updated as per
the PCI Base Specification Revision 4:-
(1) The PCI Device capability register 2(PCI_REG_PCIE_DEVICE_CAPABILITY2)
    needs to be upgraded for the PCI features like -
    LN system CLS (LnSystemCLS),
    10b Tag completer/requester register fields
    (TenBitTagCompleterSupported, TenBitTagRequesterSupported),
    Emergency power reduction support and initialization requirement
    (EmergencyPowerReductionSupported,
     EmergencyPowerReductionInitializationRequired),
    and FRS support (FrsSupported ).

(2) The PCI Device Control register 2(PCI_REG_PCIE_DEVICE_CONTROL2) needs
    to be upgraded for the -
    Emergency power reduction request enabling
    (EmergencyPowerReductionRequest), and also the 10b Extended Tag
    enabling (TenBitTagRequesterEnable).

The following two are defined as per the PCI Express Base Specification
Revision 2.1:-
(1) Defined macro definitions for all the ranges of Maximum Payload Sizes
    and Maximum Read Request Sizes register fields

(2) Defined macro definitions for all the ranges of Completion Timeout
    value.

Signed-off-by: Ashraf Javeed <ashraf.javeed@intel.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Reviewed-by: Hao A Wu <hao.a.wu@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>