]> git.proxmox.com Git - mirror_edk2.git/commitdiff
MdeModulePkg/CapsuleRuntimeDxe: Add RISCV64 architecture
authorAbner Chang <abner.chang@hpe.com>
Tue, 7 Apr 2020 07:48:39 +0000 (15:48 +0800)
committermergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
Thu, 7 May 2020 03:17:15 +0000 (03:17 +0000)
Add RISC-V in INF for building CapsuleRuntimeDxe RISCV64 image.

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2672

Signed-off-by: Abner Chang <abner.chang@hpe.com>
Co-authored-by: Gilbert Chen <gilbert.chen@hpe.com>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Acked-by: Hao A Wu <hao.a.wu@intel.com>
Cc: Hao A Wu <hao.a.wu@intel.com>
Cc: Liming Gao <liming.gao@intel.com>
Cc: Leif Lindholm <leif.lindholm@linaro.org>
Cc: Gilbert Chen <gilbert.chen@hpe.com>
MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf

index 942eda235cf0ab33e4b5821d4e502a535123dbb3..8bf5035a69278519927d975366506c6e614fd17d 100644 (file)
@@ -5,6 +5,7 @@
 #  the capsule runtime services are ready.\r
 #\r
 #  Copyright (c) 2006 - 2020, Intel Corporation. All rights reserved.<BR>\r
+#  Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>\r
 #  SPDX-License-Identifier: BSD-2-Clause-Patent\r
 #\r
 ##\r
 #\r
 # The following information is for reference only and not required by the build tools.\r
 #\r
-#  VALID_ARCHITECTURES           = IA32 X64 EBC ARM AARCH64\r
+#  VALID_ARCHITECTURES           = IA32 X64 EBC ARM AARCH64 RISCV64\r
 #\r
 \r
 [Sources]\r
   CapsuleService.c\r
   CapsuleService.h\r
 \r
-[Sources.Ia32, Sources.EBC, Sources.ARM, Sources.AARCH64]\r
+[Sources.Ia32, Sources.EBC, Sources.ARM, Sources.AARCH64, Sources.RISCV64]\r
   SaveLongModeContext.c\r
 \r
-[Sources.Ia32, Sources.X64, Sources.ARM, Sources.AARCH64]\r
+[Sources.Ia32, Sources.X64, Sources.ARM, Sources.AARCH64, Sources.RISCV64]\r
   CapsuleCache.c\r
 \r
-[Sources.Ia32, Sources.X64, Sources.EBC]\r
+[Sources.Ia32, Sources.X64, Sources.EBC, Sources.RISCV64]\r
   CapsuleReset.c\r
 \r
 [Sources.ARM, Sources.AARCH64]\r