ArmPkg/CpuDxe: Fixed confusion in AArch64 Table descriptor types

Table Descriptor and Level-3 Block entry descriptors have the same
translation table type value (ie: 0x3).

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.martin@arm.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14771 6f19259b-4bc3-4df7-8a09-765794883524

diff --git a/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c b/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c
index f6bb3fb2c1ad0b6965bc954727e34a5b0727ea46..95bf10bcb2b0502b8c83266d3a9fc64f1552dbad 100644 (file)
--- a/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c
+++ b/ArmPkg/Drivers/CpuDxe/AArch64/Mmu.c
@@ -265,7 +265,7 @@ GetMemoryRegionRec (
   BlockEntry = (UINT64*)TT_GET_ENTRY_FOR_ADDRESS (TranslationTable, TableLevel, *BaseAddress);\r
   EntryType = *BlockEntry & TT_TYPE_MASK;\r
 \r
-  if (EntryType == TT_TYPE_TABLE_ENTRY) {\r
+  if ((TableLevel < 3) && (EntryType == TT_TYPE_TABLE_ENTRY)) {\r
     NextTranslationTable = (UINT64*)(*BlockEntry & TT_ADDRESS_MASK_DESCRIPTION_TABLE);\r
 \r
     // The entry is a page table, so we go to the next level\r