IntelFsp2Pkg: Update Section Name in INF files

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>

diff --git a/IntelFsp2Pkg/FspNotifyPhase/FspNotifyPhasePeim.inf b/IntelFsp2Pkg/FspNotifyPhase/FspNotifyPhasePeim.inf
index 75f7ae5fb7a54d1e07d392bf2529ee7830cb9dc3..a0bc37580d3bb09bc651290531addf91d9cd4afe 100644 (file)
--- a/IntelFsp2Pkg/FspNotifyPhase/FspNotifyPhasePeim.inf
+++ b/IntelFsp2Pkg/FspNotifyPhase/FspNotifyPhasePeim.inf
@@ -1,8 +1,7 @@
 ## @file\r
 # Component information file for the FSP notify phase PEI module.\r
 #\r
-#@copyright\r
-#  Copyright (c) 2016 Intel Corporation. All rights reserved.\r
+#  Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.\r
 #  This program and the accompanying materials\r
 #  are licensed and made available under the terms and conditions of the BSD License\r
 #  which accompanies this distribution.  The full text of the license may be found at\r

diff --git a/IntelFsp2Pkg/Library/BaseCacheAsRamLibNull/BaseCacheAsRamLibNull.inf b/IntelFsp2Pkg/Library/BaseCacheAsRamLibNull/BaseCacheAsRamLibNull.inf
index bdb6744f37819093de0d1f5630e25e8126db899b..6a77ce7aa10d245b0204789b285d3cb3bdfbfc36 100644 (file)
--- a/IntelFsp2Pkg/Library/BaseCacheAsRamLibNull/BaseCacheAsRamLibNull.inf
+++ b/IntelFsp2Pkg/Library/BaseCacheAsRamLibNull/BaseCacheAsRamLibNull.inf
@@ -1,7 +1,7 @@
 ## @file\r
 #  NULL instance of Base cache as RAM.\r
 #\r
-#  Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>\r
+#  Copyright (c) 2014 - 2017, Intel Corporation. All rights reserved.<BR>\r
 #\r
 #  This program and the accompanying materials\r
 #  are licensed and made available under the terms and conditions of the BSD License\r
@@ -12,7 +12,7 @@
 #\r
 ##\r
 \r
-[defines]\r
+[Defines]\r
   INF_VERSION                    = 0x00010005\r
   BASE_NAME                      = BaseCacheAsRamLibNull\r
   FILE_GUID                      = 630AEB10-2106-4234-9DB3-836A3663F50D\r
@@ -20,7 +20,7 @@
   VERSION_STRING                 = 1.0\r
   LIBRARY_CLASS                  = CacheAsRamLib\r
 \r
-[sources.common]\r
+[Sources.common]\r
   DisableCacheAsRamNull.c\r
 \r
 [Packages]\r

diff --git a/IntelFsp2Pkg/Library/BaseCacheLib/BaseCacheLib.inf b/IntelFsp2Pkg/Library/BaseCacheLib/BaseCacheLib.inf
index 7b026b1dfcfec1c1e489e5bed740b54ef5788bc3..34df6add93dad10365909beeca18bec114db41eb 100644 (file)
--- a/IntelFsp2Pkg/Library/BaseCacheLib/BaseCacheLib.inf
+++ b/IntelFsp2Pkg/Library/BaseCacheLib/BaseCacheLib.inf
@@ -1,7 +1,7 @@
 ## @file\r
 #  Instance of BaseCache.\r
 #\r
-#  Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>\r
+#  Copyright (c) 2014 - 2017, Intel Corporation. All rights reserved.<BR>\r
 #\r
 #  This program and the accompanying materials\r
 #  are licensed and made available under the terms and conditions of the BSD License\r
@@ -12,7 +12,7 @@
 #\r
 ##\r
 \r
-[defines]\r
+[Defines]\r
   INF_VERSION                    = 0x00010005\r
   BASE_NAME                      = BaseCacheLib\r
   FILE_GUID                      = 8EF3A653-DA8B-4FFA-BB85-FF47406DB9F0\r
@@ -20,7 +20,7 @@
   VERSION_STRING                 = 1.0\r
   LIBRARY_CLASS                  = CacheLib\r
 \r
-[sources.IA32]\r
+[Sources.IA32]\r
   CacheLib.c\r
   CacheLibInternal.h\r
 \r