Added FIQ interrupt primatives. Update exception handler to disable/reenable FIQ...

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10197 6f19259b-4bc3-4df7-8a09-765794883524

diff --git a/ArmPkg/Drivers/CpuDxe/Exception.c b/ArmPkg/Drivers/CpuDxe/Exception.c
index d99d3d1d01d16fd12338cc8d3e2e8c75c16b9ea4..f795c431a2dd8109edeabcb4a86e82f96f26080a 100644 (file)
--- a/ArmPkg/Drivers/CpuDxe/Exception.c
+++ b/ArmPkg/Drivers/CpuDxe/Exception.c
@@ -178,17 +178,24 @@ InitializeExceptions (
   UINTN                Offset;\r
   UINTN                Length;\r
   UINTN                Index;\r
   UINTN                Offset;\r
   UINTN                Length;\r
   UINTN                Index;\r

-  BOOLEAN              Enabled;\r
+  BOOLEAN              IrqEnabled;\r
+  BOOLEAN              FiqEnabled;\r

   EFI_PHYSICAL_ADDRESS Base;\r
   UINT32               *VectorBase;\r
 \r
   //\r
   // Disable interrupts\r
   //\r
   EFI_PHYSICAL_ADDRESS Base;\r
   UINT32               *VectorBase;\r
 \r
   //\r
   // Disable interrupts\r
   //\r

-  Cpu->GetInterruptState (Cpu, &Enabled);\r
+  Cpu->GetInterruptState (Cpu, &IrqEnabled);\r

   Cpu->DisableInterrupt (Cpu);\r
 \r
   Cpu->DisableInterrupt (Cpu);\r
 \r

-  \r
+  //\r
+  // EFI does not use the FIQ, but a debugger might so we must disable \r
+  // as we take over the exception vectors. \r
+  //\r
+  FiqEnabled = ArmGetFiqState ();\r
+  ArmDisableFiq ();\r
+\r

   //\r
   // Copy an implementation of the ARM exception vectors to PcdCpuVectorBaseAddress.\r
   //\r
   //\r
   // Copy an implementation of the ARM exception vectors to PcdCpuVectorBaseAddress.\r
   //\r


@@ -236,7 +243,11 @@ InitializeExceptions (
   // Flush Caches since we updated executable stuff\r
   InvalidateInstructionCacheRange ((VOID *)PcdGet32(PcdCpuVectorBaseAddress), Length);\r
 \r
   // Flush Caches since we updated executable stuff\r
   InvalidateInstructionCacheRange ((VOID *)PcdGet32(PcdCpuVectorBaseAddress), Length);\r
 \r

-  if (Enabled) {\r
+  if (FiqEnabled) {\r
+    ArmEnableFiq ();\r
+  }\r
+\r
+  if (IrqEnabled) {\r

     // \r
     // Restore interrupt state\r
     //\r
     // \r
     // Restore interrupt state\r
     //\r

diff --git a/ArmPkg/Include/Library/ArmLib.h b/ArmPkg/Include/Library/ArmLib.h
index d0928e7f554ebc4d3aa7c8a540e55af8a41b4587..e762489e2f517925ac59deee214efbe84c30e52c 100644 (file)
--- a/ArmPkg/Include/Library/ArmLib.h
+++ b/ArmPkg/Include/Library/ArmLib.h
@@ -241,6 +241,23 @@ EFIAPI
 ArmGetInterruptState (
   VOID
   );
 ArmGetInterruptState (
   VOID
   );

+VOID
+EFIAPI
+ArmEnableFiq (
+  VOID
+  );
+
+UINTN
+EFIAPI
+ArmDisableFiq (
+  VOID
+  );
+  
+BOOLEAN
+EFIAPI
+ArmGetFiqState (
+  VOID
+  );

 
 VOID
 EFIAPI
 
 VOID
 EFIAPI

diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmLibSupport.S b/ArmPkg/Library/ArmLib/ArmV7/ArmLibSupport.S
index fac928af362d3de3b725aee73a354e03b949309d..cdfd3dc9cf4cd3bd92d13970fea8b093a6a067a5 100644 (file)
--- a/ArmPkg/Library/ArmLib/ArmV7/ArmLibSupport.S
+++ b/ArmPkg/Library/ArmLib/ArmV7/ArmLibSupport.S
@@ -19,6 +19,9 @@
 .globl ASM_PFX(ArmEnableInterrupts)
 .globl ASM_PFX(ArmDisableInterrupts)
 .globl ASM_PFX(ArmGetInterruptState)
 .globl ASM_PFX(ArmEnableInterrupts)
 .globl ASM_PFX(ArmDisableInterrupts)
 .globl ASM_PFX(ArmGetInterruptState)

+.globl ASM_PFX(ArmEnableFiq)
+.globl ASM_PFX(ArmDisableFiq)
+.globl ASM_PFX(ArmGetFiqState)

 .globl ASM_PFX(ArmInvalidateTlb)
 .globl ASM_PFX(ArmSetTranslationTableBaseAddress)
 .globl ASM_PFX(ArmGetTranslationTableBaseAddress)
 .globl ASM_PFX(ArmInvalidateTlb)
 .globl ASM_PFX(ArmSetTranslationTableBaseAddress)
 .globl ASM_PFX(ArmGetTranslationTableBaseAddress)


@@ -54,6 +57,21 @@ ASM_PFX(ArmGetInterruptState):
        movne   R0,#0
        bx      LR
 
        movne   R0,#0
        bx      LR
 

+ASM_PFX(ArmEnableFiq):
+  cpsie   f
+       bx      LR
+
+ASM_PFX(ArmDisableFiq):
+  cpsid   f
+       bx      LR
+
+ASM_PFX(ArmGetFiqState):
+       mrs     R0,CPSR
+       tst     R0,#0x30            @Check if IRQ is enabled.
+       moveq   R0,#1
+       movne   R0,#0
+       bx      LR
+

 ASM_PFX(ArmInvalidateTlb):
   mov     r0,#0
   mcr     p15,0,r0,c8,c7,0
 ASM_PFX(ArmInvalidateTlb):
   mov     r0,#0
   mcr     p15,0,r0,c8,c7,0

diff --git a/ArmPkg/Library/ArmLib/ArmV7/ArmLibSupport.asm b/ArmPkg/Library/ArmLib/ArmV7/ArmLibSupport.asm
index 765db9063c0d78daaf49cd7c30cc50055f25527f..65b3683f2670a916ddb8fe40253ec37593eec1b6 100644 (file)
--- a/ArmPkg/Library/ArmLib/ArmV7/ArmLibSupport.asm
+++ b/ArmPkg/Library/ArmLib/ArmV7/ArmLibSupport.asm
@@ -18,6 +18,9 @@
     EXPORT  ArmEnableInterrupts
     EXPORT  ArmDisableInterrupts
     EXPORT  ArmGetInterruptState
     EXPORT  ArmEnableInterrupts
     EXPORT  ArmDisableInterrupts
     EXPORT  ArmGetInterruptState

+    EXPORT  ArmEnableFiq
+    EXPORT  ArmDisableFiq
+    EXPORT  ArmGetFiqState

     EXPORT  ArmInvalidateTlb
     EXPORT  ArmSetTranslationTableBaseAddress
     EXPORT  ArmGetTranslationTableBaseAddress
     EXPORT  ArmInvalidateTlb
     EXPORT  ArmSetTranslationTableBaseAddress
     EXPORT  ArmGetTranslationTableBaseAddress


@@ -51,6 +54,21 @@ ArmGetInterruptState
        moveq   R0,#1
        movne   R0,#0
        bx      LR
        moveq   R0,#1
        movne   R0,#0
        bx      LR

+       
+ArmEnableFiq
+  CPSIE   f
+       bx      LR
+
+ArmDisableFiq
+  CPSID   f
+       bx      LR
+
+ArmGetFiqState
+       mrs     R0,CPSR
+       tst     R0,#0x40            ;Check if IRQ is enabled.
+       moveq   R0,#1
+       movne   R0,#0
+       bx      LR

   
 ArmInvalidateTlb
   mov     r0,#0
   
 ArmInvalidateTlb
   mov     r0,#0

diff --git a/ArmPkg/Library/ArmLib/Common/ArmLibSupport.S b/ArmPkg/Library/ArmLib/Common/ArmLibSupport.S
index 57d27345285083beaaa6dac9c58086e35b9facb7..c644d3446e9a9fa374d57df2ea3dbf76ad2e6415 100644 (file)
--- a/ArmPkg/Library/ArmLib/Common/ArmLibSupport.S
+++ b/ArmPkg/Library/ArmLib/Common/ArmLibSupport.S
@@ -19,6 +19,9 @@
 .globl ASM_PFX(ArmEnableInterrupts)
 .globl ASM_PFX(ArmDisableInterrupts)
 .globl ASM_PFX(ArmGetInterruptState)
 .globl ASM_PFX(ArmEnableInterrupts)
 .globl ASM_PFX(ArmDisableInterrupts)
 .globl ASM_PFX(ArmGetInterruptState)

+.globl ASM_PFX(ArmEnableFiq)
+.globl ASM_PFX(ArmDisableFiq)
+.globl ASM_PFX(ArmGetFiqState)

 .globl ASM_PFX(ArmInvalidateTlb)
 .globl ASM_PFX(ArmSetTranslationTableBaseAddress)
 .globl ASM_PFX(ArmGetTranslationTableBaseAddress)
 .globl ASM_PFX(ArmInvalidateTlb)
 .globl ASM_PFX(ArmSetTranslationTableBaseAddress)
 .globl ASM_PFX(ArmGetTranslationTableBaseAddress)


@@ -58,6 +61,28 @@ ASM_PFX(ArmGetInterruptState):
        movne   R0,#0
        bx      LR
 
        movne   R0,#0
        bx      LR
 

+ASM_PFX(ArmEnableFiq):
+       mrs     R0,CPSR
+       bic     R0,R0,#0x40             @Enable FIQ interrupts
+       msr     CPSR_c,R0
+       bx      LR
+
+ASM_PFX(ArmDisableFiq):
+       mrs     R0,CPSR
+       orr     R1,R0,#0x40             @Disable FIQ interrupts
+       msr     CPSR_c,R1
+  tst     R0,#0x80
+  moveq   R0,#1
+  movne   R0,#0
+       bx      LR
+
+ASM_PFX(ArmGetFiqState):
+       mrs     R0,CPSR
+       tst     R0,#0x80            @Check if FIQ is enabled.
+       moveq   R0,#1
+       movne   R0,#0
+       bx      LR
+

 ASM_PFX(ArmInvalidateTlb):
   mov     r0,#0
   mcr     p15,0,r0,c8,c7,0
 ASM_PFX(ArmInvalidateTlb):
   mov     r0,#0
   mcr     p15,0,r0,c8,c7,0

diff --git a/ArmPkg/Library/ArmLib/Common/ArmLibSupport.asm b/ArmPkg/Library/ArmLib/Common/ArmLibSupport.asm
index 630c72fdeeb7de56782963d05301b07532951111..ca8d980b0d71520dfdb8e3404a50eacbbfdcfbbd 100644 (file)
--- a/ArmPkg/Library/ArmLib/Common/ArmLibSupport.asm
+++ b/ArmPkg/Library/ArmLib/Common/ArmLibSupport.asm
@@ -18,6 +18,9 @@
     EXPORT  ArmEnableInterrupts
     EXPORT  ArmDisableInterrupts
     EXPORT  ArmGetInterruptState
     EXPORT  ArmEnableInterrupts
     EXPORT  ArmDisableInterrupts
     EXPORT  ArmGetInterruptState

+    EXPORT  ArmEnableFiq
+    EXPORT  ArmDisableFiq
+    EXPORT  ArmGetFiqState

     EXPORT  ArmInvalidateTlb
     EXPORT  ArmSetTranslationTableBaseAddress
     EXPORT  ArmGetTranslationTableBaseAddress
     EXPORT  ArmInvalidateTlb
     EXPORT  ArmSetTranslationTableBaseAddress
     EXPORT  ArmGetTranslationTableBaseAddress


@@ -56,6 +59,28 @@ ArmGetInterruptState
        moveq   R0,#1
        movne   R0,#0
        bx      LR
        moveq   R0,#1
        movne   R0,#0
        bx      LR

+
+ArmEnableFiq
+       mrs     R0,CPSR
+       bic     R0,R0,#0x40             ;Enable IRQ interrupts
+       msr     CPSR_c,R0
+       bx      LR
+
+ArmDisableFiq
+       mrs     R0,CPSR
+       orr     R1,R0,#0x40             ;Disable IRQ interrupts
+       msr     CPSR_c,R1
+  tst     R0,#0x40
+  moveq   R0,#1
+  movne   R0,#0
+       bx      LR
+
+ArmGetFiqState
+       mrs     R0,CPSR
+       tst     R0,#0x40            ;Check if IRQ is enabled.
+       moveq   R0,#1
+       movne   R0,#0
+       bx      LR

   
 ArmInvalidateTlb
   mov     r0,#0
   
 ArmInvalidateTlb
   mov     r0,#0