Fix various typos in CorebootModulePkg.
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Coeur <coeur@gmx.fr>
Reviewed-by: Benjamin You <benjamin.you@intel.com>
@param Tag The tag id to be found\r
\r
@retval NULL The Tag is not found.\r
- @retval Others The poiter to the record found.\r
+ @retval Others The pointer to the record found.\r
\r
**/\r
VOID *\r
IN CB_MEM_INFO_CALLBACK MemInfoCallback,\r
IN VOID *pParam\r
);\r
-
+\r
/**\r
Acquire the coreboot memory table with the given table id\r
\r
RETURN_STATUS\r
EFIAPI\r
CbParseCbMemTable (\r
- IN UINT32 TableId,
+ IN UINT32 TableId,\r
IN VOID** pMemTable,\r
IN UINT32* pMemTableSize\r
);\r
-
+\r
/**\r
Acquire the acpi table from coreboot\r
\r
IN VOID** pMemTable,\r
IN UINT32* pMemTableSize\r
);\r
-
+\r
/**\r
Acquire the smbios table from coreboot\r
\r
IN VOID** pMemTable,\r
IN UINT32* pMemTableSize\r
);\r
-
+\r
/**\r
Find the required fadt information\r
\r
@param pPmCtrlReg Pointer to the address of power management control register\r
@param pPmTimerReg Pointer to the address of power management timer register\r
@param pResetReg Pointer to the address of system reset register\r
- @param pResetValue Pointer to the value to be writen to the system reset register\r
+ @param pResetValue Pointer to the value to be written to the system reset register\r
@param pPmEvtReg Pointer to the address of power management event register\r
@param pPmGpeEnReg Pointer to the address of power management GPE enable register\r
\r
IN UINTN* pPmEvtReg,\r
IN UINTN* pPmGpeEnReg\r
);\r
-
+\r
/**\r
Find the serial port information\r
\r
@param pRegBase Pointer to the base address of serial port registers\r
@param pRegAccessType Pointer to the access type of serial port registers\r
- @param pRegWidth Pointer to the register width in bytes
+ @param pRegWidth Pointer to the register width in bytes\r
@param pBaudrate Pointer to the serial port baudrate\r
- @param pInputHertz Pointer to the input clock frequency
- @param pUartPciAddr Pointer to the UART PCI bus, dev and func address
+ @param pInputHertz Pointer to the input clock frequency\r
+ @param pUartPciAddr Pointer to the UART PCI bus, dev and func address\r
\r
@retval RETURN_SUCCESS Successfully find the serial port information.\r
@retval RETURN_NOT_FOUND Failed to find the serial port information .\r
RETURN_STATUS\r
EFIAPI\r
CbParseSerialInfo (\r
- OUT UINT32 *pRegBase,
- OUT UINT32 *pRegAccessType,
- OUT UINT32 *pRegWidth,
- OUT UINT32 *pBaudrate,
- OUT UINT32 *pInputHertz,
- OUT UINT32 *pUartPciAddr
+ OUT UINT32 *pRegBase,\r
+ OUT UINT32 *pRegAccessType,\r
+ OUT UINT32 *pRegWidth,\r
+ OUT UINT32 *pBaudrate,\r
+ OUT UINT32 *pInputHertz,\r
+ OUT UINT32 *pUartPciAddr\r
);\r
\r
/**\r
IN UINTN Level,\r
IN VOID** HeaderPtr\r
);\r
-
+\r
/**\r
Find the video frame buffer information\r
\r
#include <Library/BaseLib.h>
//
-// PCI Defintions.
+// PCI Definitions.\r
//
#define PCI_BRIDGE_32_BIT_IO_SPACE 0x01
// 0 0 No cable connected. Transmit
// 0 1 No cable connected. Transmit
// 1 0 Cable connected, but not clear to send. Wait
- // 1 1 Cable connected, and clar to send. Transmit
+ // 1 1 Cable connected, and clear to send. Transmit\r
//
return (BOOLEAN) ((SerialPortReadRegister (SerialRegisterBase, R_UART_MSR) & (B_UART_MSR_DSR | B_UART_MSR_CTS)) != (B_UART_MSR_DSR));
}
/**
Polls a serial device to see if there is any data waiting to be read.
- Polls aserial device to see if there is any data waiting to be read.
+ Polls a serial device to see if there is any data waiting to be read.\r
If there is data waiting to be read from the serial device, then TRUE is returned.
If there is no data waiting to be read from the serial device, then FALSE is returned.
}
/**
- Sets the baud rate, receive FIFO depth, transmit/receice time out, parity,
+ Sets the baud rate, receive FIFO depth, transmit/receive time out, parity,\r
data bits, and stop bits on a serial device.
@param BaudRate The requested baud rate. A BaudRate value of 0 will use the
device's default interface speed.
On output, the value actually set.
- @param ReveiveFifoDepth The requested depth of the FIFO on the receive side of the
+ @param ReceiveFifoDepth The requested depth of the FIFO on the receive side of the\r
serial interface. A ReceiveFifoDepth value of 0 will use
the device's default FIFO depth.
On output, the value actually set.
DefaultParity will use the device's default parity value.
On output, the value actually set.
@param DataBits The number of data bits to use on the serial device. A DataBits
- vaule of 0 will use the device's default data bit setting.
+ value of 0 will use the device's default data bit setting.\r
On output, the value actually set.
@param StopBits The number of stop bits to use on this serial device. A StopBits
value of DefaultStopBits will use the device's default number of
\r
@param val The pointer to packed data.\r
\r
- @return the UNIT64 value after convertion.\r
+ @return the UNIT64 value after conversion.\r
\r
**/\r
UINT64\r
@param Tag The tag id to be found\r
\r
@retval NULL The Tag is not found.\r
- @retval Others The poiter to the record found.\r
+ @retval Others The pointer to the record found.\r
\r
**/\r
VOID *\r
@param pPmCtrlReg Pointer to the address of power management control register\r
@param pPmTimerReg Pointer to the address of power management timer register\r
@param pResetReg Pointer to the address of system reset register\r
- @param pResetValue Pointer to the value to be writen to the system reset register\r
+ @param pResetValue Pointer to the value to be written to the system reset register\r
@param pPmEvtReg Pointer to the address of power management event register\r
@param pPmGpeEnReg Pointer to the address of power management GPE enable register\r
\r
UINT8 DeviceCount;
//
- // The highest disqulified mode for each attached device,
+ // The highest disqualified mode for each attached device,\r
// From ATA/ATAPI spec, if a mode is not supported,
// the modes higher than it is also not supported
//
/**\r
Find and return Pei Core entry point.\r
\r
- It also find SEC and PEI Core file debug inforamtion. It will report them if\r
+ It also find SEC and PEI Core file debug information. It will report them if\r
remote debug is enabled.\r
\r
@param BootFirmwareVolumePtr Point to the boot firmware volume.\r
#
# Abstract:
#
-# Switch the stack from temporary memory to permenent memory.
+# Switch the stack from temporary memory to permanent memory.\r
#
#------------------------------------------------------------------------------
#
# !!CAUTION!! this function address's is pushed into stack after
- # migration of whole temporary memory, so need save it to permenent
+ # migration of whole temporary memory, so need save it to permanent\r
# memory at first!
#
movl 20(%esp), %ebx # Save the first parameter
movl 24(%esp), %ecx # Save the second parameter
#
- # Save this function's return address into permenent memory at first.
- # Then, Fixup the esp point to permenent memory
+ # Save this function's return address into permanent memory at first.\r
+ # Then, Fixup the esp point to permanent memory\r
#
movl %esp, %eax
subl %ebx, %eax
addl %ecx, %eax
- movl 0(%esp), %edx # copy pushed register's value to permenent memory
+ movl 0(%esp), %edx # copy pushed register's value to permanent memory\r
movl %edx, 0(%eax)
movl 4(%esp), %edx
movl %edx, 4(%eax)
movl %edx, 8(%eax)
movl 12(%esp), %edx
movl %edx, 12(%eax)
- movl 16(%esp), %edx # Update this function's return address into permenent memory
+ movl 16(%esp), %edx # Update this function's return address into permanent memory\r
movl %edx, 16(%eax)
- movl %eax, %esp # From now, esp is pointed to permenent memory
+ movl %eax, %esp # From now, esp is pointed to permanent memory\r
#
- # Fixup the ebp point to permenent memory
+ # Fixup the ebp point to permanent memory\r
#
movl %ebp, %eax
subl %ebx, %eax
addl %ecx, %eax
- movl %eax, %ebp # From now, ebp is pointed to permenent memory
+ movl %eax, %ebp # From now, ebp is pointed to permanent memory\r
popl %edx
popl %ecx
;\r
; Abstract:\r
;\r
-; Switch the stack from temporary memory to permenent memory.\r
+; Switch the stack from temporary memory to permanent memory.\r
;\r
;------------------------------------------------------------------------------\r
\r
\r
;\r
; !!CAUTION!! this function address's is pushed into stack after\r
- ; migration of whole temporary memory, so need save it to permenent\r
+ ; migration of whole temporary memory, so need save it to permanent\r
; memory at first!\r
;\r
\r
mov ecx, [esp + 24] ; Save the second parameter\r
\r
;\r
- ; Save this function's return address into permenent memory at first.\r
- ; Then, Fixup the esp point to permenent memory\r
+ ; Save this function's return address into permanent memory at first.\r
+ ; Then, Fixup the esp point to permanent memory\r
;\r
mov eax, esp\r
sub eax, ebx\r
add eax, ecx\r
- mov edx, dword ptr [esp] ; copy pushed register's value to permenent memory\r
+ mov edx, dword ptr [esp] ; copy pushed register's value to permanent memory\r
mov dword ptr [eax], edx \r
mov edx, dword ptr [esp + 4]\r
mov dword ptr [eax + 4], edx \r
mov dword ptr [eax + 8], edx \r
mov edx, dword ptr [esp + 12]\r
mov dword ptr [eax + 12], edx \r
- mov edx, dword ptr [esp + 16] ; Update this function's return address into permenent memory\r
+ mov edx, dword ptr [esp + 16] ; Update this function's return address into permanent memory\r
mov dword ptr [eax + 16], edx \r
- mov esp, eax ; From now, esp is pointed to permenent memory\r
+ mov esp, eax ; From now, esp is pointed to permanent memory\r
\r
;\r
- ; Fixup the ebp point to permenent memory\r
+ ; Fixup the ebp point to permanent memory\r
;\r
mov eax, ebp\r
sub eax, ebx\r
add eax, ecx\r
- mov ebp, eax ; From now, ebp is pointed to permenent memory\r
+ mov ebp, eax ; From now, ebp is pointed to permanent memory\r
\r
pop edx\r
pop ecx\r
mov esp, eax ; From now, esp is pointed to permanent memory\r
\r
;\r
- ; Fixup the ebp point to permenent memory\r
+ ; Fixup the ebp point to permanent memory\r
;\r
mov eax, ebp\r
sub eax, ebx\r
/** @file\r
- C funtions in SEC\r
+ C functions in SEC\r
\r
Copyright (c) 2013, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
\r
\r
@param SizeOfRam Size of the temporary memory available for use.\r
- @param TempRamBase Base address of tempory ram\r
+ @param TempRamBase Base address of temporary ram\r
@param BootFirmwareVolume Base address of the Boot Firmware Volume.\r
**/\r
VOID\r
// |-------------------|---->\r
// | |\r
// | |\r
- // | Heap | PeiTemporayRamSize\r
+ // | Heap | PeiTemporaryRamSize\r
// | |\r
// | |\r
// |-------------------|----> TempRamBase\r
// |-------------------|---->\r
// | Stack | PeiStackSize\r
// |-------------------|---->\r
- // | Heap | PeiTemporayRamSize\r
+ // | Heap | PeiTemporaryRamSize\r
// |-------------------|----> TempRamBase\r
//\r
// |-------------------|---->\r
- // | Heap | PeiTemporayRamSize\r
+ // | Heap | PeiTemporaryRamSize\r
// |-------------------|---->\r
// | Stack | PeiStackSize\r
// |-------------------|----> PermanentMemoryBase\r
\r
//\r
// SecSwitchStack function must be invoked after the memory migration\r
- // immediatly, also we need fixup the stack change caused by new call into\r
- // permenent memory.\r
+ // immediately, also we need fixup the stack change caused by new call into\r
+ // permanent memory.\r
//\r
SecSwitchStack (\r
(UINT32) (UINTN) OldStack,\r
the control is transferred to this function.\r
\r
@param SizeOfRam Size of the temporary memory available for use.\r
- @param TempRamBase Base address of tempory ram\r
+ @param TempRamBase Base address of temporary ram\r
@param BootFirmwareVolume Base address of the Boot Firmware Volume.\r
**/\r
VOID\r
/**\r
Find and return Pei Core entry point.\r
\r
- It also find SEC and PEI Core file debug inforamtion. It will report them if\r
+ It also find SEC and PEI Core file debug information. It will report them if\r
remote debug is enabled.\r
\r
@param BootFirmwareVolumePtr Point to the boot firmware volume.\r
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