a)Save and disable CPU interrupt before calling AsmWriteIdtr().

b)Restore CPU interrupt status after callng AsmWriteIdtr().

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9965 6f19259b-4bc3-4df7-8a09-765794883524

diff --git a/MdeModulePkg/Core/DxeIplPeim/Ia32/DxeLoadFunc.c b/MdeModulePkg/Core/DxeIplPeim/Ia32/DxeLoadFunc.c
index 83ffc91ba0362bc90dc5c0527c5cb6aae53b3580..81e5ca4c07e191356dd8b364b596049c0e8907d0 100644 (file)
--- a/MdeModulePkg/Core/DxeIplPeim/Ia32/DxeLoadFunc.c
+++ b/MdeModulePkg/Core/DxeIplPeim/Ia32/DxeLoadFunc.c
@@ -1,7 +1,7 @@
 /** @file\r
   Ia32-specific functionality for DxeLoad.\r
 \r
-Copyright (c) 2006 - 2008, Intel Corporation. <BR>\r
+Copyright (c) 2006 - 2010, Intel Corporation. <BR>\r
 All rights reserved. This program and the accompanying materials\r
 are licensed and made available under the terms and conditions of the BSD License\r
 which accompanies this distribution.  The full text of the license may be found at\r
@@ -19,8 +19,8 @@ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
 // Global Descriptor Table (GDT)\r
 //\r
 GLOBAL_REMOVE_IF_UNREFERENCED IA32_GDT gGdtEntries[] = {\r
-/* selector { Global Segment Descriptor                              } */  \r
-/* 0x00 */  {{0,      0,  0,  0,    0,  0,  0,  0,    0,  0, 0,  0,  0}}, //null descriptor \r
+/* selector { Global Segment Descriptor                              } */\r
+/* 0x00 */  {{0,      0,  0,  0,    0,  0,  0,  0,    0,  0, 0,  0,  0}}, //null descriptor\r
 /* 0x08 */  {{0xffff, 0,  0,  0x2,  1,  0,  1,  0xf,  0,  0, 1,  1,  0}}, //linear data segment descriptor\r
 /* 0x10 */  {{0xffff, 0,  0,  0xf,  1,  0,  1,  0xf,  0,  0, 1,  1,  0}}, //linear code segment descriptor\r
 /* 0x18 */  {{0xffff, 0,  0,  0x3,  1,  0,  1,  0xf,  0,  0, 1,  1,  0}}, //system data segment descriptor\r
@@ -70,19 +70,21 @@ HandOffToDxeCore (
   VOID                      *TemplateBase;\r
   EFI_PHYSICAL_ADDRESS      VectorAddress;\r
   UINT32                    Index;\r
+  BOOLEAN                   InterruptState;\r
+\r
 \r
   Status = PeiServicesAllocatePages (EfiBootServicesData, EFI_SIZE_TO_PAGES (STACK_SIZE), &BaseOfStack);\r
   ASSERT_EFI_ERROR (Status);\r
-  \r
+\r
   if (FeaturePcdGet(PcdDxeIplSwitchToLongMode)) {\r
     //\r
-    // Compute the top of the stack we were allocated, which is used to load X64 dxe core. \r
+    // Compute the top of the stack we were allocated, which is used to load X64 dxe core.\r
     // Pre-allocate a 32 bytes which confroms to x64 calling convention.\r
     //\r
-    // The first four parameters to a function are passed in rcx, rdx, r8 and r9. \r
-    // Any further parameters are pushed on the stack. Furthermore, space (4 * 8bytes) for the \r
-    // register parameters is reserved on the stack, in case the called function \r
-    // wants to spill them; this is important if the function is variadic. \r
+    // The first four parameters to a function are passed in rcx, rdx, r8 and r9.\r
+    // Any further parameters are pushed on the stack. Furthermore, space (4 * 8bytes) for the\r
+    // register parameters is reserved on the stack, in case the called function\r
+    // wants to spill them; this is important if the function is variadic.\r
     //\r
     TopOfStack = BaseOfStack + EFI_SIZE_TO_PAGES (STACK_SIZE) * EFI_PAGE_SIZE - 32;\r
 \r
@@ -93,7 +95,7 @@ HandOffToDxeCore (
 \r
     //\r
     // Load the GDT of Go64. Since the GDT of 32-bit Tiano locates in the BS_DATA\r
-    // memory, it may be corrupted when copying FV to high-end memory \r
+    // memory, it may be corrupted when copying FV to high-end memory\r
     //\r
     AsmWriteGdtr (&gGdt);\r
     //\r
@@ -106,19 +108,19 @@ HandOffToDxeCore (
     //\r
     Status = PeiServicesInstallPpi (&gEndOfPeiSignalPpi);\r
     ASSERT_EFI_ERROR (Status);\r
-    \r
+\r
     AsmWriteCr3 (PageTables);\r
 \r
     //\r
     // Update the contents of BSP stack HOB to reflect the real stack info passed to DxeCore.\r
-    //    \r
+    //\r
     UpdateStackHob (BaseOfStack, STACK_SIZE);\r
 \r
     SizeOfTemplate = AsmGetVectorTemplatInfo (&TemplateBase);\r
 \r
     Status = PeiServicesAllocatePages (\r
-               EfiBootServicesData, \r
-               EFI_SIZE_TO_PAGES((SizeOfTemplate + sizeof (X64_IDT_GATE_DESCRIPTOR)) * 32), \r
+               EfiBootServicesData,\r
+               EFI_SIZE_TO_PAGES((SizeOfTemplate + sizeof (X64_IDT_GATE_DESCRIPTOR)) * 32),\r
                &VectorAddress\r
                );\r
     ASSERT_EFI_ERROR (Status);\r
@@ -141,14 +143,24 @@ HandOffToDxeCore (
     }\r
 \r
     gLidtDescriptor.Base = (UINTN) IdtTable;\r
+\r
+    //\r
+    // Disable interrupts and save the current interrupt state\r
+    //\r
+    InterruptState = SaveAndDisableInterrupts ();\r
+\r
     AsmWriteIdtr (&gLidtDescriptor);\r
 \r
-      \r
+    //\r
+    // Restore the interrupt state\r
+    //\r
+    SetInterruptState (InterruptState);\r
+\r
     //\r
     // Go to Long Mode and transfer control to DxeCore.\r
     // Interrupts will not get turned on until the CPU AP is loaded.\r
     // Call x64 drivers passing in single argument, a pointer to the HOBs.\r
-    // \r
+    //\r
     AsmEnablePaging64 (\r
       SYS_CODE64_SEL,\r
       DxeCoreEntryPoint,\r
@@ -172,9 +184,9 @@ HandOffToDxeCore (
 \r
     //\r
     // Update the contents of BSP stack HOB to reflect the real stack info passed to DxeCore.\r
-    //    \r
+    //\r
     UpdateStackHob (BaseOfStack, STACK_SIZE);\r
-    \r
+\r
     //\r
     // Transfer the control to the entry point of DxeCore.\r
     //\r
@@ -184,6 +196,6 @@ HandOffToDxeCore (
       NULL,\r
       (VOID *) (UINTN) TopOfStack\r
       );\r
-  } \r
+  }\r
 }\r
 \r