#ifndef __PEI_PCI_CFG2_H__\r
#define __PEI_PCI_CFG2_H__\r
\r
-#include <ProcessorBind.h>\r
#include <Pi/PiPeiCis.h>\r
\r
#define EFI_PEI_PCI_CFG2_PPI_GUID \\r
/// EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS\r
///\r
typedef struct {\r
+ ///\r
+ /// 8-bit register offset within the PCI configuration space for a given device's function\r
+ /// space.\r
+ ///\r
UINT8 Register;\r
+ ///\r
+ /// Only the 3 least-significant bits are used to encode one of 8 possible functions within a\r
+ /// given device.\r
+ ///\r
UINT8 Function;\r
+ ///\r
+ /// Only the 5 least-significant bits are used to encode one of 32 possible devices.\r
+ ///\r
UINT8 Device;\r
+ ///\r
+ /// 8-bit value to encode between 0 and 255 buses.\r
+ ///\r
UINT8 Bus;\r
+ ///\r
+ /// Register number in PCI configuration space. If this field is zero, then Register is used\r
+ /// for the register number. If this field is non-zero, then Register is ignored and this field\r
+ /// is used for the register number.\r
+ ///\r
UINT32 ExtendedRegister;\r
} EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS;\r
\r
IN CONST EFI_PEI_PCI_CFG2_PPI *This,\r
IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r
IN UINT64 Address,\r
- IN CONST VOID *SetBits,\r
- IN CONST VOID *ClearBits\r
+ IN VOID *SetBits,\r
+ IN VOID *ClearBits\r
);\r
\r
/**\r
\r
#ifndef __PEI_SMBUS2_PPI_H__\r
#define __PEI_SMBUS2_PPI_H__\r
+\r
#include <PiPei.h>\r
#include <IndustryStandard/SmBus.h>\r
\r
It can mean the offset to a list of functions inside \r
an SMBus slave device. Not all operations or slave devices support\r
this command's registers.\r
-\r
@param Operation Signifies which particular SMBus hardware protocol instance that it \r
will use to execute the SMBus transactions. \r
This SMBus hardware protocol is defined by the System Management Bus (SMBus) \r
Specification and is not related to UEFI.\r
-\r
@param PecCheck Defines if Packet Error Code (PEC) checking is required for this operation.\r
-\r
@param Length Signifies the number of bytes that this operation will do. \r
The maximum number of bytes can be revision specific and operation specific.\r
This parameter will contain the actual number of bytes that are executed\r
for this operation. Not all operations require this argument.\r
-\r
@param Buffer Contains the value of data to execute to the SMBus slave device. \r
Not all operations require this argument. \r
The length of this buffer is identified by Length.\r
EFI_STATUS\r
(EFIAPI *EFI_PEI_SMBUS2_PPI_EXECUTE_OPERATION)(\r
IN CONST EFI_PEI_SMBUS2_PPI *This,\r
- IN CONST EFI_SMBUS_DEVICE_ADDRESS SlaveAddress,\r
- IN CONST EFI_SMBUS_DEVICE_COMMAND Command,\r
- IN CONST EFI_SMBUS_OPERATION Operation,\r
- IN CONST BOOLEAN PecCheck,\r
+ IN EFI_SMBUS_DEVICE_ADDRESS SlaveAddress,\r
+ IN EFI_SMBUS_DEVICE_COMMAND Command,\r
+ IN EFI_SMBUS_OPERATION Operation,\r
+ IN BOOLEAN PecCheck,\r
IN OUT UINTN *Length,\r
IN OUT VOID *Buffer\r
);\r
EFI_STATUS\r
(EFIAPI *EFI_PEI_SMBUS2_PPI_ARP_DEVICE)(\r
IN CONST EFI_PEI_SMBUS2_PPI *This,\r
- IN CONST BOOLEAN ArpAll,\r
- IN CONST EFI_SMBUS_UDID *SmbusUdid, OPTIONAL\r
+ IN BOOLEAN ArpAll,\r
+ IN EFI_SMBUS_UDID *SmbusUdid, OPTIONAL\r
IN OUT EFI_SMBUS_DEVICE_ADDRESS *SlaveAddress OPTIONAL\r
);\r
\r
\r
typedef struct {\r
+ ///\r
+ /// The SMBUS hardware address to which the SMBUS device is preassigned or\r
+ /// allocated. Type EFI_SMBUS_DEVICE_ADDRESS is defined in EFI_PEI_SMBUS2_PPI.Execute().\r
+ ///\r
EFI_SMBUS_DEVICE_ADDRESS SmbusDeviceAddress;\r
+ ///\r
+ /// The SMBUS Unique Device Identifier (UDID) as defined in EFI_SMBUS_UDID.\r
+ /// Type EFI_SMBUS_UDID is defined in EFI_PEI_SMBUS2_PPI.ArpDevice().\r
+ ///\r
EFI_SMBUS_UDID SmbusDeviceUdid;\r
} EFI_SMBUS_DEVICE_MAP;\r
\r
@param Data Data of the SMBus host notify command that\r
the caller wants to be called.\r
\r
- @return Status\r
+ @retval EFI_SUCCESS NotifyFunction has been registered.\r
+ @retval EFI_UNSUPPORTED ArpDevice, GetArpMap, and Notify are not\r
+ implemented by this PEIM.\r
+\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_PEI_SMBUS_NOTIFY2_FUNCTION)(\r
IN CONST EFI_PEI_SMBUS2_PPI *SmbusPpi,\r
- IN CONST EFI_SMBUS_DEVICE_ADDRESS SlaveAddress,\r
- IN CONST UINTN Data\r
+ IN EFI_SMBUS_DEVICE_ADDRESS SlaveAddress,\r
+ IN UINTN Data\r
);\r
\r
/**\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_PEI_SMBUS2_PPI_NOTIFY)(\r
- IN CONST EFI_PEI_SMBUS2_PPI *This,\r
- IN CONST EFI_SMBUS_DEVICE_ADDRESS SlaveAddress,\r
- IN CONST UINTN Data,\r
- IN CONST EFI_PEI_SMBUS_NOTIFY2_FUNCTION NotifyFunction\r
+ IN CONST EFI_PEI_SMBUS2_PPI *This,\r
+ IN EFI_SMBUS_DEVICE_ADDRESS SlaveAddress,\r
+ IN UINTN Data,\r
+ IN EFI_PEI_SMBUS_NOTIFY2_FUNCTION NotifyFunction\r
);\r
\r
-/**\r
- @par Ppi Description:\r
- Provides the basic I/O interfaces that a PEIM uses to access \r
- its SMBus controller and the slave devices attached to it.\r
-\r
- @param Execute\r
- Executes the SMBus operation to an SMBus slave device.\r
-\r
- @param ArpDevice\r
- Allows an SMBus 2.0 device(s) to be Address Resolution Protocol (ARP)\r
-\r
- @param GetArpMap\r
- Allows a PEIM to retrieve the address that was allocated by the SMBus \r
- host controller during enumeration/ARP.\r
-\r
- @param Notify\r
- Allows a driver to register for a callback to the SMBus host \r
- controller driver when the bus issues a notification to the bus controller PEIM.\r
-\r
- @param Identifier\r
- Identifier which uniquely identifies this SMBus controller in a system.\r
-\r
-**/\r
+///\r
+/// Provides the basic I/O interfaces that a PEIM uses to access \r
+/// its SMBus controller and the slave devices attached to it.\r
+///\r
struct _EFI_PEI_SMBUS2_PPI {\r
+ ///\r
+ /// Executes the SMBus operation to an SMBus slave device.\r
+ ///\r
EFI_PEI_SMBUS2_PPI_EXECUTE_OPERATION Execute;\r
+ ///\r
+ /// Allows an SMBus 2.0 device(s) to be Address Resolution Protocol (ARP).\r
+ ///\r
EFI_PEI_SMBUS2_PPI_ARP_DEVICE ArpDevice;\r
+ ///\r
+ /// Allows a PEIM to retrieve the address that was allocated by the SMBus \r
+ /// host controller during enumeration/ARP.\r
+ ///\r
EFI_PEI_SMBUS2_PPI_GET_ARP_MAP GetArpMap;\r
+ ///\r
+ /// Allows a driver to register for a callback to the SMBus host \r
+ /// controller driver when the bus issues a notification to the bus controller PEIM.\r
+ ///\r
EFI_PEI_SMBUS2_PPI_NOTIFY Notify;\r
+ ///\r
+ /// Identifier which uniquely identifies this SMBus controller in a system.\r
+ ///\r
EFI_GUID Identifier;\r
};\r
\r
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