gArmTokenSpaceGuid.PcdEfiUncachedMemoryToStronglyOrdered|FALSE|BOOLEAN|0x00000025\r
\r
[PcdsFixedAtBuild.common]\r
+ gArmTokenSpaceGuid.PcdTrustzoneSupport|FALSE|BOOLEAN|0x00000006\r
+\r
# This PCD should be a FeaturePcd. But we used this PCD as an '#if' in an ASM file.\r
# Using a FeaturePcd make a '(BOOLEAN) casting for its value which is not understood by the preprocessor.\r
gArmTokenSpaceGuid.PcdVFPEnabled|0|UINT32|0x00000024\r
}
};
-/**
- Return if Trustzone is supported by your platform
-
- A non-zero value must be returned if you want to support a Secure World on your platform.
- ArmPlatformTrustzoneInit() will later set up the secure regions.
- This function can return 0 even if Trustzone is supported by your processor. In this case,
- the platform will continue to run in Secure World.
-
- @return A non-zero value if Trustzone supported.
-
-**/
-UINTN
-ArmPlatformTrustzoneSupported (
- VOID
- )
-{
- // There is no Trustzone controllers (TZPC & TZASC) and no Secure Memory on RTSM
- return FALSE;
-}
-
/**
Remap the memory at 0x0
// DDR attributes\r
#define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK\r
#define DDR_ATTRIBUTES_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED\r
-#define DDR_ATTRIBUTES_SECURE_CACHED ARM_MEMORY_REGION_ATTRIBUTE_SECURE_WRITE_BACK\r
-#define DDR_ATTRIBUTES_SECURE_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_SECURE_UNCACHED_UNBUFFERED\r
\r
/**\r
Return the Virtual Memory Map of your platform\r
)\r
{\r
UINT32 CacheAttributes;\r
- BOOLEAN bTrustzoneSupport = FALSE;\r
UINTN Index = 0;\r
ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable;\r
\r
ASSERT(VirtualMemoryMap != NULL);\r
\r
- VirtualMemoryTable = (ARM_MEMORY_REGION_DESCRIPTOR*)AllocatePages(EFI_SIZE_TO_PAGES (sizeof(ARM_MEMORY_REGION_DESCRIPTOR) * MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS));\r
+ VirtualMemoryTable = (ARM_MEMORY_REGION_DESCRIPTOR*)AllocatePages (EFI_SIZE_TO_PAGES (sizeof(ARM_MEMORY_REGION_DESCRIPTOR) * MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS));\r
if (VirtualMemoryTable == NULL) {\r
return;\r
}\r
\r
if (FeaturePcdGet(PcdCacheEnable) == TRUE) {\r
- CacheAttributes = (bTrustzoneSupport ? DDR_ATTRIBUTES_CACHED : DDR_ATTRIBUTES_SECURE_CACHED);\r
+ CacheAttributes = DDR_ATTRIBUTES_CACHED;\r
} else {\r
- CacheAttributes = (bTrustzoneSupport ? DDR_ATTRIBUTES_UNCACHED : DDR_ATTRIBUTES_SECURE_UNCACHED);\r
+ CacheAttributes = DDR_ATTRIBUTES_UNCACHED;\r
}\r
\r
// ReMap (Either NOR Flash or DRAM)\r
VirtualMemoryTable[++Index].PhysicalBase = ARM_EB_SMB_MB_ON_CHIP_PERIPH_BASE;\r
VirtualMemoryTable[Index].VirtualBase = ARM_EB_SMB_MB_ON_CHIP_PERIPH_BASE;\r
VirtualMemoryTable[Index].Length = ARM_EB_SMB_MB_ON_CHIP_PERIPH_SZ;\r
- VirtualMemoryTable[Index].Attributes = (bTrustzoneSupport ? ARM_MEMORY_REGION_ATTRIBUTE_DEVICE : ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE);\r
+ VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE;\r
\r
// SMB CS0-CS1 - NOR Flash 1 & 2\r
VirtualMemoryTable[++Index].PhysicalBase = ARM_EB_SMB_NOR_BASE;\r
VirtualMemoryTable[Index].VirtualBase = ARM_EB_SMB_NOR_BASE;\r
VirtualMemoryTable[Index].Length = ARM_EB_SMB_NOR_SZ + ARM_EB_SMB_DOC_SZ;\r
- VirtualMemoryTable[Index].Attributes = (bTrustzoneSupport ? ARM_MEMORY_REGION_ATTRIBUTE_DEVICE : ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE);\r
+ VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE;\r
\r
// SMB CS2 - SRAM\r
VirtualMemoryTable[++Index].PhysicalBase = ARM_EB_SMB_SRAM_BASE;\r
VirtualMemoryTable[++Index].PhysicalBase = ARM_EB_SMB_PERIPH_BASE;\r
VirtualMemoryTable[Index].VirtualBase = ARM_EB_SMB_PERIPH_BASE;\r
VirtualMemoryTable[Index].Length = ARM_EB_SMB_PERIPH_SZ;\r
- VirtualMemoryTable[Index].Attributes = (bTrustzoneSupport ? ARM_MEMORY_REGION_ATTRIBUTE_DEVICE : ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE);\r
+ VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE;\r
\r
// If a Logic Tile is connected to The ARM Versatile Express Motherboard\r
if (MmioRead32(ARM_EB_SYS_PROCID1_REG) != 0) {\r
VirtualMemoryTable[++Index].PhysicalBase = ARM_EB_LOGIC_TILE_BASE;\r
VirtualMemoryTable[Index].VirtualBase = ARM_EB_LOGIC_TILE_BASE;\r
VirtualMemoryTable[Index].Length = ARM_EB_LOGIC_TILE_SZ;\r
- VirtualMemoryTable[Index].Attributes = (bTrustzoneSupport ? ARM_MEMORY_REGION_ATTRIBUTE_DEVICE : ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE);\r
+ VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE;\r
\r
ASSERT((Index + 1) == (MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS + 1));\r
} else {\r
gArmPlatformTokenSpaceGuid.PcdNorFlashRemapping\r
\r
[FixedPcd]\r
+ gArmTokenSpaceGuid.PcdTrustzoneSupport\r
+\r
gArmTokenSpaceGuid.PcdL2x0ControllerBase\r
.ExtModeReg = DDR_EMR_RTT_50R | (DDR_EMR_ODS_VAL << DDR_EMR_ODS_MASK),
};
-/**
- Return if Trustzone is supported by your platform
-
- A non-zero value must be returned if you want to support a Secure World on your platform.
- ArmVExpressTrustzoneInit() will later set up the secure regions.
- This function can return 0 even if Trustzone is supported by your processor. In this case,
- the platform will continue to run in Secure World.
-
- @return A non-zero value if Trustzone supported.
-
-**/
-UINTN
-ArmPlatformTrustzoneSupported (
- VOID
- )
-{
- return (MmioRead32(ARM_VE_SYS_CFGRW1_REG) & ARM_VE_CFGRW1_TZASC_EN_BIT_MASK);
-}
-
/**
Return the current Boot Mode
VOID
)
{
- return BOOT_WITH_FULL_CONFIGURATION;
+ if (MmioRead32(ARM_VE_SYS_FLAGS_NV_REG) == 0) {
+ return BOOT_WITH_FULL_CONFIGURATION;
+ } else {
+ return BOOT_ON_S2_RESUME;
+ }
}
/**
// DDR attributes\r
#define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK\r
#define DDR_ATTRIBUTES_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED\r
-#define DDR_ATTRIBUTES_SECURE_CACHED ARM_MEMORY_REGION_ATTRIBUTE_SECURE_WRITE_BACK\r
-#define DDR_ATTRIBUTES_SECURE_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_SECURE_UNCACHED_UNBUFFERED\r
\r
/**\r
Return the Virtual Memory Map of your platform\r
)\r
{\r
ARM_MEMORY_REGION_ATTRIBUTES CacheAttributes;\r
- BOOLEAN bTrustzoneSupport;\r
UINTN Index = 0;\r
ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable;\r
\r
return;\r
}\r
\r
- // Check if SMC TZASC is enabled. If Trustzone not enabled then all the entries remain in Secure World.\r
- // As this value can be changed in the Board Configuration file, the UEFI firmware needs to work for both case\r
- if (ArmPlatformTrustzoneSupported ()) {\r
- bTrustzoneSupport = TRUE;\r
- } else {\r
- bTrustzoneSupport = FALSE;\r
- }\r
-\r
if (FeaturePcdGet(PcdCacheEnable) == TRUE) {\r
- CacheAttributes = (bTrustzoneSupport ? DDR_ATTRIBUTES_CACHED : DDR_ATTRIBUTES_SECURE_CACHED);\r
+ CacheAttributes = DDR_ATTRIBUTES_CACHED;\r
} else {\r
- CacheAttributes = (bTrustzoneSupport ? DDR_ATTRIBUTES_UNCACHED : DDR_ATTRIBUTES_SECURE_UNCACHED);\r
+ CacheAttributes = DDR_ATTRIBUTES_UNCACHED;\r
}\r
\r
- // ReMap (Either NOR Flash or DRAM)\r
- VirtualMemoryTable[Index].PhysicalBase = ARM_VE_REMAP_BASE;\r
- VirtualMemoryTable[Index].VirtualBase = ARM_VE_REMAP_BASE;\r
- VirtualMemoryTable[Index].Length = ARM_VE_REMAP_SZ;\r
-\r
- if (FeaturePcdGet(PcdNorFlashRemapping)) {\r
- // Map the NOR Flash as Secure Memory\r
- if (FeaturePcdGet(PcdCacheEnable) == TRUE) {\r
- VirtualMemoryTable[Index].Attributes = DDR_ATTRIBUTES_SECURE_CACHED;\r
- } else {\r
- VirtualMemoryTable[Index].Attributes = DDR_ATTRIBUTES_SECURE_UNCACHED;\r
- }\r
- } else {\r
- // DRAM mapping\r
+ if (FeaturePcdGet(PcdNorFlashRemapping) == FALSE) {\r
+ // ReMap (Either NOR Flash or DRAM)\r
+ VirtualMemoryTable[Index].PhysicalBase = ARM_VE_REMAP_BASE;\r
+ VirtualMemoryTable[Index].VirtualBase = ARM_VE_REMAP_BASE;\r
+ VirtualMemoryTable[Index].Length = ARM_VE_REMAP_SZ;\r
VirtualMemoryTable[Index].Attributes = CacheAttributes;\r
}\r
\r
VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_MB_ON_CHIP_PERIPH_BASE;\r
VirtualMemoryTable[Index].VirtualBase = ARM_VE_SMB_MB_ON_CHIP_PERIPH_BASE;\r
VirtualMemoryTable[Index].Length = ARM_VE_SMB_MB_ON_CHIP_PERIPH_SZ;\r
- VirtualMemoryTable[Index].Attributes = (bTrustzoneSupport ? ARM_MEMORY_REGION_ATTRIBUTE_DEVICE : ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE);\r
+ VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;\r
\r
// SMB CS0-CS1 - NOR Flash 1 & 2\r
VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_NOR0_BASE;\r
VirtualMemoryTable[Index].VirtualBase = ARM_VE_SMB_NOR0_BASE;\r
VirtualMemoryTable[Index].Length = ARM_VE_SMB_NOR0_SZ + ARM_VE_SMB_NOR1_SZ;\r
- VirtualMemoryTable[Index].Attributes = (bTrustzoneSupport ? ARM_MEMORY_REGION_ATTRIBUTE_DEVICE : ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE);\r
+ VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;\r
\r
// SMB CS2 - SRAM\r
VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_SRAM_BASE;\r
VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_PERIPH_BASE;\r
VirtualMemoryTable[Index].VirtualBase = ARM_VE_SMB_PERIPH_BASE;\r
VirtualMemoryTable[Index].Length = ARM_VE_SMB_PERIPH_SZ;\r
- VirtualMemoryTable[Index].Attributes = (bTrustzoneSupport ? ARM_MEMORY_REGION_ATTRIBUTE_DEVICE : ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE);\r
+ VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;\r
\r
// If a Logic Tile is connected to The ARM Versatile Express Motherboard\r
if (MmioRead32(ARM_VE_SYS_PROCID1_REG) != 0) {\r
VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_EXT_AXI_BASE;\r
VirtualMemoryTable[Index].VirtualBase = ARM_VE_EXT_AXI_BASE;\r
VirtualMemoryTable[Index].Length = ARM_VE_EXT_AXI_SZ;\r
- VirtualMemoryTable[Index].Attributes = (bTrustzoneSupport ? ARM_MEMORY_REGION_ATTRIBUTE_DEVICE : ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE);\r
+ VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;\r
\r
ASSERT((Index + 1) == (MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS + 1));\r
} else {\r
// Setup TZ Protection Controller
//
+ if (MmioRead32(ARM_VE_SYS_CFGRW1_REG) & ARM_VE_CFGRW1_TZASC_EN_BIT_MASK) {
+ ASSERT (PcdGetBool (PcdTrustzoneSupport) == TRUE);
+ } else {
+ ASSERT (PcdGetBool (PcdTrustzoneSupport) == FALSE);
+ }
+
// Set Non Secure access for all devices
TZPCSetDecProtBits(ARM_VE_TZPC_BASE, TZPC_DECPROT_0, 0xFFFFFFFF);
TZPCSetDecProtBits(ARM_VE_TZPC_BASE, TZPC_DECPROT_1, 0xFFFFFFFF);
#include <ArmPlatform.h>
+UINTN
+ArmGetCpuCountPerCluster (
+ VOID
+ );
+
ARM_CORE_INFO mVersatileExpressMpCoreInfoTable[] = {
{
// Cluster 0, Core 0
}
};
-/**
- Return if Trustzone is supported by your platform
-
- A non-zero value must be returned if you want to support a Secure World on your platform.
- ArmVExpressTrustzoneInit() will later set up the secure regions.
- This function can return 0 even if Trustzone is supported by your processor. In this case,
- the platform will continue to run in Secure World.
-
- @return A non-zero value if Trustzone supported.
-
-**/
-UINTN
-ArmPlatformTrustzoneSupported (
- VOID
- )
-{
- // Not supported yet but model does have Secure SRAM (but no TZPC/TZASC) so we could support it
- return FALSE;
-}
-
/**
Return the current Boot Mode
// DDR attributes\r
#define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK\r
#define DDR_ATTRIBUTES_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED\r
-#define DDR_ATTRIBUTES_SECURE_CACHED ARM_MEMORY_REGION_ATTRIBUTE_SECURE_WRITE_BACK\r
-#define DDR_ATTRIBUTES_SECURE_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_SECURE_UNCACHED_UNBUFFERED\r
\r
/**\r
Return the Virtual Memory Map of your platform\r
)\r
{\r
ARM_MEMORY_REGION_ATTRIBUTES CacheAttributes;\r
- BOOLEAN bTrustzoneSupport;\r
UINTN Index = 0;\r
ARM_MEMORY_REGION_DESCRIPTOR *VirtualMemoryTable;\r
\r
return;\r
}\r
\r
- // Check if SMC TZASC is enabled. If Trustzone not enabled then all the entries remain in Secure World.\r
- // As this value can be changed in the Board Configuration file, the UEFI firmware needs to work for both case\r
- if (ArmPlatformTrustzoneSupported ()) {\r
- bTrustzoneSupport = TRUE;\r
- } else {\r
- bTrustzoneSupport = FALSE;\r
- }\r
-\r
if (FeaturePcdGet(PcdCacheEnable) == TRUE) {\r
- CacheAttributes = (bTrustzoneSupport ? DDR_ATTRIBUTES_CACHED : DDR_ATTRIBUTES_SECURE_CACHED);\r
+ CacheAttributes = DDR_ATTRIBUTES_CACHED;\r
} else {\r
- CacheAttributes = (bTrustzoneSupport ? DDR_ATTRIBUTES_UNCACHED : DDR_ATTRIBUTES_SECURE_UNCACHED);\r
+ CacheAttributes = DDR_ATTRIBUTES_UNCACHED;\r
}\r
\r
// ReMap (Either NOR Flash or DRAM)\r
VirtualMemoryTable[Index].VirtualBase = ARM_VE_REMAP_BASE;\r
VirtualMemoryTable[Index].Length = ARM_VE_REMAP_SZ;\r
\r
- if (FeaturePcdGet(PcdNorFlashRemapping)) {\r
+ if (FeaturePcdGet(PcdNorFlashRemapping) == FALSE) {\r
// Map the NOR Flash as Secure Memory\r
if (FeaturePcdGet(PcdCacheEnable) == TRUE) {\r
- VirtualMemoryTable[Index].Attributes = DDR_ATTRIBUTES_SECURE_CACHED;\r
+ VirtualMemoryTable[Index].Attributes = DDR_ATTRIBUTES_CACHED;\r
} else {\r
- VirtualMemoryTable[Index].Attributes = DDR_ATTRIBUTES_SECURE_UNCACHED;\r
+ VirtualMemoryTable[Index].Attributes = DDR_ATTRIBUTES_UNCACHED;\r
}\r
} else {\r
// DRAM mapping\r
VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_ON_CHIP_PERIPH_BASE;\r
VirtualMemoryTable[Index].VirtualBase = ARM_VE_ON_CHIP_PERIPH_BASE;\r
VirtualMemoryTable[Index].Length = ARM_VE_ON_CHIP_PERIPH_SZ;\r
- VirtualMemoryTable[Index].Attributes = (bTrustzoneSupport ? ARM_MEMORY_REGION_ATTRIBUTE_DEVICE : ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE);\r
+ VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE;\r
\r
// SMB CS0-CS1 - NOR Flash 1 & 2\r
VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_NOR0_BASE;\r
VirtualMemoryTable[Index].VirtualBase = ARM_VE_SMB_NOR0_BASE;\r
VirtualMemoryTable[Index].Length = ARM_VE_SMB_NOR0_SZ + ARM_VE_SMB_NOR1_SZ;\r
- VirtualMemoryTable[Index].Attributes = (bTrustzoneSupport ? ARM_MEMORY_REGION_ATTRIBUTE_DEVICE : ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE);\r
+ VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE;\r
\r
// SMB CS2 - SRAM\r
VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_SRAM_BASE;\r
VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_SMB_PERIPH_BASE;\r
VirtualMemoryTable[Index].VirtualBase = ARM_VE_SMB_PERIPH_BASE;\r
VirtualMemoryTable[Index].Length = 2 * ARM_VE_SMB_PERIPH_SZ;\r
- VirtualMemoryTable[Index].Attributes = (bTrustzoneSupport ? ARM_MEMORY_REGION_ATTRIBUTE_DEVICE : ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE);
+ VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE;
\r
//TODO:This should be enabled for final release. Right now, ARM VE RTSM crashes.\r
// // If a Logic Tile is connected to The ARM Versatile Express Motherboard\r
// VirtualMemoryTable[++Index].PhysicalBase = ARM_VE_EXT_AXI_BASE;\r
// VirtualMemoryTable[Index].VirtualBase = ARM_VE_EXT_AXI_BASE;\r
// VirtualMemoryTable[Index].Length = ARM_VE_EXT_AXI_SZ;\r
-// VirtualMemoryTable[Index].Attributes = (bTrustzoneSupport ? ARM_MEMORY_REGION_ATTRIBUTE_DEVICE : ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE);\r
+// VirtualMemoryTable[Index].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_SECURE_DEVICE;\r
//\r
// ASSERT((Index + 1) == (MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS + 1));\r
// } else {\r
VOID
);
-/**
- Return if Trustzone is supported by your platform
-
- A non-zero value must be returned if you want to support a Secure World on your platform.
- ArmPlatformTrustzoneInit() will later set up the secure regions.
- This function can return 0 even if Trustzone is supported by your processor. In this case,
- the platform will continue to run in Secure World.
-
- @return A non-zero value if Trustzone supported.
-
-**/
-UINTN
-ArmPlatformTrustzoneSupported (
- VOID
- );
-
/**
Initialize the Secure peripherals and memory regions
}
// Test if Trustzone is supported on this platform
- if (ArmPlatformTrustzoneSupported ()) {
+ if (FixedPcdGetBool (PcdTrustzoneSupport)) {
// Ensure the Monitor Stack Base & Size have been set
ASSERT(PcdGet32(PcdCPUCoresSecMonStackBase) != 0);
ASSERT(PcdGet32(PcdCPUCoreSecMonStackSize) != 0);
gArmPlatformTokenSpaceGuid.PcdSystemMemoryInitializeInSec\r
\r
[FixedPcd]\r
+ gArmTokenSpaceGuid.PcdTrustzoneSupport\r
gArmTokenSpaceGuid.PcdVFPEnabled\r
\r
gArmTokenSpaceGuid.PcdArmPrimaryCoreMask\r