Vlv2TbltDevicePkg: Remove reference deprecated macro.

Cc: Jeff Fan <jeff.fan@intel.com>
Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: David Wei <david.wei@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>

diff --git a/Vlv2TbltDevicePkg/PlatformInitPei/MemoryPeim.c b/Vlv2TbltDevicePkg/PlatformInitPei/MemoryPeim.c
index 5a18a3fe1efc047d37a265b919e15ae0fd22baf4..6f37e3b72367921039d7b750c38f5e17af9b0a63 100644 (file)
--- a/Vlv2TbltDevicePkg/PlatformInitPei/MemoryPeim.c
+++ b/Vlv2TbltDevicePkg/PlatformInitPei/MemoryPeim.c
@@ -196,16 +196,22 @@ SetPeiCacheMode (
   // Cache the flash area to improve the boot performance in PEI phase\r
   //\r
   Index = 0;\r
-  MtrrSetting.Variables.Mtrr[0].Base = (FixedPcdGet32 (PcdFlashAreaBaseAddress) | CacheWriteProtected);\r
-  MtrrSetting.Variables.Mtrr[0].Mask = ((~((UINT64)(FixedPcdGet32 (PcdFlashAreaSize) - 1))) & ValidMtrrAddressMask) | MTRR_LIB_CACHE_MTRR_ENABLED;\r
+  ((MSR_IA32_MTRR_PHYSBASE_REGISTER *) &MtrrSetting.Variables.Mtrr[0].Base)->Uint64 = FixedPcdGet32 (PcdFlashAreaBaseAddress);\r
+  ((MSR_IA32_MTRR_PHYSBASE_REGISTER *) &MtrrSetting.Variables.Mtrr[0].Base)->Bits.Type = CacheWriteProtected;\r
+  ((MSR_IA32_MTRR_PHYSMASK_REGISTER *) &MtrrSetting.Variables.Mtrr[0].Mask)->Uint64 = (~((UINT64)(FixedPcdGet32 (PcdFlashAreaSize) - 1))) & ValidMtrrAddressMask;\r
+  ((MSR_IA32_MTRR_PHYSMASK_REGISTER *) &MtrrSetting.Variables.Mtrr[0].Mask)->Bits.V = 1;\r
+\r
   Index ++;\r
 \r
   MemOverflow =0;\r
   while (MaxMemoryLength > MemOverflow){\r
-    MtrrSetting.Variables.Mtrr[Index].Base = (MemOverflow & ValidMtrrAddressMask) | CacheWriteBack;\r
     MemoryLength = MaxMemoryLength - MemOverflow;\r
     MemoryLength = GetPowerOfTwo64 (MemoryLength);\r
-    MtrrSetting.Variables.Mtrr[Index].Mask = ((~(MemoryLength - 1)) & ValidMtrrAddressMask) | MTRR_LIB_CACHE_MTRR_ENABLED;\r
+\r
+    ((MSR_IA32_MTRR_PHYSBASE_REGISTER *) &MtrrSetting.Variables.Mtrr[Index].Base)->Uint64 = MemOverflow & ValidMtrrAddressMask;\r
+    ((MSR_IA32_MTRR_PHYSBASE_REGISTER *) &MtrrSetting.Variables.Mtrr[Index].Base)->Bits.Type = CacheWriteBack;\r
+    ((MSR_IA32_MTRR_PHYSMASK_REGISTER *) &MtrrSetting.Variables.Mtrr[Index].Mask)->Uint64 = (~(MemoryLength - 1)) & ValidMtrrAddressMask;\r
+    ((MSR_IA32_MTRR_PHYSMASK_REGISTER *) &MtrrSetting.Variables.Mtrr[Index].Mask)->Bits.V = 1;\r
 \r
     MemOverflow += MemoryLength;\r
     Index++;\r
@@ -216,23 +222,28 @@ SetPeiCacheMode (
   while (MaxMemoryLength != MemoryLength) {\r
     MemoryLengthUc = GetPowerOfTwo64 (MaxMemoryLength - MemoryLength);\r
 \r
-    MtrrSetting.Variables.Mtrr[Index].Base = ((MaxMemoryLength - MemoryLengthUc) & ValidMtrrAddressMask) | CacheUncacheable;\r
-    MtrrSetting.Variables.Mtrr[Index].Mask= ((~(MemoryLengthUc   - 1)) & ValidMtrrAddressMask) | MTRR_LIB_CACHE_MTRR_ENABLED;\r
+    ((MSR_IA32_MTRR_PHYSBASE_REGISTER *) &MtrrSetting.Variables.Mtrr[Index].Base)->Uint64 = (MaxMemoryLength - MemoryLengthUc) & ValidMtrrAddressMask;\r
+    ((MSR_IA32_MTRR_PHYSBASE_REGISTER *) &MtrrSetting.Variables.Mtrr[Index].Base)->Bits.Type = CacheUncacheable;\r
+    ((MSR_IA32_MTRR_PHYSMASK_REGISTER *) &MtrrSetting.Variables.Mtrr[Index].Mask)->Uint64 = (~(MemoryLengthUc   - 1)) & ValidMtrrAddressMask;\r
+    ((MSR_IA32_MTRR_PHYSMASK_REGISTER *) &MtrrSetting.Variables.Mtrr[Index].Mask)->Bits.V = 1;\r
+\r
     MaxMemoryLength -= MemoryLengthUc;\r
     Index++;\r
   }\r
 \r
   MemOverflow =0x100000000;\r
   while (HighMemoryLength > 0) {\r
-    MtrrSetting.Variables.Mtrr[Index].Base = (MemOverflow & ValidMtrrAddressMask) | CacheWriteBack;\r
+\r
     MemoryLength = HighMemoryLength;\r
     MemoryLength = GetPowerOfTwo64 (MemoryLength);\r
-\r
     if (MemoryLength > MemOverflow){\r
       MemoryLength = MemOverflow;\r
     }\r
 \r
-    MtrrSetting.Variables.Mtrr[Index].Mask = ((~(MemoryLength - 1)) & ValidMtrrAddressMask) | MTRR_LIB_CACHE_MTRR_ENABLED;\r
+    ((MSR_IA32_MTRR_PHYSBASE_REGISTER *) &MtrrSetting.Variables.Mtrr[Index].Base)->Uint64 = MemOverflow & ValidMtrrAddressMask;\r
+    ((MSR_IA32_MTRR_PHYSBASE_REGISTER *) &MtrrSetting.Variables.Mtrr[Index].Base)->Bits.Type = CacheWriteBack;\r
+    ((MSR_IA32_MTRR_PHYSMASK_REGISTER *) &MtrrSetting.Variables.Mtrr[Index].Mask)->Uint64 = (~(MemoryLength - 1)) & ValidMtrrAddressMask;\r
+    ((MSR_IA32_MTRR_PHYSMASK_REGISTER *) &MtrrSetting.Variables.Mtrr[Index].Mask)->Bits.V = 1;\r
 \r
     MemOverflow += MemoryLength;\r
     HighMemoryLength -= MemoryLength;\r

diff --git a/Vlv2TbltDevicePkg/PlatformInitPei/PlatformEarlyInit.h b/Vlv2TbltDevicePkg/PlatformInitPei/PlatformEarlyInit.h
index c280fb8c4d0dfdf5a4d42ad1d60010fc038b80e7..295026df0666f45fefc1a4fa8dd5a10149f37ed2 100644 (file)
--- a/Vlv2TbltDevicePkg/PlatformInitPei/PlatformEarlyInit.h
+++ b/Vlv2TbltDevicePkg/PlatformInitPei/PlatformEarlyInit.h
@@ -84,6 +84,7 @@ Abstract:
 #include <Guid/PlatformCpuInfo.h>\r
 #include <Guid/OsSelection.h>\r
 #include <Guid/SmramMemoryReserve.h>\r
+#include <Register/Msr.h>\r
 \r
 #define SMC_LAN_ON       0x46\r
 #define SMC_LAN_OFF    0x47\r