}\r
\r
/**\r
- Switch the clock frequency to the specified value.\r
+ Switch the bus timing and clock frequency.\r
\r
Refer to EMMC Electrical Standard Spec 5.1 Section 6.6 and SD Host Controller\r
Simplified Spec 3.0 Figure 3-3 for details.\r
\r
**/\r
EFI_STATUS\r
-EmmcSwitchClockFreq (\r
+EmmcSwitchBusTiming (\r
IN EFI_PCI_IO_PROTOCOL *PciIo,\r
IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,\r
IN UINT8 Slot,\r
\r
Status = EmmcSwitch (PassThru, Slot, Access, Index, Value, CmdSet);\r
if (EFI_ERROR (Status)) {\r
- DEBUG ((DEBUG_ERROR, "EmmcSwitchClockFreq: Switch to hstiming %d fails with %r\n", HsTiming, Status));\r
+ DEBUG ((DEBUG_ERROR, "EmmcSwitchBusTiming: Switch to hstiming %d fails with %r\n", HsTiming, Status));\r
+ return Status;\r
+ }\r
+\r
+ //\r
+ // Convert the clock freq unit from MHz to KHz.\r
+ //\r
+ Status = SdMmcHcClockSupply (PciIo, Slot, ClockFreq * 1000, Private->BaseClkFreq[Slot], Private->ControllerVersion[Slot]);\r
+ if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
\r
Status = EmmcSendStatus (PassThru, Slot, Rca, &DevStatus);\r
if (EFI_ERROR (Status)) {\r
- DEBUG ((DEBUG_ERROR, "EmmcSwitchClockFreq: Send status fails with %r\n", Status));\r
+ DEBUG ((DEBUG_ERROR, "EmmcSwitchBusTiming: Send status fails with %r\n", Status));\r
return Status;\r
}\r
//\r
// Check the switch operation is really successful or not.\r
//\r
if ((DevStatus & BIT7) != 0) {\r
- DEBUG ((DEBUG_ERROR, "EmmcSwitchClockFreq: The switch operation fails as DevStatus is 0x%08x\n", DevStatus));\r
+ DEBUG ((DEBUG_ERROR, "EmmcSwitchBusTiming: The switch operation fails as DevStatus is 0x%08x\n", DevStatus));\r
return EFI_DEVICE_ERROR;\r
}\r
- //\r
- // Convert the clock freq unit from MHz to KHz.\r
- //\r
- Status = SdMmcHcClockSupply (PciIo, Slot, ClockFreq * 1000, Private->BaseClkFreq[Slot], Private->ControllerVersion[Slot]);\r
- if (EFI_ERROR (Status)) {\r
- return Status;\r
- }\r
\r
if (mOverride != NULL && mOverride->NotifyPhase != NULL) {\r
Status = mOverride->NotifyPhase (\r
}\r
\r
HsTiming = 1;\r
- Status = EmmcSwitchClockFreq (PciIo, PassThru, Slot, Rca, HsTiming, Timing, ClockFreq);\r
+ Status = EmmcSwitchBusTiming (PciIo, PassThru, Slot, Rca, HsTiming, Timing, ClockFreq);\r
\r
return Status;\r
}\r
Status = SdMmcHcOrMmio (PciIo, Slot, SD_MMC_HC_CLOCK_CTRL, sizeof (ClockCtrl), &ClockCtrl);\r
\r
HsTiming = 2;\r
- Status = EmmcSwitchClockFreq (PciIo, PassThru, Slot, Rca, HsTiming, Timing, ClockFreq);\r
+ Status = EmmcSwitchBusTiming (PciIo, PassThru, Slot, Rca, HsTiming, Timing, ClockFreq);\r
if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
// Set to Hight Speed timing and set the clock frequency to a value less than 52MHz.\r
//\r
HsTiming = 1;\r
- Status = EmmcSwitchClockFreq (PciIo, PassThru, Slot, Rca, HsTiming, SdMmcMmcHsSdr, 52);\r
+ Status = EmmcSwitchBusTiming (PciIo, PassThru, Slot, Rca, HsTiming, SdMmcMmcHsSdr, 52);\r
if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
}\r
\r
HsTiming = 3;\r
- Status = EmmcSwitchClockFreq (PciIo, PassThru, Slot, Rca, HsTiming, Timing, ClockFreq);\r
+ Status = EmmcSwitchBusTiming (PciIo, PassThru, Slot, Rca, HsTiming, Timing, ClockFreq);\r
\r
return Status;\r
}\r