--- /dev/null
+/// @file\r
+/// Contains an implementation of CallPalProcStacked on Itanium-based\r
+/// architecture.\r
+///\r
+/// Copyright (c) 2006, Intel Corporation\r
+/// All rights reserved. This program and the accompanying materials\r
+/// are licensed and made available under the terms and conditions of the BSD License\r
+/// which accompanies this distribution. The full text of the license may be found at\r
+/// http://opensource.org/licenses/bsd-license.php\r
+///\r
+/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+///\r
+/// Module Name: AsmPalCall.s\r
+///\r
+///\r
+\r
+\r
+//-----------------------------------------------------------------------------\r
+//++\r
+// AsmPalCall\r
+//\r
+// Makes a PAL procedure call.\r
+// This is function to make a PAL procedure call. Based on the Index\r
+// value this API will make static or stacked PAL call. The following table\r
+// describes the usage of PAL Procedure Index Assignment. Architected procedures\r
+// may be designated as required or optional. If a PAL procedure is specified\r
+// as optional, a unique return code of 0xFFFFFFFFFFFFFFFF is returned in the\r
+// Status field of the PAL_CALL_RETURN structure.\r
+// This indicates that the procedure is not present in this PAL implementation.\r
+// It is the caller¡¯s responsibility to check for this return code after calling\r
+// any optional PAL procedure.\r
+// No parameter checking is performed on the 5 input parameters, but there are\r
+// some common rules that the caller should follow when making a PAL call. Any\r
+// address passed to PAL as buffers for return parameters must be 8-byte aligned.\r
+// Unaligned addresses may cause undefined results. For those parameters defined\r
+// as reserved or some fields defined as reserved must be zero filled or the invalid\r
+// argument return value may be returned or undefined result may occur during the\r
+// execution of the procedure. If the PalEntryPoint does not point to a valid\r
+// PAL entry point then the system behavior is undefined. This function is only\r
+// available on IPF.\r
+//\r
+// On Entry :\r
+// in0: PAL_PROC entrypoint\r
+// in1-in4 : PAL_PROC arguments\r
+//\r
+// Return Value:\r
+//\r
+// As per stacked calling conventions.\r
+//\r
+//--\r
+//---------------------------------------------------------------------------\r
+\r
+//\r
+// PAL function calls\r
+//\r
+#define PAL_MC_CLEAR_LOG 0x0015\r
+#define PAL_MC_DYNAMIC_STATE 0x0018\r
+#define PAL_MC_ERROR_INFO 0x0019\r
+#define PAL_MC_RESUME 0x001a\r
+\r
+\r
+.text\r
+.proc AsmPalCall\r
+.type AsmPalCall, @function\r
+\r
+AsmPalCall::\r
+ alloc loc1 = ar.pfs,5,8,4,0\r
+ mov loc0 = b0\r
+ mov loc3 = b5\r
+ mov loc4 = r2\r
+ mov loc7 = r1\r
+ mov r2 = psr;;\r
+ mov r28 = in1\r
+ mov loc5 = r2;;\r
+\r
+ movl loc6 = 0x100;;\r
+ cmp.ge p6,p7 = r28,loc6;;\r
+\r
+(p6) movl loc6 = 0x1FF;;\r
+(p7) br.dpnt.few PalCallStatic;; // 0 ~ 255 make a static Pal Call\r
+(p6) cmp.le p6,p7 = r28,loc6;;\r
+(p6) br.dpnt.few PalCallStacked;; // 256 ~ 511 make a stacked Pal Call\r
+(p7) movl loc6 = 0x300;;\r
+(p7) cmp.ge p6,p7 = r28,loc6;;\r
+(p7) br.dpnt.few PalCallStatic;; // 512 ~ 767 make a static Pal Call\r
+(p6) movl loc6 = 0x3FF;;\r
+(p6) cmp.le p6,p7 = r28,loc6;;\r
+(p6) br.dpnt.few PalCallStacked;; // 768 ~ 1023 make a stacked Pal Call\r
+\r
+(p7) mov r8 = 0xFFFFFFFFFFFFFFFF;; // > 1024 return invalid\r
+(p7) br.dpnt.few ComeBackFromPALCall;;\r
+\r
+PalCallStatic:\r
+ movl loc6 = PAL_MC_CLEAR_LOG;;\r
+ cmp.eq p6,p7 = r28,loc6;;\r
+\r
+(p7) movl loc6 = PAL_MC_DYNAMIC_STATE;;\r
+(p7) cmp.eq p6,p7 = r28,loc6;;\r
+\r
+(p7) movl loc6 = PAL_MC_ERROR_INFO;;\r
+(p7) cmp.eq p6,p7 = r28,loc6;;\r
+\r
+(p7) movl loc6 = PAL_MC_RESUME;;\r
+(p7) cmp.eq p6,p7 = r28,loc6 ;;\r
+\r
+ mov loc6 = 0x1;;\r
+(p7) dep r2 = loc6,r2,13,1;; // psr.ic = 1\r
+\r
+// p6 will be true, if it is one of the MCHK calls. There has been lots of debate\r
+// on psr.ic for these values. For now, do not do any thing to psr.ic\r
+\r
+ dep r2 = r0,r2,14,1;; // psr.i = 0\r
+\r
+ mov psr.l = r2\r
+ srlz.d // Needs data serailization.\r
+ srlz.i // Needs instruction serailization.\r
+\r
+StaticGetPALLocalIP:\r
+ mov loc2 = ip;;\r
+ add loc2 = ComeBackFromPALCall - StaticGetPALLocalIP,loc2;;\r
+ mov b0 = loc2 // return address after Pal call\r
+\r
+ mov r29 = in2\r
+ mov r30 = in3\r
+ mov r31 = in4\r
+ mov b5 = in0;; // get the PalProcEntrypt from input\r
+ br.sptk b5;; // Take the plunge.\r
+\r
+PalCallStacked:\r
+ dep r2 = r0,r2,14,1;; // psr.i = 0\r
+ mov psr.l = r2;;\r
+ srlz.d // Needs data serailization.\r
+ srlz.i // Needs instruction serailization.\r
+\r
+StackedGetPALLocalIP:\r
+ mov out0 = in1\r
+ mov out1 = in2\r
+ mov out2 = in3\r
+ mov out3 = in4\r
+ mov b5 = in0 ;; // get the PalProcEntrypt from input\r
+ br.call.dpnt b0 = b5 ;; // Take the plunge.\r
+\r
+ComeBackFromPALCall:\r
+ mov psr.l = loc5 ;;\r
+ srlz.d // Needs data serailization.\r
+ srlz.i // Needs instruction serailization.\r
+\r
+ mov b5 = loc3\r
+ mov r2 = loc4\r
+ mov r1 = loc7\r
+\r
+ mov b0 = loc0\r
+ mov ar.pfs = loc1;;\r
+ br.ret.dpnt b0;;\r
+\r
+.endp AsmPalCall\r
+\r
--- /dev/null
+/// @file\r
+/// IPF specific AsmFc() and AsmFci () functions\r
+///\r
+/// Copyright (c) 2006, Intel Corporation\r
+/// All rights reserved. This program and the accompanying materials\r
+/// are licensed and made available under the terms and conditions of the BSD License\r
+/// which accompanies this distribution. The full text of the license may be found at\r
+/// http://opensource.org/licenses/bsd-license.php\r
+///\r
+/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+///\r
+/// Module Name: ExecFc.s\r
+///\r
+///\r
+\r
+//---------------------------------------------------------------------------------\r
+//++\r
+// AsmFc\r
+//\r
+// This routine is used to execute a FC instruction on the specific address.\r
+//\r
+// Arguments :\r
+//\r
+// On Entry : The specific address need to execute FC instruction.\r
+//\r
+// Return Value: The specific address have been execute FC instruction.\r
+//\r
+//--\r
+//----------------------------------------------------------------------------------\r
+.text\r
+.type AsmFc, @function\r
+.proc AsmFc\r
+.regstk 1, 0, 0, 0\r
+\r
+AsmFc::\r
+ fc in0\r
+ mov r8 = in0;;\r
+ br.ret.dpnt b0;;\r
+.endp AsmFc\r
+\r
+\r
+//---------------------------------------------------------------------------------\r
+//++\r
+// AsmFci\r
+//\r
+// This routine is used to execute a FC.i instruction on the specific address.\r
+//\r
+// Arguments :\r
+//\r
+// On Entry : The specific address need to execute FC.i instruction.\r
+//\r
+// Return Value: The specific address have been execute FC.i instruction.\r
+//\r
+//--\r
+//----------------------------------------------------------------------------------\r
+.text\r
+.type AsmFci, @function\r
+.proc AsmFci\r
+.regstk 1, 0, 0, 0\r
+\r
+AsmFci::\r
+ fc.i in0\r
+ mov r8 = in0;;\r
+ br.ret.dpnt b0;;\r
+.endp AsmFci
\ No newline at end of file
--- /dev/null
+/// @file\r
+/// IPF specific AsmReadCpuid()function\r
+///\r
+/// Copyright (c) 2006, Intel Corporation\r
+/// All rights reserved. This program and the accompanying materials\r
+/// are licensed and made available under the terms and conditions of the BSD License\r
+/// which accompanies this distribution. The full text of the license may be found at\r
+/// http://opensource.org/licenses/bsd-license.php\r
+///\r
+/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+///\r
+/// Module Name: ReadCpuid.s\r
+///\r
+///\r
+\r
+//---------------------------------------------------------------------------------\r
+//++\r
+// AsmReadCpuid\r
+//\r
+// This routine is used to Reads the current value of Processor Identifier Register (CPUID).\r
+//\r
+// Arguments :\r
+//\r
+// On Entry : The 8-bit Processor Identifier Register index to read.\r
+//\r
+// Return Value: The current value of Processor Identifier Register specified by Index.\r
+//\r
+//--\r
+//----------------------------------------------------------------------------------\r
+.text\r
+.type AsmReadCpuid, @function\r
+.proc AsmReadCpuid\r
+.regstk 1, 0, 0, 0\r
+\r
+AsmReadCpuid::\r
+ mov r8 = cpuid[in0];;\r
+ br.ret.dpnt b0;;\r
+.endp AsmReadCpuid\r
+\r