--- /dev/null
+/** @file\r
+Definitions for CPU S3 data.\r
+\r
+Copyright (c) 2013 - 2015, Intel Corporation. All rights reserved.<BR>\r
+This program and the accompanying materials\r
+are licensed and made available under the terms and conditions of the BSD License\r
+which accompanies this distribution. The full text of the license may be found at\r
+http://opensource.org/licenses/bsd-license.php\r
+\r
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+#ifndef _ACPI_CPU_DATA_H_\r
+#define _ACPI_CPU_DATA_H_\r
+\r
+//\r
+// Register types in register table\r
+//\r
+typedef enum _REGISTER_TYPE {\r
+ Msr,\r
+ ControlRegister,\r
+ MemoryMapped,\r
+ CacheControl\r
+} REGISTER_TYPE;\r
+\r
+//\r
+// Element of register table entry\r
+//\r
+typedef struct {\r
+ REGISTER_TYPE RegisterType;\r
+ UINT32 Index;\r
+ UINT8 ValidBitStart;\r
+ UINT8 ValidBitLength;\r
+ UINT64 Value;\r
+} CPU_REGISTER_TABLE_ENTRY;\r
+\r
+//\r
+// Register table definition, including current table length,\r
+// allocated size of this table, and pointer to the list of table entries.\r
+//\r
+typedef struct {\r
+ UINT32 TableLength;\r
+ UINT32 NumberBeforeReset;\r
+ UINT32 AllocatedSize;\r
+ UINT32 InitialApicId;\r
+ CPU_REGISTER_TABLE_ENTRY *RegisterTableEntry;\r
+} CPU_REGISTER_TABLE;\r
+\r
+typedef struct {\r
+ EFI_PHYSICAL_ADDRESS StartupVector;\r
+ EFI_PHYSICAL_ADDRESS GdtrProfile;\r
+ EFI_PHYSICAL_ADDRESS IdtrProfile;\r
+ EFI_PHYSICAL_ADDRESS StackAddress;\r
+ UINT32 StackSize;\r
+ UINT32 NumberOfCpus;\r
+ EFI_PHYSICAL_ADDRESS MtrrTable;\r
+ //\r
+ // Physical address of a CPU_REGISTER_TABLE structure\r
+ //\r
+ EFI_PHYSICAL_ADDRESS PreSmmInitRegisterTable;\r
+ //\r
+ // Physical address of a CPU_REGISTER_TABLE structure\r
+ //\r
+ EFI_PHYSICAL_ADDRESS RegisterTable;\r
+ EFI_PHYSICAL_ADDRESS ApMachineCheckHandlerBase;\r
+ UINT32 ApMachineCheckHandlerSize;\r
+} ACPI_CPU_DATA;\r
+\r
+#endif\r