UefiCpuPkg: Update SmmCpuFeatureLib pass XCODE5 tool chain

https://bugzilla.tianocore.org/show_bug.cgi?id=849

In V2, use "mov rax, strict qword 0" to replace the hard code db.

1. Use lea instruction to get the address instead of mov instruction.
2. Use the dummy address as jmp destination, and add the logic to fix up
the address to the absolute address at boot time.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Liming Gao <liming.gao@intel.com>
Cc: Andrew Fish <afish@apple.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>

diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmiEntry.nasm b/UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmiEntry.nasm
index 00c0f0672c0b1dc62d71ae00ca8a1cf970660ffc..057ec6d10582aa6fde200120fa0384c7dfffffeb 100644 (file)
--- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmiEntry.nasm
+++ b/UefiCpuPkg/Library/SmmCpuFeaturesLib/Ia32/SmiEntry.nasm
@@ -1,5 +1,5 @@
 ;------------------------------------------------------------------------------ ;\r
 ;------------------------------------------------------------------------------ ;\r

-; Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.<BR>\r
+; Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>\r

 ; This program and the accompanying materials\r
 ; are licensed and made available under the terms and conditions of the BSD License\r
 ; which accompanies this distribution.  The full text of the license may be found at\r
 ; This program and the accompanying materials\r
 ; are licensed and made available under the terms and conditions of the BSD License\r
 ; which accompanies this distribution.  The full text of the license may be found at\r


@@ -273,3 +273,7 @@ _StmSmiHandler:
 \r
 ASM_PFX(gcStmSmiHandlerSize)   : DW        $ - _StmSmiEntryPoint\r
 ASM_PFX(gcStmSmiHandlerOffset) : DW        _StmSmiHandler - _StmSmiEntryPoint\r
 \r
 ASM_PFX(gcStmSmiHandlerSize)   : DW        $ - _StmSmiEntryPoint\r
 ASM_PFX(gcStmSmiHandlerOffset) : DW        _StmSmiHandler - _StmSmiEntryPoint\r

+\r
+global ASM_PFX(SmmCpuFeaturesLibStmSmiEntryFixupAddress)\r
+ASM_PFX(SmmCpuFeaturesLibStmSmiEntryFixupAddress):\r
+    ret\r

diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.c b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.c
index 45015b8da42edb0c4f54302aa191e591573ebf98..8dc2d70527723fdd12114c3a8f2764faefdba5f5 100644 (file)
--- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.c
+++ b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.c
@@ -1,7 +1,7 @@
 /** @file\r
   SMM STM support functions\r
 \r
 /** @file\r
   SMM STM support functions\r
 \r

-  Copyright (c) 2015 - 2017, Intel Corporation. All rights reserved.<BR>\r
+  Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.<BR>\r

   This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
   which accompanies this distribution.  The full text of the license may be found at\r
   This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
   which accompanies this distribution.  The full text of the license may be found at\r


@@ -116,7 +116,6 @@ UINTN  mMsegSize = 0;
 \r
 BOOLEAN  mStmConfigurationTableInitialized = FALSE;\r
 \r
 \r
 BOOLEAN  mStmConfigurationTableInitialized = FALSE;\r
 \r

-\r

 /**\r
   The constructor function\r
 \r
 /**\r
   The constructor function\r
 \r


@@ -138,6 +137,11 @@ SmmCpuFeaturesLibStmConstructor (
   EFI_HOB_GUID_TYPE       *GuidHob;\r
   EFI_SMRAM_DESCRIPTOR    *SmramDescriptor;\r
 \r
   EFI_HOB_GUID_TYPE       *GuidHob;\r
   EFI_SMRAM_DESCRIPTOR    *SmramDescriptor;\r
 \r

+  //\r
+  // Initialize address fixup\r
+  //\r
+  SmmCpuFeaturesLibStmSmiEntryFixupAddress ();\r
+\r

   //\r
   // Call the common constructor function\r
   //\r
   //\r
   // Call the common constructor function\r
   //\r

diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.h b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.h
index 92a4dc00ebc50f3890f771a89f7fe106d495a55f..c98b660ecb318884aa243d550ede7f99dcd31c68 100644 (file)
--- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.h
+++ b/UefiCpuPkg/Library/SmmCpuFeaturesLib/SmmStm.h
@@ -1,7 +1,7 @@
 /** @file\r
   SMM STM support\r
 \r
 /** @file\r
   SMM STM support\r
 \r

-  Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>\r
+  Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.<BR>\r

   This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
   which accompanies this distribution.  The full text of the license may be found at\r
   This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
   which accompanies this distribution.  The full text of the license may be found at\r


@@ -173,4 +173,13 @@ GetStmResource (
   VOID\r
   );\r
 \r
   VOID\r
   );\r
 \r

+/**\r
+  This function fixes up the address of the global variable or function\r
+  referred in SmiEntry assembly files to be the absoute address.\r
+**/\r
+VOID\r
+EFIAPI\r
+SmmCpuFeaturesLibStmSmiEntryFixupAddress (\r
+ );\r
+\r

 #endif\r
 #endif\r

diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiEntry.nasm b/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiEntry.nasm
index ea2d2970bdd0391d6e33e8a8238494e48e00d835..90a9fd489b40dd5654d8f39ec869f04db4dbaf1d 100644 (file)
--- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiEntry.nasm
+++ b/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiEntry.nasm
@@ -1,5 +1,5 @@
 ;------------------------------------------------------------------------------ ;\r
 ;------------------------------------------------------------------------------ ;\r

-; Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.<BR>\r
+; Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>\r

 ; This program and the accompanying materials\r
 ; are licensed and made available under the terms and conditions of the BSD License\r
 ; which accompanies this distribution.  The full text of the license may be found at\r
 ; This program and the accompanying materials\r
 ; are licensed and made available under the terms and conditions of the BSD License\r
 ; which accompanies this distribution.  The full text of the license may be found at\r


@@ -164,7 +164,8 @@ Base:
     mov     cr0, rbx\r
     retf\r
 @LongMode:                              ; long mode (64-bit code) starts here\r
     mov     cr0, rbx\r
     retf\r
 @LongMode:                              ; long mode (64-bit code) starts here\r

-    mov     rax, ASM_PFX(gStmSmiHandlerIdtr)\r
+    mov     rax, strict qword 0         ;  mov     rax, ASM_PFX(gStmSmiHandlerIdtr)\r
+StmSmiEntrySmiHandlerIdtrAbsAddr:\r

     lidt    [rax]\r
     lea     ebx, [rdi + DSC_OFFSET]\r
     mov     ax, [rbx + DSC_DS]\r
     lidt    [rax]\r
     lea     ebx, [rdi + DSC_OFFSET]\r
     mov     ax, [rbx + DSC_DS]\r


@@ -175,7 +176,9 @@ Base:
     mov     gs, eax\r
     mov     ax, [rbx + DSC_SS]\r
     mov     ss, eax\r
     mov     gs, eax\r
     mov     ax, [rbx + DSC_SS]\r
     mov     ss, eax\r

-\r
+    mov     rax, strict qword 0           ;   mov     rax, CommonHandler\r
+StmSmiEntryCommonHandlerAbsAddr:\r
+    jmp     rax\r

 CommonHandler:\r
     mov     rbx, [rsp + 0x08]             ; rbx <- CpuIndex\r
 \r
 CommonHandler:\r
     mov     rbx, [rsp + 0x08]             ; rbx <- CpuIndex\r
 \r


@@ -188,16 +191,13 @@ CommonHandler:
     add     rsp, -0x20\r
 \r
     mov     rcx, rbx\r
     add     rsp, -0x20\r
 \r
     mov     rcx, rbx\r

-    mov     rax, ASM_PFX(CpuSmmDebugEntry)\r
-    call    rax\r
+    call    ASM_PFX(CpuSmmDebugEntry)\r

 \r
     mov     rcx, rbx\r
 \r
     mov     rcx, rbx\r

-    mov     rax, ASM_PFX(SmiRendezvous)          ; rax <- absolute addr of SmiRedezvous\r
-    call    rax\r
+    call    ASM_PFX(SmiRendezvous)\r

 \r
     mov     rcx, rbx\r
 \r
     mov     rcx, rbx\r

-    mov     rax, ASM_PFX(CpuSmmDebugExit)\r
-    call    rax\r
+    call    ASM_PFX(CpuSmmDebugExit)\r

 \r
     add     rsp, 0x20\r
 \r
 \r
     add     rsp, 0x20\r
 \r


@@ -208,7 +208,7 @@ CommonHandler:
 \r
     add     rsp, 0x200\r
 \r
 \r
     add     rsp, 0x200\r
 \r

-    mov     rax, ASM_PFX(gStmXdSupported)\r
+    lea     rax, [ASM_PFX(gStmXdSupported)]\r

     mov     al, [rax]\r
     cmp     al, 0\r
     jz      .1\r
     mov     al, [rax]\r
     cmp     al, 0\r
     jz      .1\r


@@ -228,7 +228,7 @@ _StmSmiHandler:
 ; Check XD disable bit\r
 ;\r
     xor     r8, r8\r
 ; Check XD disable bit\r
 ;\r
     xor     r8, r8\r

-    mov     rax, ASM_PFX(gStmXdSupported)\r
+    lea     rax, [ASM_PFX(gStmXdSupported)]\r

     mov     al, [rax]\r
     cmp     al, 0\r
     jz      @StmXdDone\r
     mov     al, [rax]\r
     cmp     al, 0\r
     jz      @StmXdDone\r


@@ -249,8 +249,8 @@ _StmSmiHandler:
 \r
     ; below step is needed, because STM does not run above code.\r
     ; we have to run below code to set IDT/CR0/CR4\r
 \r
     ; below step is needed, because STM does not run above code.\r
     ; we have to run below code to set IDT/CR0/CR4\r

-\r
-    mov     rax, ASM_PFX(gStmSmiHandlerIdtr)\r
+    mov     rax, strict qword 0        ;  mov     rax, ASM_PFX(gStmSmiHandlerIdtr)\r
+StmSmiHandlerIdtrAbsAddr:\r

     lidt    [rax]\r
 \r
     mov     rax, cr0\r
     lidt    [rax]\r
 \r
     mov     rax, cr0\r


@@ -264,3 +264,16 @@ _StmSmiHandler:
 \r
 ASM_PFX(gcStmSmiHandlerSize)   : DW      $ - _StmSmiEntryPoint\r
 ASM_PFX(gcStmSmiHandlerOffset) : DW      _StmSmiHandler - _StmSmiEntryPoint\r
 \r
 ASM_PFX(gcStmSmiHandlerSize)   : DW      $ - _StmSmiEntryPoint\r
 ASM_PFX(gcStmSmiHandlerOffset) : DW      _StmSmiHandler - _StmSmiEntryPoint\r

+\r
+global ASM_PFX(SmmCpuFeaturesLibStmSmiEntryFixupAddress)\r
+ASM_PFX(SmmCpuFeaturesLibStmSmiEntryFixupAddress):\r
+    lea    rax, [ASM_PFX(gStmSmiHandlerIdtr)]\r
+    lea    rcx, [StmSmiEntrySmiHandlerIdtrAbsAddr]\r
+    mov    qword [rcx - 8], rax\r
+    lea    rcx, [StmSmiHandlerIdtrAbsAddr]\r
+    mov    qword [rcx - 8], rax\r
+\r
+    lea    rax, [CommonHandler]\r
+    lea    rcx, [StmSmiEntryCommonHandlerAbsAddr]\r
+    mov    qword [rcx - 8], rax\r
+    ret\r

diff --git a/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiException.nasm b/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiException.nasm
index ce9d7c2bb64e7ecc48755f57bd7d335335712944..b0ab87b0d4e537725a8ea727e252c75e748d6bcb 100644 (file)
--- a/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiException.nasm
+++ b/UefiCpuPkg/Library/SmmCpuFeaturesLib/X64/SmiException.nasm
@@ -1,5 +1,5 @@
 ;------------------------------------------------------------------------------ ;\r
 ;------------------------------------------------------------------------------ ;\r

-; Copyright (c) 2016 - 2017, Intel Corporation. All rights reserved.<BR>\r
+; Copyright (c) 2016 - 2018, Intel Corporation. All rights reserved.<BR>\r

 ; This program and the accompanying materials\r
 ; are licensed and made available under the terms and conditions of the BSD License\r
 ; which accompanies this distribution.  The full text of the license may be found at\r
 ; This program and the accompanying materials\r
 ; are licensed and made available under the terms and conditions of the BSD License\r
 ; which accompanies this distribution.  The full text of the license may be found at\r


@@ -95,7 +95,7 @@ ASM_PFX(OnStmSetup):
 ; Check XD disable bit\r
 ;\r
     xor     r8, r8\r
 ; Check XD disable bit\r
 ;\r
     xor     r8, r8\r

-    mov     rax, ASM_PFX(gStmXdSupported)\r
+    lea     rax, [ASM_PFX(gStmXdSupported)]\r

     mov     al, [rax]\r
     cmp     al, 0\r
     jz      @StmXdDone1\r
     mov     al, [rax]\r
     cmp     al, 0\r
     jz      @StmXdDone1\r


@@ -118,7 +118,7 @@ ASM_PFX(OnStmSetup):
   call ASM_PFX(SmmStmSetup)\r
   add  rsp, 0x20\r
 \r
   call ASM_PFX(SmmStmSetup)\r
   add  rsp, 0x20\r
 \r

-    mov     rax, ASM_PFX(gStmXdSupported)\r
+    lea     rax, [ASM_PFX(gStmXdSupported)]\r

     mov     al, [rax]\r
     cmp     al, 0\r
     jz      .11\r
     mov     al, [rax]\r
     cmp     al, 0\r
     jz      .11\r


@@ -139,7 +139,7 @@ ASM_PFX(OnStmTeardown):
 ; Check XD disable bit\r
 ;\r
     xor     r8, r8\r
 ; Check XD disable bit\r
 ;\r
     xor     r8, r8\r

-    mov     rax, ASM_PFX(gStmXdSupported)\r
+    lea     rax, [ASM_PFX(gStmXdSupported)]\r

     mov     al, [rax]\r
     cmp     al, 0\r
     jz      @StmXdDone2\r
     mov     al, [rax]\r
     cmp     al, 0\r
     jz      @StmXdDone2\r


@@ -162,7 +162,7 @@ ASM_PFX(OnStmTeardown):
   call ASM_PFX(SmmStmTeardown)\r
   add  rsp, 0x20\r
 \r
   call ASM_PFX(SmmStmTeardown)\r
   add  rsp, 0x20\r
 \r

-    mov     rax, ASM_PFX(gStmXdSupported)\r
+    lea     rax, [ASM_PFX(gStmXdSupported)]\r

     mov     al, [rax]\r
     cmp     al, 0\r
     jz      .12\r
     mov     al, [rax]\r
     cmp     al, 0\r
     jz      .12\r