UefiCpuPkg/PiSmmCpuDxeSmm: Allocate buffer for global semaphores

Get semaphores alignment/size requirement and allocate aligned
buffer for all global spin lock and semaphores.

Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Feng Tian <feng.tian@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Feng Tian <feng.tian@intel.com>
Reviewed-by: Michael Kinney <michael.d.kinney@intel.com>
Regression-tested-by: Laszlo Ersek <lersek@redhat.com>

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
index 952cc87a202649b3fff71b5bd838e965175188c8..aa25f3ea4751b7fb96e8e53ff63172865824ccda 100644 (file)
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c
@@ -21,6 +21,8 @@ UINT64                                      gSmiMtrrs[MTRR_NUMBER_OF_FIXED_MTRR
 UINT64                                      gPhyMask;\r
 SMM_DISPATCHER_MP_SYNC_DATA                 *mSmmMpSyncData = NULL;\r
 UINTN                                       mSmmMpSyncDataSize;\r
+SMM_CPU_SEMAPHORES                          mSmmCpuSemaphores;\r
+UINTN                                       mSemaphoreSize;\r
 \r
 /**\r
   Performs an atomic compare exchange operation to get semaphore.\r
@@ -1193,6 +1195,48 @@ Exit:
   AsmWriteCr2 (Cr2);\r
 }\r
 \r
+/**\r
+  Allocate buffer for all semaphores and spin locks.\r
+\r
+**/\r
+VOID\r
+InitializeSmmCpuSemaphores (\r
+  VOID\r
+  )\r
+{\r
+  UINTN                      ProcessorCount;\r
+  UINTN                      TotalSize;\r
+  UINTN                      GlobalSemaphoresSize;\r
+  UINTN                      SemaphoreSize;\r
+  UINTN                      Pages;\r
+  UINTN                      *SemaphoreBlock;\r
+  UINTN                      SemaphoreAddr;\r
+\r
+  SemaphoreSize   = GetSpinLockProperties ();\r
+  ProcessorCount = gSmmCpuPrivate->SmmCoreEntryContext.NumberOfCpus;\r
+  GlobalSemaphoresSize = (sizeof (SMM_CPU_SEMAPHORE_GLOBAL) / sizeof (VOID *)) * SemaphoreSize;\r
+  TotalSize = GlobalSemaphoresSize;\r
+  DEBUG((EFI_D_INFO, "One Semaphore Size    = 0x%x\n", SemaphoreSize));\r
+  DEBUG((EFI_D_INFO, "Total Semaphores Size = 0x%x\n", TotalSize));\r
+  Pages = EFI_SIZE_TO_PAGES (TotalSize);\r
+  SemaphoreBlock = AllocatePages (Pages);\r
+  ASSERT (SemaphoreBlock != NULL);\r
+  ZeroMem (SemaphoreBlock, TotalSize);\r
+\r
+  SemaphoreAddr = (UINTN)SemaphoreBlock;\r
+  mSmmCpuSemaphores.SemaphoreGlobal.Counter       = (UINT32 *)SemaphoreAddr;\r
+  SemaphoreAddr += SemaphoreSize;\r
+  mSmmCpuSemaphores.SemaphoreGlobal.InsideSmm     = (BOOLEAN *)SemaphoreAddr;\r
+  SemaphoreAddr += SemaphoreSize;\r
+  mSmmCpuSemaphores.SemaphoreGlobal.AllCpusInSync = (BOOLEAN *)SemaphoreAddr;\r
+  SemaphoreAddr += SemaphoreSize;\r
+  mSmmCpuSemaphores.SemaphoreGlobal.PFLock        = (SPIN_LOCK *)SemaphoreAddr;\r
+  SemaphoreAddr += SemaphoreSize;\r
+  mSmmCpuSemaphores.SemaphoreGlobal.CodeAccessCheckLock\r
+                                                  = (SPIN_LOCK *)SemaphoreAddr;\r
+\r
+  mSemaphoreSize = SemaphoreSize;\r
+}\r
 \r
 /**\r
   Initialize un-cacheable data.\r
@@ -1215,6 +1259,8 @@ InitializeMpSyncData (
       mSmmMpSyncData->BspIndex = (UINT32)-1;\r
     }\r
     mSmmMpSyncData->EffectiveSyncMode = (SMM_CPU_SYNC_MODE) PcdGet8 (PcdCpuSmmSyncMode);\r
+\r
+    InitializeSmmCpuSemaphores ();\r
   }\r
 }\r
 \r

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
index 94a9345d11a714853bc5f4f314debb2152518ab6..f846e190ba7de3672734898db22f315630b8886e 100644 (file)
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h
@@ -354,6 +354,25 @@ typedef struct {
   UINT64                            MtrrBaseMaskPtr;        // Offset 0x58\r
 } PROCESSOR_SMM_DESCRIPTOR;\r
 \r
+\r
+///\r
+/// All global semaphores' pointer\r
+///\r
+typedef struct {\r
+  volatile UINT32      *Counter;\r
+  volatile BOOLEAN     *InsideSmm;\r
+  volatile BOOLEAN     *AllCpusInSync;\r
+  SPIN_LOCK            *PFLock;\r
+  SPIN_LOCK            *CodeAccessCheckLock;\r
+} SMM_CPU_SEMAPHORE_GLOBAL;\r
+\r
+///\r
+/// All semaphores' information\r
+///\r
+typedef struct {\r
+  SMM_CPU_SEMAPHORE_GLOBAL          SemaphoreGlobal;\r
+} SMM_CPU_SEMAPHORES;\r
+\r
 extern IA32_DESCRIPTOR                     gcSmiGdtr;\r
 extern IA32_DESCRIPTOR                     gcSmiIdtr;\r
 extern VOID                                *gcSmiIdtrPtr;\r