-//\r
-// ATA Commands Code\r
-//\r
-#define ATA_INITIALIZE_DEVICE 0x91\r
-\r
-//\r
-// Class 1\r
-//\r
-#define IDENTIFY_DRIVE_CMD 0xec\r
-#define READ_BUFFER_CMD 0xe4\r
-#define READ_SECTORS_CMD 0x20\r
-#define READ_SECTORS_WITH_RETRY_CMD 0x21\r
-#define READ_LONG_CMD 0x22\r
-#define READ_LONG_WITH_RETRY_CMD 0x23\r
-//\r
-// Class 1 - Atapi6 enhanced commands\r
-//\r
-#define READ_SECTORS_EXT_CMD 0x24\r
-\r
-//\r
-// Class 2\r
-//\r
-#define FORMAT_TRACK_CMD 0x50\r
-#define WRITE_BUFFER_CMD 0xe8\r
-#define WRITE_SECTORS_CMD 0x30\r
-#define WRITE_SECTORS_WITH_RETRY_CMD 0x31\r
-#define WRITE_LONG_CMD 0x32\r
-#define WRITE_LONG_WITH_RETRY_CMD 0x33\r
-#define WRITE_VERIFY_CMD 0x3c\r
-//\r
-// Class 2 - Atapi6 enhanced commands\r
-//\r
-#define WRITE_SECTORS_EXT_CMD 0x34\r
-\r
-//\r
-// Class 3\r
-//\r
-#define ACK_MEDIA_CHANGE_CMD 0xdb\r
-#define BOOT_POST_BOOT_CMD 0xdc\r
-#define BOOT_PRE_BOOT_CMD 0xdd\r
-#define CHECK_POWER_MODE_CMD 0x98\r
-#define CHECK_POWER_MODE_CMD_ALIAS 0xe5\r
-#define DOOR_LOCK_CMD 0xde\r
-#define DOOR_UNLOCK_CMD 0xdf\r
-#define EXEC_DRIVE_DIAG_CMD 0x90\r
-#define IDLE_CMD_ALIAS 0x97\r
-#define IDLE_CMD 0xe3\r
-#define IDLE_IMMEDIATE_CMD 0x95\r
-#define IDLE_IMMEDIATE_CMD_ALIAS 0xe1\r
-#define INIT_DRIVE_PARAM_CMD 0x91\r
-#define RECALIBRATE_CMD 0x10 /* aliased to 1x */\r
-#define READ_DRIVE_STATE_CMD 0xe9\r
-#define SET_MULTIPLE_MODE_CMD 0xC6\r
-#define READ_DRIVE_STATE_CMD 0xe9\r
-#define READ_VERIFY_CMD 0x40\r
-#define READ_VERIFY_WITH_RETRY_CMD 0x41\r
-#define SEEK_CMD 0x70 /* aliased to 7x */\r
-#define SET_FEATURES_CMD 0xef\r
-#define STANDBY_CMD 0x96\r
-#define STANDBY_CMD_ALIAS 0xe2\r
-#define STANDBY_IMMEDIATE_CMD 0x94\r
-#define STANDBY_IMMEDIATE_CMD_ALIAS 0xe0\r
-\r
-//\r
-// Class 4\r
-//\r
-#define READ_DMA_CMD 0xc8\r
-#define READ_DMA_WITH_RETRY_CMD 0xc9\r
-#define READ_DMA_EXT_CMD 0x25\r
-#define WRITE_DMA_CMD 0xca\r
-#define WRITE_DMA_WITH_RETRY_CMD 0xcb\r
-#define WRITE_DMA_EXT_CMD 0x35\r
-\r
-//\r
-// Class 5\r
-//\r
-#define READ_MULTIPLE_CMD 0xc4\r
-#define REST_CMD 0xe7\r
-#define RESTORE_DRIVE_STATE_CMD 0xea\r
-#define SET_SLEEP_MODE_CMD 0x99\r
-#define SET_SLEEP_MODE_CMD_ALIAS 0xe6\r
-#define WRITE_MULTIPLE_CMD 0xc5\r
-#define WRITE_SAME_CMD 0xe9\r
-\r
-//\r
-// Class 6 - Host protected area access feature set\r
-//\r
-#define READ_NATIVE_MAX_ADDRESS_CMD 0xf8\r
-#define SET_MAX_ADDRESS_CMD 0xf9\r
-\r
-//\r
-// Class 6 - ATA/ATAPI-6 enhanced commands\r
-//\r
-#define READ_NATIVE_MAX_ADDRESS_EXT_CMD 0x27\r
-#define SET_MAX_ADDRESS_CMD_EXT 0x37\r
-\r
-//\r
-// Class 6 - SET_MAX related sub command (in feature register)\r
-//\r
-#define PARTIES_SET_MAX_ADDRESS_SUB_CMD 0x00\r
-#define PARTIES_SET_PASSWORD_SUB_CMD 0x01\r
-#define PARTIES_LOCK_SUB_CMD 0x02\r
-#define PARTIES_UNLOCK_SUB_CMD 0x03\r
-#define PARTIES_FREEZE_SUB_CMD 0x04\r
-\r
-//\r
-// S.M.A.R.T\r
-//\r
-#define ATA_SMART_CMD 0xb0\r
-#define ATA_CONSTANT_C2 0xc2\r
-#define ATA_CONSTANT_4F 0x4f\r
-#define ATA_SMART_ENABLE_OPERATION 0xd8\r
-#define ATA_SMART_RETURN_STATUS 0xda\r
-\r
-//\r
-// Error codes for Exec Drive Diag\r
-//\r
-#define DRIV_DIAG_NO_ERROR (0x01)\r
-#define DRIV_DIAG_FORMATTER_ERROR (0x02)\r
-#define DRIV_DIAG_DATA_BUFFER_ERROR (0x03)\r
-#define DRIV_DIAG_ECC_CKT_ERRROR (0x04)\r
-#define DRIV_DIAG_UP_ERROR (0x05)\r
-#define DRIV_DIAG_SLAVE_DRV_ERROR (0x80) /* aliased to 0x8x */\r
-\r
-//\r
-// Codes for Format Track\r
-//\r
-#define FORMAT_GOOD_SECTOR (0x00)\r
-#define FORMAT_SUSPEND_ALLOC (0x01)\r
-#define FORMAT_REALLOC_SECTOR (0x02)\r
-#define FORMAT_MARK_SECTOR_DEFECTIVE (0x03)\r
-\r
-//\r
-// IDE_IDENTIFY bits\r
-// config bits :\r
-//\r
-#define ID_CONFIG_RESERVED0 bit0\r
-#define ID_CONFIG_HARD_SECTORED_DRIVE bit1\r
-#define ID_CONFIG_SOFT_SECTORED_DRIVE bit2\r
-#define ID_CONFIG_NON_MFM bit3\r
-#define ID_CONFIG_15uS_HEAD_SWITCHING bit4\r
-#define ID_CONFIG_SPINDLE_MOTOR_CONTROL bit5\r
-#define ID_CONFIG_HARD_DRIVE bit6\r
-#define ID_CONFIG_CHANGEABLE_MEDIUM bit7\r
-#define ID_CONFIG_DATA_RATE_TO_5MHZ bit8\r
-#define ID_CONFIG_DATA_RATE_5_TO_10MHZ bit9\r
-#define ID_CONFIG_DATA_RATE_ABOVE_10MHZ bit10\r
-#define ID_CONFIG_MOTOR_SPEED_TOLERANCE_ABOVE_0_5_PERC bit11\r
-#define ID_CONFIG_DATA_CLK_OFFSET_AVAIL bit12\r
-#define ID_CONFIG_TRACK_OFFSET_AVAIL bit13\r
-#define ID_CONFIG_SPEED_TOLERANCE_GAP_NECESSARY bit14\r
-#define ID_CONFIG_RESERVED1 bit15\r
-\r
-#define ID_DOUBLE_WORD_IO_POSSIBLE bit01\r
-#define ID_LBA_SUPPORTED bit9\r
-#define ID_DMA_SUPPORTED bit8\r
-\r
-#define SET_FEATURE_ENABLE_8BIT_TRANSFER (0x01)\r
-#define SET_FEATURE_ENABLE_WRITE_CACHE (0x02)\r
-#define SET_FEATURE_TRANSFER_MODE (0x03)\r
-#define SET_FEATURE_WRITE_SAME_WRITE_SPECIFIC_AREA (0x22)\r
-#define SET_FEATURE_DISABLE_RETRIES (0x33)\r
-//\r
-// for Read & Write Longs\r
-//\r
-#define SET_FEATURE_VENDOR_SPEC_ECC_LENGTH (0x44)\r
-#define SET_FEATURE_PLACE_NO_OF_CACHE_SEGMENTS_IN_SECTOR_NO_REG (0x54)\r
-#define SET_FEATURE_DISABLE_READ_AHEAD (0x55)\r
-#define SET_FEATURE_MAINTAIN_PARAM_AFTER_RESET (0x66)\r
-#define SET_FEATURE_DISABLE_ECC (0x77)\r
-#define SET_FEATURE_DISABLE_8BIT_TRANSFER (0x81)\r
-#define SET_FEATURE_DISABLE_WRITE_CACHE (0x82)\r
-#define SET_FEATURE_ENABLE_ECC (0x88)\r
-#define SET_FEATURE_ENABLE_RETRIES (0x99)\r
-#define SET_FEATURE_ENABLE_READ_AHEAD (0xaa)\r
-#define SET_FEATURE_SET_SECTOR_CNT_REG_AS_NO_OF_READ_AHEAD_SECTORS (0xab)\r
-#define SET_FEATURE_ALLOW_REST_MODE (0xac)\r
-//\r
-// for Read & Write Longs\r
-//\r
-#define SET_FEATURE_4BYTE_ECC (0xbb)\r
-#define SET_FEATURE_DEFALUT_FEATURES_ON_SOFTWARE_RESET (0xcc)\r
-#define SET_FEATURE_WRITE_SAME_TO_WRITE_ENTIRE_MEDIUM (0xdd)\r
-\r
-#define BLOCK_TRANSFER_MODE (0x00)\r
-#define SINGLE_WORD_DMA_TRANSFER_MODE (0x10)\r
-#define MULTI_WORD_DMA_TRANSFER_MODE (0x20)\r
-#define TRANSFER_MODE_MASK (0x07) // 3 LSBs\r
-\r
-//\r
-// Drive 0 - Head 0\r
-//\r
-#define DEFAULT_DRIVE (0x00)\r
-#define DEFAULT_CMD (0xa0)\r
-//\r
-// default content of device control register, disable INT\r
-//\r
-#define DEFAULT_CTL (0x0a)\r
-#define DEFAULT_IDE_BM_IO_BASE_ADR (0xffa0)\r