MdeModulePkg/AtaAtapiPassThru: relax PHY detect timeout

The SATA spec mandates that link detection by the PHY completes within
10 ms after receiving a reset signal. However, there is no obligation
to uphold this requirement at the driver end as strictly as we do, and
as it turns out, some combinations of host and device (e.g., Samsung
850 EVO connected to a LeMaker Cello) are only borderline compliant,
which means the device is not detected reliably.

So let's allow for a bit of margin, and increase the PHY detect timeout
value to 15 ms.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Star Zeng <star.zeng@intel.com>

diff --git a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c
index 4d01c1dd7fca2c70d97250e9bace7840135e4d09..b954de81015e219fa558e1e4d2d038e2cf11a224 100644 (file)
--- a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c
+++ b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.c
@@ -2376,8 +2376,7 @@ AhciModeInitialization (
       AhciOrReg (PciIo, Offset, EFI_AHCI_PORT_CMD_FRE);\r
 \r
       //\r
-      // Wait no longer than 10 ms to wait the Phy to detect the presence of a device.\r
-      // It's the requirment from SATA1.0a spec section 5.2.\r
+      // Wait for the Phy to detect the presence of a device.\r
       //\r
       PhyDetectDelay = EFI_AHCI_BUS_PHY_DETECT_TIMEOUT;\r
       Offset = EFI_AHCI_PORT_START + Port * EFI_AHCI_PORT_REG_WIDTH + EFI_AHCI_PORT_SSTS;\r

diff --git a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h
index 6401fb2e9fcdbff4f8b0d6f3dad387b93a4854c5..809bcc307fc4cc84e806230e339ea11ba547ccc5 100644 (file)
--- a/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h
+++ b/MdeModulePkg/Bus/Ata/AtaAtapiPassThru/AhciMode.h
@@ -41,8 +41,9 @@ typedef union {
 \r
 //\r
 // Refer SATA1.0a spec section 5.2, the Phy detection time should be less than 10ms.\r
+// Add a bit of margin for robustness.\r
 //\r
-#define  EFI_AHCI_BUS_PHY_DETECT_TIMEOUT       10\r
+#define  EFI_AHCI_BUS_PHY_DETECT_TIMEOUT       15\r
 //\r
 // Refer SATA1.0a spec, the FIS enable time should be less than 500ms.\r
 //\r