--- /dev/null
+#/** @file
+# Omap35xx SoC package.
+#
+# Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.
+#
+# All rights reserved.
+# This program and the accompanying materials are licensed and made available under
+# the terms and conditions of the BSD License which accompanies this distribution.
+# The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#**/
+
+[Defines]
+ DEC_SPECIFICATION = 0x00010005
+ PACKAGE_NAME = ArmEbPkg
+ PACKAGE_GUID = 44577A0D-361A-45B2-B33D-BB9EE60D5A4F
+ PACKAGE_VERSION = 0.1
+
+################################################################################
+#
+# Include Section - list of Include Paths that are provided by this package.
+# Comments are used for Keywords and Module Types.
+#
+# Supported Module Types:
+# BASE SEC PEI_CORE PEIM DXE_CORE DXE_DRIVER DXE_RUNTIME_DRIVER DXE_SMM_DRIVER DXE_SAL_DRIVER UEFI_DRIVER UEFI_APPLICATION
+#
+################################################################################
+[Includes.common]
+ Include # Root include for the package
+
+[Guids.common]
+ gArmEbTokenSpaceGuid = { 0x44577A0D, 0x361A, 0x45B2, { 0xb3, 0x3d, 0xbb, 0x9e, 0xe6, 0x0d, 0x5a, 0x4f} }
+
+[PcdsFeatureFlag.common]
+
+[PcdsFixedAtBuild.common]
+ gArmEbTokenSpaceGuid.PcdConsoleUart|0x12345678|UINT32|0x00000202
+
--- /dev/null
+#/** @file
+# ARM EB package.
+#
+# Copyright (c) 2009 - 2010, Apple Inc. All rights reserved.
+#
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#**/
+
+################################################################################
+#
+# Defines Section - statements that will be processed to create a Makefile.
+#
+################################################################################
+[Defines]
+ PLATFORM_NAME = ArmEbPkg
+ PLATFORM_GUID = F4C1AD3E-9D3E-4F61-8791-B3BB1C43D04C
+ PLATFORM_VERSION = 0.1
+ DSC_SPECIFICATION = 0x00010005
+ OUTPUT_DIRECTORY = Build/ArmEB
+ SUPPORTED_ARCHITECTURES = ARM
+ BUILD_TARGETS = DEBUG|RELEASE
+ SKUID_IDENTIFIER = DEFAULT
+#
+# Add .fdf file after we get a critical mass of drivers ported over
+# FLASH_DEFINITION = ArmEbPkg/ArmEbPkg.fdf
+ DEFINE TARGET_HACK = DEBUG
+
+
+[LibraryClasses.common]
+!if DEBUG_TARGET == RELEASE
+ DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf
+!else
+ DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf
+!endif
+
+ ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7Lib.inf
+ MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
+
+ BaseLib|MdePkg/Library/BaseLib/BaseLib.inf
+ BaseMemoryLib|MdePkg/Library/BaseMemoryLib/BaseMemoryLib.inf
+
+ PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf
+
+ CacheMaintenanceLib|ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.inf
+ DefaultExceptioHandlerLib|ArmPkg/Library/DefaultExceptionHandlerLib/DefaultExceptionHandlerLib.inf
+ PrePiLib|EmbeddedPkg/Library/PrePiLib/PrePiLib.inf
+
+ RealTimeClockLib|EmbeddedPkg/Library/TemplateRealTimeClockLib/TemplateRealTimeClockLib.inf
+
+ IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf
+
+ MemoryAllocationLib|MdePkg/Library/UefiMemoryAllocationLib/UefiMemoryAllocationLib.inf
+ UefiLib|MdePkg/Library/UefiLib/UefiLib.inf
+ UefiRuntimeServicesTableLib|MdePkg/Library/UefiRuntimeServicesTableLib/UefiRuntimeServicesTableLib.inf
+ DevicePathLib|MdePkg/Library/UefiDevicePathLib/UefiDevicePathLib.inf
+ UefiBootServicesTableLib|MdePkg/Library/UefiBootServicesTableLib/UefiBootServicesTableLib.inf
+
+ DxeServicesTableLib|MdePkg/Library/DxeServicesTableLib/DxeServicesTableLib.inf
+ UefiDriverEntryPoint|MdePkg/Library/UefiDriverEntryPoint/UefiDriverEntryPoint.inf
+ UefiApplicationEntryPoint|MdePkg/Library/UefiApplicationEntryPoint/UefiApplicationEntryPoint.inf
+
+#
+# Assume everything is fixed at build
+#
+ PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
+
+ UefiRuntimeLib|MdePkg/Library/UefiRuntimeLib/UefiRuntimeLib.inf
+
+ # UncachedMemoryAllocationLib|ArmPkg/Library/UncachedMemoryAllocationLib/UncachedMemoryAllocationLib.inf
+ UncachedMemoryAllocationLib|ArmPkg/Library/DebugUncachedMemoryAllocationLib/DebugUncachedMemoryAllocationLib.inf
+
+ CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
+ PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf
+
+ SerialPortLib|ArmEbPkg/Library/SerialPortLib/SerialPortLib.inf
+
+ #
+ # Uncomment (and comment out the next line) For RealView Debugger. The Standard IO window
+ # in the debugger will show load and unload commands for symbols. You can cut and paste this
+ # into the command window to load symbols. We should be able to use a script to do this, but
+ # the version of RVD I have does not support scipts accessing system memory.
+ #
+# PeCoffExtraActionLib|ArmPkg/Library/RvdPeCoffExtraActionLib/RvdPeCoffExtraActionLib.inf
+ PeCoffExtraActionLib|MdePkg/Library/BasePeCoffExtraActionLibNull/BasePeCoffExtraActionLibNull.inf
+
+
+
+[LibraryClasses.common.SEC]
+ ArmLib|ArmPkg/Library/ArmLib/ArmV7/ArmV7LibPrePi.inf
+ PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf
+ ReportStatusCodeLib|IntelFrameworkModulePkg/Library/PeiDxeDebugLibReportStatusCode/PeiDxeDebugLibReportStatusCode.inf
+ UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf
+ ExtractGuidedSectionLib|EmbeddedPkg/Library/PrePiExtractGuidedSectionLib/PrePiExtractGuidedSectionLib.inf
+ LzmaDecompressLib|IntelFrameworkModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompressLib.inf
+ PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf
+
+[LibraryClasses.common.DXE_DRIVER]
+ DxeServicesLib|MdePkg/Library/DxeServicesLib/DxeServicesLib.inf
+
+
+[LibraryClasses.ARM]
+ NULL|ArmPkg/Library/CompilerIntrinsicsLib/CompilerIntrinsicsLib.inf
+
+
+[BuildOptions]
+ XCODE:*_*_ARM_ARCHCC_FLAGS == -arch armv7 -march=armv7
+ XCODE:*_*_ARM_ARCHASM_FLAGS == -arch armv7
+ XCODE:*_*_ARM_ARCHDLINK_FLAGS == -arch armv7
+
+ RVCT:*_*_ARM_ARCHCC_FLAGS == --cpu 7-A
+ RVCT:*_*_ARM_ARCHASM_FLAGS == --cpu 7-A
+
+
+################################################################################
+#
+# Pcd Section - list of all EDK II PCD Entries defined by this Platform
+#
+################################################################################
+
+
+[PcdsFixedAtBuild.common]
+
+# DEBUG_ASSERT_ENABLED 0x01
+# DEBUG_PRINT_ENABLED 0x02
+# DEBUG_CODE_ENABLED 0x04
+# CLEAR_MEMORY_ENABLED 0x08
+# ASSERT_BREAKPOINT_ENABLED 0x10
+# ASSERT_DEADLOOP_ENABLED 0x20
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask|0x2f
+
+# DEBUG_INIT 0x00000001 // Initialization
+# DEBUG_WARN 0x00000002 // Warnings
+# DEBUG_LOAD 0x00000004 // Load events
+# DEBUG_FS 0x00000008 // EFI File system
+# DEBUG_POOL 0x00000010 // Alloc & Free's
+# DEBUG_PAGE 0x00000020 // Alloc & Free's
+# DEBUG_INFO 0x00000040 // Verbose
+# DEBUG_DISPATCH 0x00000080 // PEI/DXE Dispatchers
+# DEBUG_VARIABLE 0x00000100 // Variable
+# DEBUG_BM 0x00000400 // Boot Manager
+# DEBUG_BLKIO 0x00001000 // BlkIo Driver
+# DEBUG_NET 0x00004000 // SNI Driver
+# DEBUG_UNDI 0x00010000 // UNDI Driver
+# DEBUG_LOADFILE 0x00020000 // UNDI Driver
+# DEBUG_EVENT 0x00080000 // Event messages
+# DEBUG_ERROR 0x80000000 // Error
+ gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel|0x80000004
+
+ gEfiMdePkgTokenSpaceGuid.PcdReportStatusCodePropertyMask|0x07
+
+ gEmbeddedTokenSpaceGuid.PcdPrePiTempMemorySize|0
+ gEmbeddedTokenSpaceGuid.PcdPrePiBfvBaseAddress|0
+ gEmbeddedTokenSpaceGuid.PcdPrePiBfvSize|0
+ gEmbeddedTokenSpaceGuid.PcdFlashFvMainBase|0
+ gEmbeddedTokenSpaceGuid.PcdFlashFvMainSize|0
+
+ gEmbeddedTokenSpaceGuid.PcdPrePiHobBase|0x80001000
+ gEmbeddedTokenSpaceGuid.PcdPrePiStackBase|0x87FE0000 # stack at top of memory
+ gEmbeddedTokenSpaceGuid.PcdPrePiStackSize|0x20000 # 128K stack
+ gEmbeddedTokenSpaceGuid.PcdMemoryBase|0x80000000
+ gEmbeddedTokenSpaceGuid.PcdMemorySize|0x10000000
+
+ gArmTokenSpaceGuid.PcdCpuVectorBaseAddress|0x80000000
+ gArmTokenSpaceGuid.PcdCpuResetAddress|0x80008000
+ gArmTokenSpaceGuid.PcdArmUncachedMemoryMask|0x0000000040000000
+
+################################################################################
+#
+# Components Section - list of all EDK II Modules needed by this Platform
+#
+################################################################################
+[Components.common]
+ ArmEbPkg/Library/ResetSystemLib/ResetSystemLib.inf
+ ArmEbPkg/Library/SerialPortLib/SerialPortLib.inf
+# Omap35xxPkg/Library/BeagleBoardTimerLib/BeagleBoardTimerLib.inf
+# Omap35xxPkg/Library/OmapLib/OmapLib.inf
+
+# Omap35xxPkg/Flash/Flash.inf
+# Omap35xxPkg/MMCHSDxe/MMCHS.inf
+# Omap35xxPkg/SmbusDxe/Smbus.inf
+# Omap35xxPkg/Gpio/Gpio.inf
+ ArmEbPkg/Sec/Sec.inf
+ ArmEbPkg/InterruptDxe/InterruptDxe.inf
+# Omap35xxPkg/TimerDxe/TimerDxe.inf
+# Omap35xxPkg/TPS65950Dxe/TPS65950.inf
+
+
+
--- /dev/null
+/*++\r
+\r
+Copyright (c) 2006 - 2009, Intel Corporation \r
+Portions copyright (c) 2009, Hewlett-Packard Company \r
+Portions copyright (c) 2010, Apple, Inc. All rights reserved. \r
+All rights reserved. This program and the accompanying materials \r
+are licensed and made available under the terms and conditions of the BSD License \r
+which accompanies this distribution. The full text of the license may be found at \r
+http://opensource.org/licenses/bsd-license.php \r
+ \r
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+\r
+--*/\r
+\r
+#ifndef __ARM_EB_UART_H__\r
+#define __ARM_EB_UART_H__\r
+\r
+\r
+#define SERIAL_PORT_MAX_TIMEOUT 100000000 // 100 seconds\r
+\r
+\r
+// EB constants\r
+#define EB_UART1_BASE 0x10009000\r
+\r
+// PL011 Registers\r
+#define UARTDR 0x000\r
+#define UARTRSR 0x004\r
+#define UARTECR 0x004\r
+#define UARTFR 0x018\r
+#define UARTILPR 0x020\r
+#define UARTIBRD 0x024\r
+#define UARTFBRD 0x028\r
+#define UARTLCR_H 0x02C\r
+#define UARTCR 0x030\r
+#define UARTIFLS 0x034\r
+#define UARTIMSC 0x038\r
+#define UARTRIS 0x03C\r
+#define UARTMIS 0x040\r
+#define UARTICR 0x044\r
+#define UARTDMACR 0x048\r
+\r
+// If the required baud rate is 115200 and UARTCLK = 24MHz then:\r
+// Baud Rate Divisor = (24×10^6)/(16×115200) = 13.020833\r
+// This means BRDI = 13 and BRDF = 0.020833\r
+// Therefore, fractional part, m = integer(0.020833×64) = integer(1.33331) = 1\r
+// Generated baud rate divider = 13+1/64 = 13.015625\r
+// Generated baud rate = (24×10^6)/(16×13.015625) = 115246.098\r
+// Error = (115246.098-115200)/115200 × 100 = 0.04%\r
+#define UART_115200_IDIV 13\r
+#define UART_115200_FDIV 1\r
+\r
+// add more baud rates here as needed\r
+\r
+// data status bits\r
+#define UART_DATA_ERROR_MASK 0x0F00\r
+\r
+// status reg bits\r
+#define UART_STATUS_ERROR_MASK 0x0F\r
+\r
+// flag reg bits\r
+#define UART_TX_EMPTY_FLAG_MASK 0x80\r
+#define UART_RX_FULL_FLAG_MASK 0x40\r
+#define UART_TX_FULL_FLAG_MASK 0x20\r
+#define UART_RX_EMPTY_FLAG_MASK 0x10\r
+#define UART_BUSY_FLAG_MASK 0x08\r
+\r
+// control reg bits\r
+#define UART_CTSEN_CONTROL_MASK 0x8000\r
+#define UART_RTSEN_CONTROL_MASK 0x4000\r
+#define UART_RTS_CONTROL_MASK 0x0800\r
+#define UART_DTR_CONTROL_MASK 0x0400\r
+\r
+\r
+#endif \r
--- /dev/null
+/** @file\r
+ Portions copyright (c) 2010, Apple Inc. All rights reserved.\r
+ \r
+ All rights reserved. This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions of the BSD License\r
+ which accompanies this distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+/*++\r
+\r
+Copyright (c) 2009, Hewlett-Packard Company \r
+All rights reserved. This program and the accompanying materials \r
+are licensed and made available under the terms and conditions of the BSD License \r
+which accompanies this distribution. The full text of the license may be found at \r
+http://opensource.org/licenses/bsd-license.php \r
+ \r
+THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+\r
+Module Name:\r
+\r
+ Gic.c\r
+\r
+Abstract:\r
+\r
+ Driver implementing the GIC interrupt controller protocol\r
+\r
+--*/\r
+\r
+#include <PiDxe.h>\r
+\r
+#include <Library/BaseLib.h>\r
+#include <Library/DebugLib.h>\r
+#include <Library/BaseMemoryLib.h>\r
+#include <Library/UefiBootServicesTableLib.h>\r
+#include <Library/UefiLib.h>\r
+#include <Library/PcdLib.h>\r
+#include <Library/IoLib.h>\r
+\r
+#include <Protocol/Cpu.h>\r
+#include <Protocol/HardwareInterrupt.h>\r
+\r
+\r
+//\r
+// EB board definitions\r
+//\r
+#define EB_GIC1_CPU_INTF_BASE 0x10040000\r
+#define EB_GIC1_DIST_BASE 0x10041000\r
+#define EB_GIC2_CPU_INTF_BASE 0x10050000\r
+#define EB_GIC2_DIST_BASE 0x10051000\r
+#define EB_GIC3_CPU_INTF_BASE 0x10060000\r
+#define EB_GIC3_DIST_BASE 0x10061000\r
+#define EB_GIC4_CPU_INTF_BASE 0x10070000\r
+#define EB_GIC5_DIST_BASE 0x10071000\r
+\r
+// number of interrupts sources supported by each GIC on the EB\r
+#define EB_NUM_GIC_INTERRUPTS 96 \r
+\r
+// number of 32-bit registers needed to represent those interrupts as a bit\r
+// (used for enable set, enable clear, pending set, pending clear, and active regs)\r
+#define EB_NUM_GIC_REG_PER_INT_BITS (EB_NUM_GIC_INTERRUPTS / 32)\r
+\r
+// number of 32-bit registers needed to represent those interrupts as two bits\r
+// (used for configuration reg)\r
+#define EB_NUM_GIC_REG_PER_INT_CFG (EB_NUM_GIC_INTERRUPTS / 16)\r
+\r
+// number of 32-bit registers needed to represent interrupts as 8-bit priority field\r
+// (used for priority regs)\r
+#define EB_NUM_GIC_REG_PER_INT_BYTES (EB_NUM_GIC_INTERRUPTS / 4)\r
+\r
+#define GIC_DEFAULT_PRIORITY 0x80\r
+\r
+//\r
+// GIC definitions\r
+//\r
+\r
+// Distributor\r
+#define GIC_ICDDCR 0x000 // Distributor Control Register\r
+#define GIC_ICDICTR 0x004 // Interrupt Controller Type Register\r
+#define GIC_ICDIIDR 0x008 // Implementer Identification Register\r
+\r
+// each reg base below repeats for EB_NUM_GIC_REG_PER_INT_BITS (see GIC spec)\r
+#define GIC_ICDISR 0x080 // Interrupt Security Registers\r
+#define GIC_ICDISER 0x100 // Interrupt Set-Enable Registers\r
+#define GIC_ICDICER 0x180 // Interrupt Clear-Enable Registers\r
+#define GIC_ICDSPR 0x200 // Interrupt Set-Pending Registers\r
+#define GIC_ICDCPR 0x280 // Interrupt Clear-Pending Registers\r
+#define GIC_ICDABR 0x300 // Active Bit Registers\r
+\r
+// each reg base below repeats for EB_NUM_GIC_REG_PER_INT_BYTES\r
+#define GIC_ICDIPR 0x400 // Interrupt Priority Registers\r
+\r
+// each reg base below repeats for EB_NUM_GIC_INTERRUPTS\r
+#define GIC_ICDIPTR 0x800 // Interrupt Processor Target Registers\r
+#define GIC_ICDICFR 0xC00 // Interrupt Configuration Registers\r
+\r
+// just one of these\r
+#define GIC_ICDSGIR 0xF00 // Software Generated Interrupt Register\r
+\r
+\r
+// Cpu interface\r
+#define GIC_ICCICR 0x00 // CPU Interface Controler Register\r
+#define GIC_ICCPMR 0x04 // Interrupt Priority Mask Register\r
+#define GIC_ICCBPR 0x08 // Binary Point Register\r
+#define GIC_ICCIAR 0x0C // Interrupt Acknowledge Register\r
+#define GIC_ICCEIOR 0x10 // End Of Interrupt Register\r
+#define GIC_ICCRPR 0x14 // Running Priority Register\r
+#define GIC_ICCPIR 0x18 // Highest Pending Interrupt Register\r
+#define GIC_ICCABPR 0x1C // Aliased Binary Point Register\r
+#define GIC_ICCIDR 0xFC // Identification Register\r
+\r
+extern EFI_HARDWARE_INTERRUPT_PROTOCOL gHardwareInterruptProtocol;\r
+\r
+//\r
+// Notifications\r
+//\r
+VOID *CpuProtocolNotificationToken = NULL;\r
+EFI_EVENT CpuProtocolNotificationEvent = (EFI_EVENT)NULL;\r
+EFI_EVENT EfiExitBootServicesEvent = (EFI_EVENT)NULL;\r
+\r
+\r
+HARDWARE_INTERRUPT_HANDLER gRegisteredInterruptHandlers[EB_NUM_GIC_INTERRUPTS];\r
+\r
+/**\r
+ Register Handler for the specified interrupt source.\r
+\r
+ @param This Instance pointer for this protocol\r
+ @param Source Hardware source of the interrupt\r
+ @param Handler Callback for interrupt. NULL to unregister\r
+\r
+ @retval EFI_SUCCESS Source was updated to support Handler.\r
+ @retval EFI_DEVICE_ERROR Hardware could not be programmed.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+RegisterInterruptSource (\r
+ IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,\r
+ IN HARDWARE_INTERRUPT_SOURCE Source,\r
+ IN HARDWARE_INTERRUPT_HANDLER Handler\r
+ )\r
+{\r
+ if (Source > EB_NUM_GIC_INTERRUPTS) {\r
+ ASSERT(FALSE);\r
+ return EFI_UNSUPPORTED;\r
+ } \r
+ \r
+ if ((Handler == NULL) && (gRegisteredInterruptHandlers[Source] == NULL)) {\r
+ return EFI_INVALID_PARAMETER;\r
+ }\r
+\r
+ if ((Handler != NULL) && (gRegisteredInterruptHandlers[Source] != NULL)) {\r
+ return EFI_ALREADY_STARTED;\r
+ }\r
+\r
+ gRegisteredInterruptHandlers[Source] = Handler;\r
+ return This->EnableInterruptSource(This, Source);\r
+}\r
+\r
+\r
+/**\r
+ Enable interrupt source Source.\r
+\r
+ @param This Instance pointer for this protocol\r
+ @param Source Hardware source of the interrupt\r
+\r
+ @retval EFI_SUCCESS Source interrupt enabled.\r
+ @retval EFI_DEVICE_ERROR Hardware could not be programmed.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+EnableInterruptSource (\r
+ IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,\r
+ IN HARDWARE_INTERRUPT_SOURCE Source\r
+ )\r
+{\r
+ UINT32 RegOffset;\r
+ UINTN RegShift;\r
+ \r
+ if (Source > EB_NUM_GIC_INTERRUPTS) {\r
+ ASSERT(FALSE);\r
+ return EFI_UNSUPPORTED;\r
+ }\r
+ \r
+ // calculate enable register offset and bit position\r
+ RegOffset = Source / 32;\r
+ RegShift = Source % 32;\r
+\r
+ // write set-enable register\r
+ MmioWrite32 (EB_GIC1_DIST_BASE+GIC_ICDISER+(4*RegOffset), 1 << RegShift);\r
+ \r
+ return EFI_SUCCESS;\r
+}\r
+\r
+\r
+/**\r
+ Disable interrupt source Source.\r
+\r
+ @param This Instance pointer for this protocol\r
+ @param Source Hardware source of the interrupt\r
+\r
+ @retval EFI_SUCCESS Source interrupt disabled.\r
+ @retval EFI_DEVICE_ERROR Hardware could not be programmed.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+DisableInterruptSource (\r
+ IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,\r
+ IN HARDWARE_INTERRUPT_SOURCE Source\r
+ )\r
+{\r
+ UINT32 RegOffset;\r
+ UINTN RegShift;\r
+ \r
+ if (Source > EB_NUM_GIC_INTERRUPTS) {\r
+ ASSERT(FALSE);\r
+ return EFI_UNSUPPORTED;\r
+ }\r
+ \r
+ // calculate enable register offset and bit position\r
+ RegOffset = Source / 32;\r
+ RegShift = Source % 32;\r
+\r
+ // write set-enable register\r
+ MmioWrite32 (EB_GIC1_DIST_BASE+GIC_ICDICER+(4*RegOffset), 1 << RegShift);\r
+ \r
+ return EFI_SUCCESS;\r
+}\r
+\r
+\r
+\r
+/**\r
+ Return current state of interrupt source Source.\r
+\r
+ @param This Instance pointer for this protocol\r
+ @param Source Hardware source of the interrupt\r
+ @param InterruptState TRUE: source enabled, FALSE: source disabled.\r
+\r
+ @retval EFI_SUCCESS InterruptState is valid\r
+ @retval EFI_DEVICE_ERROR InterruptState is not valid\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+GetInterruptSourceState (\r
+ IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,\r
+ IN HARDWARE_INTERRUPT_SOURCE Source,\r
+ IN BOOLEAN *InterruptState\r
+ )\r
+{\r
+ UINT32 RegOffset;\r
+ UINTN RegShift;\r
+ \r
+ if (Source > EB_NUM_GIC_INTERRUPTS) {\r
+ ASSERT(FALSE);\r
+ return EFI_UNSUPPORTED;\r
+ }\r
+ \r
+ // calculate enable register offset and bit position\r
+ RegOffset = Source / 32;\r
+ RegShift = Source % 32;\r
+ \r
+ if ((MmioRead32 (EB_GIC1_DIST_BASE+GIC_ICDISER+(4*RegOffset)) & (1<<RegShift)) == 0) {\r
+ *InterruptState = FALSE;\r
+ } else {\r
+ *InterruptState = TRUE;\r
+ }\r
+ \r
+ return EFI_SUCCESS;\r
+}\r
+\r
+/**\r
+ Signal to the hardware that the End Of Intrrupt state \r
+ has been reached.\r
+\r
+ @param This Instance pointer for this protocol\r
+ @param Source Hardware source of the interrupt\r
+\r
+ @retval EFI_SUCCESS Source interrupt EOI'ed.\r
+ @retval EFI_DEVICE_ERROR Hardware could not be programmed.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+EndOfInterrupt (\r
+ IN EFI_HARDWARE_INTERRUPT_PROTOCOL *This,\r
+ IN HARDWARE_INTERRUPT_SOURCE Source\r
+ )\r
+{\r
+ if (Source > EB_NUM_GIC_INTERRUPTS) {\r
+ ASSERT(FALSE);\r
+ return EFI_UNSUPPORTED;\r
+ }\r
+\r
+ MmioWrite32 (EB_GIC1_CPU_INTF_BASE+GIC_ICCEIOR, Source);\r
+ return EFI_SUCCESS;\r
+}\r
+\r
+\r
+/**\r
+ EFI_CPU_INTERRUPT_HANDLER that is called when a processor interrupt occurs.\r
+\r
+ @param InterruptType Defines the type of interrupt or exception that\r
+ occurred on the processor.This parameter is processor architecture specific.\r
+ @param SystemContext A pointer to the processor context when\r
+ the interrupt occurred on the processor.\r
+\r
+ @return None\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+IrqInterruptHandler (\r
+ IN EFI_EXCEPTION_TYPE InterruptType,\r
+ IN EFI_SYSTEM_CONTEXT SystemContext\r
+ )\r
+{\r
+ UINT32 GicInterrupt;\r
+ HARDWARE_INTERRUPT_HANDLER InterruptHandler;\r
+\r
+ GicInterrupt = MmioRead32 (EB_GIC1_CPU_INTF_BASE + GIC_ICCIAR);\r
+ if (GicInterrupt >= EB_NUM_GIC_INTERRUPTS) {\r
+ MmioWrite32 (EB_GIC1_CPU_INTF_BASE+GIC_ICCEIOR, GicInterrupt);\r
+ }\r
+ \r
+ InterruptHandler = gRegisteredInterruptHandlers[GicInterrupt];\r
+ if (InterruptHandler != NULL) {\r
+ // Call the registered interrupt handler.\r
+ InterruptHandler (GicInterrupt, SystemContext);\r
+ } else {\r
+ DEBUG ((EFI_D_ERROR, "Spurious GIC interrupt: %x\n", GicInterrupt));\r
+ }\r
+\r
+ EndOfInterrupt (&gHardwareInterruptProtocol, GicInterrupt);\r
+}\r
+\r
+\r
+//\r
+// Making this global saves a few bytes in image size\r
+//\r
+EFI_HANDLE gHardwareInterruptHandle = NULL;\r
+\r
+//\r
+// The protocol instance produced by this driver\r
+//\r
+EFI_HARDWARE_INTERRUPT_PROTOCOL gHardwareInterruptProtocol = {\r
+ RegisterInterruptSource,\r
+ EnableInterruptSource,\r
+ DisableInterruptSource,\r
+ GetInterruptSourceState,\r
+ EndOfInterrupt\r
+};\r
+\r
+\r
+/**\r
+ Shutdown our hardware\r
+ \r
+ DXE Core will disable interrupts and turn off the timer and disable interrupts\r
+ after all the event handlers have run.\r
+\r
+ @param[in] Event The Event that is being processed\r
+ @param[in] Context Event Context\r
+**/\r
+VOID\r
+EFIAPI\r
+ExitBootServicesEvent (\r
+ IN EFI_EVENT Event,\r
+ IN VOID *Context\r
+ )\r
+{\r
+ UINTN i;\r
+ \r
+ for (i = 0; i < EB_NUM_GIC_INTERRUPTS; i++) {\r
+ DisableInterruptSource (&gHardwareInterruptProtocol, i);\r
+ }\r
+}\r
+\r
+\r
+//\r
+// Notification routines\r
+//\r
+VOID\r
+CpuProtocolInstalledNotification (\r
+ IN EFI_EVENT Event,\r
+ IN VOID *Context\r
+ )\r
+{\r
+ EFI_STATUS Status;\r
+ EFI_CPU_ARCH_PROTOCOL *Cpu;\r
+ \r
+ //\r
+ // Get the cpu protocol that this driver requires.\r
+ //\r
+ Status = gBS->LocateProtocol(&gEfiCpuArchProtocolGuid, NULL, (VOID **)&Cpu);\r
+ ASSERT_EFI_ERROR(Status);\r
+\r
+ //\r
+ // Unregister the default exception handler.\r
+ //\r
+ Status = Cpu->RegisterInterruptHandler(Cpu, EXCEPT_ARM_IRQ, NULL);\r
+ ASSERT_EFI_ERROR(Status);\r
+\r
+ //\r
+ // Register to receive interrupts\r
+ //\r
+ Status = Cpu->RegisterInterruptHandler(Cpu, EXCEPT_ARM_IRQ, IrqInterruptHandler);\r
+ ASSERT_EFI_ERROR(Status);\r
+}\r
+\r
+/**\r
+ Initialize the state information for the CPU Architectural Protocol\r
+\r
+ @param ImageHandle of the loaded driver\r
+ @param SystemTable Pointer to the System Table\r
+\r
+ @retval EFI_SUCCESS Protocol registered\r
+ @retval EFI_OUT_OF_RESOURCES Cannot allocate protocol data structure\r
+ @retval EFI_DEVICE_ERROR Hardware problems\r
+\r
+**/\r
+EFI_STATUS\r
+InterruptDxeInitialize (\r
+ IN EFI_HANDLE ImageHandle,\r
+ IN EFI_SYSTEM_TABLE *SystemTable\r
+ )\r
+{\r
+ EFI_STATUS Status;\r
+ UINTN i;\r
+ UINT32 RegOffset;\r
+ UINTN RegShift;\r
+\r
+ \r
+ // Make sure the Interrupt Controller Protocol is not already installed in the system.\r
+ ASSERT_PROTOCOL_ALREADY_INSTALLED (NULL, &gHardwareInterruptProtocolGuid);\r
+\r
+ for (i = 0; i < EB_NUM_GIC_INTERRUPTS; i++) {\r
+ DisableInterruptSource (&gHardwareInterruptProtocol, i);\r
+ \r
+ // Set Priority \r
+ RegOffset = i / 4;\r
+ RegShift = (i % 4) * 8;\r
+ MmioAndThenOr32 (\r
+ EB_GIC1_DIST_BASE+GIC_ICDIPR+(4*RegOffset), \r
+ ~(0xff << RegShift), \r
+ GIC_DEFAULT_PRIORITY << RegShift\r
+ );\r
+ }\r
+\r
+ // configure interrupts for cpu 0\r
+ for (i = 0; i < EB_NUM_GIC_REG_PER_INT_BYTES; i++) {\r
+ MmioWrite32 (EB_GIC1_DIST_BASE + GIC_ICDIPTR + (i*4), 0x01010101);\r
+ }\r
+\r
+ // set binary point reg to 0x7 (no preemption)\r
+ MmioWrite32 (EB_GIC1_CPU_INTF_BASE + GIC_ICCBPR, 0x7);\r
+\r
+ // set priority mask reg to 0xff to allow all priorities through\r
+ MmioWrite32 (EB_GIC1_CPU_INTF_BASE + GIC_ICCPMR, 0xff);\r
+ \r
+ // enable gic cpu interface\r
+ MmioWrite32 (EB_GIC1_CPU_INTF_BASE + GIC_ICCICR, 0x1);\r
+\r
+ // enable gic distributor\r
+ MmioWrite32 (EB_GIC1_DIST_BASE + GIC_ICCICR, 0x1);\r
+\r
+ \r
+ ZeroMem (&gRegisteredInterruptHandlers, sizeof (gRegisteredInterruptHandlers));\r
+ \r
+ Status = gBS->InstallMultipleProtocolInterfaces (\r
+ &gHardwareInterruptHandle,\r
+ &gHardwareInterruptProtocolGuid, &gHardwareInterruptProtocol,\r
+ NULL\r
+ );\r
+ ASSERT_EFI_ERROR (Status);\r
+ \r
+ // Set up to be notified when the Cpu protocol is installed.\r
+ Status = gBS->CreateEvent (EVT_NOTIFY_SIGNAL, TPL_CALLBACK, CpuProtocolInstalledNotification, NULL, &CpuProtocolNotificationEvent); \r
+ ASSERT_EFI_ERROR (Status);\r
+\r
+ Status = gBS->RegisterProtocolNotify (&gEfiCpuArchProtocolGuid, CpuProtocolNotificationEvent, (VOID *)&CpuProtocolNotificationToken);\r
+ ASSERT_EFI_ERROR (Status);\r
+\r
+ // Register for an ExitBootServicesEvent\r
+ Status = gBS->CreateEvent (EVT_SIGNAL_EXIT_BOOT_SERVICES, TPL_NOTIFY, ExitBootServicesEvent, NULL, &EfiExitBootServicesEvent);\r
+ ASSERT_EFI_ERROR (Status);\r
+\r
+ return Status;\r
+}\r
+\r
--- /dev/null
+#/** @file\r
+# \r
+# Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution. The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+# \r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+# \r
+#**/\r
+\r
+[Defines]\r
+ INF_VERSION = 0x00010005\r
+ BASE_NAME = GicInterruptDxe\r
+ FILE_GUID = A7496828-946E-43BF-97D6-AA0272001899\r
+ MODULE_TYPE = DXE_DRIVER\r
+ VERSION_STRING = 1.0\r
+\r
+ ENTRY_POINT = InterruptDxeInitialize\r
+\r
+\r
+[Sources.common]\r
+ InterruptDxe.c\r
+\r
+\r
+[Packages]\r
+ MdePkg/MdePkg.dec\r
+ EmbeddedPkg/EmbeddedPkg.dec\r
+ ArmEbPkg/ArmEbPkg.dec\r
+\r
+[LibraryClasses]\r
+ BaseLib\r
+ UefiLib\r
+ UefiBootServicesTableLib\r
+ DebugLib\r
+ PrintLib\r
+ UefiDriverEntryPoint\r
+ IoLib\r
+\r
+[Guids]\r
+ \r
+\r
+[Protocols]\r
+ gHardwareInterruptProtocolGuid\r
+ gEfiCpuArchProtocolGuid\r
+ \r
+[FixedPcd.common]\r
+ gEmbeddedTokenSpaceGuid.PcdInterruptBaseAddress\r
+\r
+[depex]\r
+ TRUE\r
--- /dev/null
+/** @file\r
+ Template library implementation to support ResetSystem Runtime call.\r
+ \r
+ Fill in the templates with what ever makes you system reset.\r
+\r
+\r
+ Copyright (c) 2008-2009, Apple Inc. All rights reserved.\r
+ \r
+ All rights reserved. This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions of the BSD License\r
+ which accompanies this distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+\r
+#include <PiDxe.h>\r
+\r
+#include <Library/PcdLib.h>\r
+#include <Library/ArmLib.h>\r
+#include <Library/CacheMaintenanceLib.h>\r
+#include <Library/DebugLib.h>\r
+#include <Library/EfiResetSystemLib.h>\r
+\r
+#include <ArmEbUart.h>\r
+\r
+/**\r
+ Resets the entire platform.\r
+\r
+ @param ResetType The type of reset to perform.\r
+ @param ResetStatus The status code for the reset.\r
+ @param DataSize The size, in bytes, of WatchdogData.\r
+ @param ResetData For a ResetType of EfiResetCold, EfiResetWarm, or\r
+ EfiResetShutdown the data buffer starts with a Null-terminated\r
+ Unicode string, optionally followed by additional binary data.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+LibResetSystem (\r
+ IN EFI_RESET_TYPE ResetType,\r
+ IN EFI_STATUS ResetStatus,\r
+ IN UINTN DataSize,\r
+ IN CHAR16 *ResetData OPTIONAL\r
+ )\r
+{\r
+ if (ResetData != NULL) {\r
+ DEBUG ((EFI_D_ERROR, "%s", ResetData));\r
+ }\r
+\r
+ switch (ResetType) {\r
+ case EfiResetWarm:\r
+ // Map a warm reset into a cold reset\r
+ case EfiResetCold:\r
+ case EfiResetShutdown:\r
+ default:\r
+ break;\r
+ }\r
+\r
+ // If the reset didn't work, return an error.\r
+ ASSERT (FALSE);\r
+ return EFI_DEVICE_ERROR;\r
+}\r
+ \r
+\r
+\r
+/**\r
+ Initialize any infrastructure required for LibResetSystem () to function.\r
+\r
+ @param ImageHandle The firmware allocated handle for the EFI image.\r
+ @param SystemTable A pointer to the EFI System Table.\r
+ \r
+ @retval EFI_SUCCESS The constructor always returns EFI_SUCCESS.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+LibInitializeResetSystem (\r
+ IN EFI_HANDLE ImageHandle,\r
+ IN EFI_SYSTEM_TABLE *SystemTable\r
+ )\r
+{\r
+ return EFI_SUCCESS;\r
+}\r
+\r
--- /dev/null
+#/** @file\r
+# Reset System lib to make it easy to port new platforms\r
+#\r
+# Copyright (c) 2008, Apple Inc.\r
+#\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution. The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+#\r
+#**/\r
+\r
+[Defines]\r
+ INF_VERSION = 0x00010005\r
+ BASE_NAME = ArmEbResetSystemLib\r
+ FILE_GUID = DA6BF954-F0FF-4A1A-88D7-16560B9A9D20\r
+ MODULE_TYPE = BASE\r
+ VERSION_STRING = 1.0\r
+ LIBRARY_CLASS = EfiResetSystemLib\r
+\r
+\r
+[Sources.common]\r
+ ResetSystemLib.c\r
+\r
+[Packages]\r
+ ArmPkg/ArmPkg.dec\r
+ MdePkg/MdePkg.dec\r
+ EmbeddedPkg/EmbeddedPkg.dec\r
+ ArmEbPkg/ArmEbPkg.dec\r
+\r
+[Pcd.common]\r
+ gArmTokenSpaceGuid.PcdCpuResetAddress\r
+ gEmbeddedTokenSpaceGuid.PcdEmbeddedFdBaseAddress\r
+ \r
+[LibraryClasses]\r
+ DebugLib\r
+ BeagleBoardSystemLib\r
--- /dev/null
+/** @file\r
+ Serial I/O Port library functions with no library constructor/destructor\r
+\r
+\r
+ Copyright (c) 2008-2010, Apple Inc. All rights reserved.\r
+ \r
+ All rights reserved. This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions of the BSD License\r
+ which accompanies this distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+#include <Base.h>\r
+#include <Library/DebugLib.h>\r
+#include <Library/SerialPortLib.h>\r
+#include <Library/PcdLib.h>\r
+#include <Library/IoLib.h>\r
+#include <ArmEbUart.h>\r
+\r
+/*\r
+\r
+ Programmed hardware of Serial port.\r
+\r
+ @return Always return EFI_UNSUPPORTED.\r
+\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+SerialPortInitialize (\r
+ VOID\r
+ )\r
+{\r
+ UINT32 Base = PcdGet32 (PcdConsoleUart);\r
+ \r
+ // initialize baud rate generator to 115200 based on EB clock REFCLK24MHZ\r
+ MmioWrite32 (Base + UARTIBRD, UART_115200_IDIV);\r
+ MmioWrite32 (Base + UARTFBRD, UART_115200_FDIV);\r
+\r
+ // no parity, 1 stop, no fifo, 8 data bits\r
+ MmioWrite32 (Base + UARTLCR_H, 0x60);\r
+\r
+ // clear any pending errors\r
+ MmioWrite32 (Base + UARTECR, 0);\r
+\r
+ // enable tx, rx, and uart overall\r
+ MmioWrite32 (Base + UARTCR, 0x301);\r
+\r
+ return RETURN_SUCCESS;\r
+}\r
+\r
+/**\r
+ Write data to serial device.\r
+\r
+ @param Buffer Point of data buffer which need to be writed.\r
+ @param NumberOfBytes Number of output bytes which are cached in Buffer.\r
+\r
+ @retval 0 Write data failed.\r
+ @retval !0 Actual number of bytes writed to serial device.\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+SerialPortWrite (\r
+ IN UINT8 *Buffer,\r
+ IN UINTN NumberOfBytes\r
+)\r
+{\r
+ UINT32 FR = PcdGet32(PcdConsoleUart) + UARTFR;\r
+ UINT32 DR = PcdGet32(PcdConsoleUart) + UARTDR;\r
+ UINTN Count;\r
+ \r
+ for (Count = 0; Count < NumberOfBytes; Count++, Buffer++) {\r
+ while ((MmioRead32 (FR) & UART_TX_EMPTY_FLAG_MASK) != 0);\r
+ MmioWrite8 (DR, *Buffer);\r
+ }\r
+\r
+ return NumberOfBytes;\r
+}\r
+\r
+\r
+/**\r
+ Read data from serial device and save the datas in buffer.\r
+\r
+ @param Buffer Point of data buffer which need to be writed.\r
+ @param NumberOfBytes Number of output bytes which are cached in Buffer.\r
+\r
+ @retval 0 Read data failed.\r
+ @retval !0 Aactual number of bytes read from serial device.\r
+\r
+**/\r
+UINTN\r
+EFIAPI\r
+SerialPortRead (\r
+ OUT UINT8 *Buffer,\r
+ IN UINTN NumberOfBytes\r
+)\r
+{\r
+ UINT32 FR = PcdGet32(PcdConsoleUart) + UARTFR;\r
+ UINT32 DR = PcdGet32(PcdConsoleUart) + UARTDR;\r
+ UINTN Count;\r
+ \r
+ for (Count = 0; Count < NumberOfBytes; Count++, Buffer++) {\r
+ while ((MmioRead32 (FR) & UART_RX_EMPTY_FLAG_MASK) == 0);\r
+ *Buffer = MmioRead8 (DR);\r
+ }\r
+\r
+ return NumberOfBytes;\r
+}\r
+\r
+\r
+/**\r
+ Check to see if any data is avaiable to be read from the debug device.\r
+\r
+ @retval EFI_SUCCESS At least one byte of data is avaiable to be read\r
+ @retval EFI_NOT_READY No data is avaiable to be read\r
+ @retval EFI_DEVICE_ERROR The serial device is not functioning properly\r
+\r
+**/\r
+BOOLEAN\r
+EFIAPI\r
+SerialPortPoll (\r
+ VOID\r
+ )\r
+{\r
+ UINT32 FR = PcdGet32(PcdConsoleUart) + UARTFR;\r
+\r
+ if ((MmioRead32 (FR) & UART_RX_EMPTY_FLAG_MASK) == 0) {\r
+ return TRUE;\r
+ } else {\r
+ return FALSE;\r
+ }\r
+}\r
+\r
--- /dev/null
+#/** @file\r
+# EDK Serial port lib\r
+#\r
+# Copyright (c) 2009, Apple Inc.\r
+#\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution. The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+#\r
+#**/\r
+\r
+[Defines]\r
+ INF_VERSION = 0x00010005\r
+ BASE_NAME = ArmEbSerialPortLib\r
+ FILE_GUID = 3019EF69-DDE6-4E23-A511-1A8C0279345A\r
+ MODULE_TYPE = BASE\r
+ VERSION_STRING = 1.0\r
+ LIBRARY_CLASS = SerialPortLib\r
+\r
+\r
+#\r
+# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
+#\r
+\r
+[Sources.common]\r
+ SerialPortLib.c\r
+\r
+[LibraryClasses]\r
+ DebugLib\r
+ IoLib\r
+\r
+[Packages]\r
+ MdePkg/MdePkg.dec\r
+ ArmEbPkg/ArmEbPkg.dec\r
+ \r
+[FixedPcd]\r
+ gArmEbTokenSpaceGuid.PcdConsoleUart\r
+\r
--- /dev/null
+/** @file\r
+\r
+ Copyright (c) 2008-2009, Apple Inc. All rights reserved.\r
+ \r
+ All rights reserved. This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions of the BSD License\r
+ which accompanies this distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+#include <PiPei.h>\r
+\r
+#include <Library/ArmLib.h>\r
+#include <Library/PrePiLib.h>\r
+#include <Library/PcdLib.h>\r
+\r
+// DDR attributes\r
+#define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK\r
+#define DDR_ATTRIBUTES_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED\r
+\r
+// SoC registers. L3 interconnects\r
+#define SOC_REGISTERS_L3_PHYSICAL_BASE 0x68000000\r
+#define SOC_REGISTERS_L3_PHYSICAL_LENGTH 0x08000000\r
+#define SOC_REGISTERS_L3_ATTRIBUTES ARM_MEMORY_REGION_ATTRIBUTE_DEVICE\r
+\r
+// SoC registers. L4 interconnects\r
+#define SOC_REGISTERS_L4_PHYSICAL_BASE 0x48000000\r
+#define SOC_REGISTERS_L4_PHYSICAL_LENGTH 0x08000000\r
+#define SOC_REGISTERS_L4_ATTRIBUTES ARM_MEMORY_REGION_ATTRIBUTE_DEVICE\r
+\r
+VOID\r
+InitCache (\r
+ IN UINT32 MemoryBase,\r
+ IN UINT32 MemoryLength\r
+ )\r
+{\r
+ UINT32 CacheAttributes;\r
+ ARM_MEMORY_REGION_DESCRIPTOR MemoryTable[5];\r
+ VOID *TranslationTableBase;\r
+ UINTN TranslationTableSize;\r
+\r
+ if (FeaturePcdGet(PcdCacheEnable) == TRUE) {\r
+ CacheAttributes = DDR_ATTRIBUTES_CACHED;\r
+ } else {\r
+ CacheAttributes = DDR_ATTRIBUTES_UNCACHED;\r
+ }\r
+\r
+ // DDR\r
+ MemoryTable[0].PhysicalBase = MemoryBase;\r
+ MemoryTable[0].VirtualBase = MemoryBase;\r
+ MemoryTable[0].Length = MemoryLength;\r
+ MemoryTable[0].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)CacheAttributes;\r
+\r
+ // SOC Registers. L3 interconnects\r
+ MemoryTable[1].PhysicalBase = SOC_REGISTERS_L3_PHYSICAL_BASE;\r
+ MemoryTable[1].VirtualBase = SOC_REGISTERS_L3_PHYSICAL_BASE;\r
+ MemoryTable[1].Length = SOC_REGISTERS_L3_PHYSICAL_LENGTH;\r
+ MemoryTable[1].Attributes = SOC_REGISTERS_L3_ATTRIBUTES;\r
+ \r
+ // SOC Registers. L4 interconnects\r
+ MemoryTable[2].PhysicalBase = SOC_REGISTERS_L4_PHYSICAL_BASE;\r
+ MemoryTable[2].VirtualBase = SOC_REGISTERS_L4_PHYSICAL_BASE;\r
+ MemoryTable[2].Length = SOC_REGISTERS_L4_PHYSICAL_LENGTH;\r
+ MemoryTable[2].Attributes = SOC_REGISTERS_L4_ATTRIBUTES;\r
+\r
+ // End of Table\r
+ MemoryTable[3].PhysicalBase = 0;\r
+ MemoryTable[3].VirtualBase = 0;\r
+ MemoryTable[3].Length = 0;\r
+ MemoryTable[3].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)0;\r
+ \r
+ ArmConfigureMmu (MemoryTable, &TranslationTableBase, &TranslationTableSize);\r
+ \r
+ BuildMemoryAllocationHob ((EFI_PHYSICAL_ADDRESS)(UINTN)TranslationTableBase, TranslationTableSize, EfiBootServicesData);\r
+}\r
--- /dev/null
+/** @file\r
+ LZMA Decompress Library header file\r
+\r
+ Copyright (c) 2006 - 2010, Intel Corporation<BR>\r
+ All rights reserved. This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions of the BSD License\r
+ which accompanies this distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+#ifndef __LZMA_DECOMPRESS_H___\r
+#define __LZMA_DECOMPRESS_H___\r
+\r
+/**\r
+ Examines a GUIDed section and returns the size of the decoded buffer and the\r
+ size of an scratch buffer required to actually decode the data in a GUIDed section.\r
+\r
+ Examines a GUIDed section specified by InputSection. \r
+ If GUID for InputSection does not match the GUID that this handler supports,\r
+ then RETURN_UNSUPPORTED is returned. \r
+ If the required information can not be retrieved from InputSection,\r
+ then RETURN_INVALID_PARAMETER is returned.\r
+ If the GUID of InputSection does match the GUID that this handler supports,\r
+ then the size required to hold the decoded buffer is returned in OututBufferSize,\r
+ the size of an optional scratch buffer is returned in ScratchSize, and the Attributes field\r
+ from EFI_GUID_DEFINED_SECTION header of InputSection is returned in SectionAttribute.\r
+ \r
+ If InputSection is NULL, then ASSERT().\r
+ If OutputBufferSize is NULL, then ASSERT().\r
+ If ScratchBufferSize is NULL, then ASSERT().\r
+ If SectionAttribute is NULL, then ASSERT().\r
+\r
+\r
+ @param[in] InputSection A pointer to a GUIDed section of an FFS formatted file.\r
+ @param[out] OutputBufferSize A pointer to the size, in bytes, of an output buffer required\r
+ if the buffer specified by InputSection were decoded.\r
+ @param[out] ScratchBufferSize A pointer to the size, in bytes, required as scratch space\r
+ if the buffer specified by InputSection were decoded.\r
+ @param[out] SectionAttribute A pointer to the attributes of the GUIDed section. See the Attributes\r
+ field of EFI_GUID_DEFINED_SECTION in the PI Specification.\r
+\r
+ @retval RETURN_SUCCESS The information about InputSection was returned.\r
+ @retval RETURN_UNSUPPORTED The section specified by InputSection does not match the GUID this handler supports.\r
+ @retval RETURN_INVALID_PARAMETER The information can not be retrieved from the section specified by InputSection.\r
+\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+LzmaGuidedSectionGetInfo (\r
+ IN CONST VOID *InputSection,\r
+ OUT UINT32 *OutputBufferSize,\r
+ OUT UINT32 *ScratchBufferSize,\r
+ OUT UINT16 *SectionAttribute\r
+ );\r
+\r
+/**\r
+ Decompress a LZAM compressed GUIDed section into a caller allocated output buffer.\r
+ \r
+ Decodes the GUIDed section specified by InputSection. \r
+ If GUID for InputSection does not match the GUID that this handler supports, then RETURN_UNSUPPORTED is returned. \r
+ If the data in InputSection can not be decoded, then RETURN_INVALID_PARAMETER is returned.\r
+ If the GUID of InputSection does match the GUID that this handler supports, then InputSection\r
+ is decoded into the buffer specified by OutputBuffer and the authentication status of this\r
+ decode operation is returned in AuthenticationStatus. If the decoded buffer is identical to the\r
+ data in InputSection, then OutputBuffer is set to point at the data in InputSection. Otherwise,\r
+ the decoded data will be placed in caller allocated buffer specified by OutputBuffer.\r
+ \r
+ If InputSection is NULL, then ASSERT().\r
+ If OutputBuffer is NULL, then ASSERT().\r
+ If ScratchBuffer is NULL and this decode operation requires a scratch buffer, then ASSERT().\r
+ If AuthenticationStatus is NULL, then ASSERT().\r
+\r
+\r
+ @param[in] InputSection A pointer to a GUIDed section of an FFS formatted file.\r
+ @param[out] OutputBuffer A pointer to a buffer that contains the result of a decode operation. \r
+ @param[out] ScratchBuffer A caller allocated buffer that may be required by this function\r
+ as a scratch buffer to perform the decode operation. \r
+ @param[out] AuthenticationStatus \r
+ A pointer to the authentication status of the decoded output buffer.\r
+ See the definition of authentication status in the EFI_PEI_GUIDED_SECTION_EXTRACTION_PPI\r
+ section of the PI Specification. EFI_AUTH_STATUS_PLATFORM_OVERRIDE must\r
+ never be set by this handler.\r
+\r
+ @retval RETURN_SUCCESS The buffer specified by InputSection was decoded.\r
+ @retval RETURN_UNSUPPORTED The section specified by InputSection does not match the GUID this handler supports.\r
+ @retval RETURN_INVALID_PARAMETER The section specified by InputSection can not be decoded.\r
+\r
+**/\r
+RETURN_STATUS\r
+EFIAPI\r
+LzmaGuidedSectionExtraction (\r
+ IN CONST VOID *InputSection,\r
+ OUT VOID **OutputBuffer,\r
+ OUT VOID *ScratchBuffer, OPTIONAL\r
+ OUT UINT32 *AuthenticationStatus\r
+ );\r
+ \r
+#endif // __LZMADECOMPRESS_H__\r
+\r
--- /dev/null
+#------------------------------------------------------------------------------ \r
+#\r
+# Copyright (c) 2008-2009 Apple Inc. All rights reserved.\r
+#\r
+# All rights reserved. This program and the accompanying materials\r
+# are licensed and made available under the terms and conditions of the BSD License\r
+# which accompanies this distribution. The full text of the license may be found at\r
+# http://opensource.org/licenses/bsd-license.php\r
+#\r
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+#\r
+#------------------------------------------------------------------------------\r
+\r
+#include <AsmMacroIoLib.h>\r
+#include <Library/PcdLib.h>\r
+\r
+.text\r
+.align 3\r
+\r
+.globl ASM_PFX(CEntryPoint)\r
+.globl ASM_PFX(_ModuleEntryPoint)\r
+\r
+ASM_PFX(_ModuleEntryPoint):\r
+\r
+ //\r
+ // Set stack based on PCD values. Need to do it this way to make C code work \r
+ // when it runs from FLASH. \r
+ // \r
+ LoadConstantToReg (FixedPcdGet32(PcdPrePiStackBase) ,r2) /* stack base arg2 */\r
+ LoadConstantToReg (FixedPcdGet32(PcdPrePiStackSize) ,r3) /* stack size arg3 */\r
+ add r4, r2, r3\r
+\r
+ //Enter SVC mode and set up SVC stack pointer\r
+ mov r0,#0x13|0x80|0x40\r
+ msr CPSR_c,r0\r
+ sub r4, r4, #0x400\r
+ mov r13,r4\r
+\r
+ // Call C entry point\r
+ LoadConstantToReg (FixedPcdGet32(PcdMemorySize) ,r1) /* memory size arg1 */\r
+ LoadConstantToReg (FixedPcdGet32(PcdMemoryBase) ,r0) /* memory size arg0 */\r
+\r
+ blx ASM_PFX(CEntryPoint) /* Assume C code is ARM */\r
+\r
+ShouldNeverGetHere:\r
+ /* _CEntryPoint should never return */\r
+ b ShouldNeverGetHere\r
+\r
+ \r
--- /dev/null
+//------------------------------------------------------------------------------ \r
+//\r
+// Copyright (c) 2008-2009 Apple Inc. All rights reserved.\r
+//\r
+// All rights reserved. This program and the accompanying materials\r
+// are licensed and made available under the terms and conditions of the BSD License\r
+// which accompanies this distribution. The full text of the license may be found at\r
+// http://opensource.org/licenses/bsd-license.php\r
+//\r
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+//\r
+//------------------------------------------------------------------------------\r
+\r
+#include <AsmMacroIoLib.h>\r
+#include <Library/PcdLib.h>\r
+#include <AutoGen.h>\r
+ INCLUDE AsmMacroIoLib.inc\r
+ \r
+ IMPORT CEntryPoint\r
+ EXPORT _ModuleEntryPoint\r
+ \r
+ PRESERVE8\r
+ AREA ModuleEntryPoint, CODE, READONLY\r
+ \r
+\r
+_ModuleEntryPoint\r
+ \r
+\r
+ //\r
+ // Set stack based on PCD values. Need to do it this way to make C code work \r
+ // when it runs from FLASH. \r
+ // \r
+ LoadConstantToReg (FixedPcdGet32(PcdPrePiStackBase) ,r2) /* stack base arg2 */\r
+ LoadConstantToReg (FixedPcdGet32(PcdPrePiStackSize) ,r3) /* stack size arg3 */\r
+ add r4, r2, r3\r
+\r
+ //Enter SVC mode and set up SVC stack pointer\r
+ mov r0,#0x13|0x80|0x40\r
+ msr CPSR_c,r0\r
+ mov r13,r4\r
+\r
+ // Call C entry point\r
+ LoadConstantToReg (FixedPcdGet32(PcdMemorySize) ,r1) /* memory size arg1 */\r
+ LoadConstantToReg (FixedPcdGet32(PcdMemoryBase) ,r0) /* memory size arg0 */\r
+ blx CEntryPoint /* Assume C code is thumb */\r
+\r
+ShouldNeverGetHere\r
+ /* _CEntryPoint should never return */\r
+ b ShouldNeverGetHere\r
+ \r
+ END\r
+\r
--- /dev/null
+/** @file\r
+ C Entry point for the SEC. First C code after the reset vector.\r
+\r
+ Copyright (c) 2008-2009, Apple Inc. All rights reserved.\r
+ \r
+ All rights reserved. This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions of the BSD License\r
+ which accompanies this distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+#include <PiPei.h>\r
+\r
+#include <Library/DebugLib.h>\r
+#include <Library/PrePiLib.h>\r
+#include <Library/PcdLib.h>\r
+#include <Library/IoLib.h>\r
+#include <Library/ArmLib.h>\r
+#include <Library/PeCoffGetEntryPointLib.h>\r
+\r
+#include <Ppi/GuidedSectionExtraction.h>\r
+#include <Guid/LzmaDecompress.h>\r
+\r
+#include "LzmaDecompress.h"\r
+\r
+VOID\r
+EFIAPI \r
+_ModuleEntryPoint(\r
+ VOID\r
+ );\r
+\r
+CHAR8 *\r
+DeCygwinPathIfNeeded (\r
+ IN CHAR8 *Name\r
+ );\r
+\r
+RETURN_STATUS\r
+EFIAPI\r
+SerialPortInitialize (\r
+ VOID\r
+ );\r
+ \r
+ \r
+VOID\r
+UartInit (\r
+ VOID\r
+ )\r
+{\r
+ // SEC phase needs to run library constructors by hand.\r
+ // This assumes we are linked agains the SerialLib\r
+ // In non SEC modules the init call is in autogenerated code.\r
+ SerialPortInitialize ();\r
+}\r
+\r
+VOID\r
+InitCache (\r
+ IN UINT32 MemoryBase,\r
+ IN UINT32 MemoryLength\r
+ );\r
+\r
+EFI_STATUS\r
+EFIAPI\r
+ExtractGuidedSectionLibConstructor (\r
+ VOID\r
+ );\r
+\r
+EFI_STATUS\r
+EFIAPI\r
+LzmaDecompressLibConstructor (\r
+ VOID\r
+ );\r
+\r
+/**\r
+ If the build is done on cygwin the paths are cygpaths. \r
+ /cygdrive/c/tmp.txt vs c:\tmp.txt so we need to convert\r
+ them to work with RVD commands\r
+\r
+ This is just code to help print out RVD symbol load command.\r
+ If you build with cygwin paths aren't compatible with RVD.\r
+\r
+ @param Name Path to convert if needed\r
+\r
+**/\r
+CHAR8 *\r
+SecDeCygwinPathIfNeeded (\r
+ IN CHAR8 *Name\r
+ )\r
+{\r
+ CHAR8 *Ptr;\r
+ UINTN Index;\r
+ UINTN Len;\r
+ \r
+ Ptr = AsciiStrStr (Name, "/cygdrive/");\r
+ if (Ptr == NULL) {\r
+ return Name;\r
+ }\r
+ \r
+ Len = AsciiStrLen (Ptr);\r
+ \r
+ // convert "/cygdrive" to spaces\r
+ for (Index = 0; Index < 9; Index++) {\r
+ Ptr[Index] = ' ';\r
+ }\r
+\r
+ // convert /c to c:\r
+ Ptr[9] = Ptr[10];\r
+ Ptr[10] = ':';\r
+ \r
+ // switch path seperators\r
+ for (Index = 11; Index < Len; Index++) {\r
+ if (Ptr[Index] == '/') {\r
+ Ptr[Index] = '\\' ;\r
+ }\r
+ }\r
+\r
+ return Name;\r
+}\r
+\r
+\r
+VOID\r
+CEntryPoint (\r
+ IN VOID *MemoryBase,\r
+ IN UINTN MemorySize,\r
+ IN VOID *StackBase,\r
+ IN UINTN StackSize\r
+ )\r
+{\r
+ VOID *HobBase;\r
+\r
+ // Build a basic HOB list\r
+ HobBase = (VOID *)(UINTN)(FixedPcdGet32(PcdEmbeddedFdBaseAddress) + FixedPcdGet32(PcdEmbeddedFdSize));\r
+ CreateHobList (MemoryBase, MemorySize, HobBase, StackBase);\r
+\r
+\r
+ // Enable program flow prediction, if supported.\r
+ ArmEnableBranchPrediction ();\r
+\r
+ // Initialize CPU cache\r
+ InitCache ((UINT32)MemoryBase, (UINT32)MemorySize);\r
+\r
+ // Add memory allocation hob for relocated FD\r
+ BuildMemoryAllocationHob (FixedPcdGet32(PcdEmbeddedFdBaseAddress), FixedPcdGet32(PcdEmbeddedFdSize), EfiBootServicesData);\r
+\r
+ // Add the FVs to the hob list\r
+ BuildFvHob (PcdGet32(PcdFlashFvMainBase), PcdGet32(PcdFlashFvMainSize));\r
+\r
+ // Start talking\r
+ UartInit ();\r
+ DEBUG ((EFI_D_ERROR, "UART Enabled\n"));\r
+\r
+ DEBUG_CODE_BEGIN ();\r
+ //\r
+ // On a debug build print out information about the SEC. This is really info about\r
+ // the PE/COFF file we are currently running from. Useful for loading symbols in a\r
+ // debugger. Remember our image is really part of the FV.\r
+ //\r
+ RETURN_STATUS Status;\r
+ EFI_PEI_FV_HANDLE VolumeHandle;\r
+ EFI_PEI_FILE_HANDLE FileHandle;\r
+ VOID *PeCoffImage;\r
+ UINT32 Offset;\r
+ CHAR8 *FilePath;\r
+ FfsAnyFvFindFirstFile (EFI_FV_FILETYPE_SECURITY_CORE, &VolumeHandle, &FileHandle);\r
+ Status = FfsFindSectionData (EFI_SECTION_TE, FileHandle, &PeCoffImage);\r
+ if (EFI_ERROR (Status)) {\r
+ // Usually is a TE (PI striped down PE/COFF), but could be a full PE/COFF\r
+ Status = FfsFindSectionData (EFI_SECTION_PE32, FileHandle, &PeCoffImage);\r
+ }\r
+ if (!EFI_ERROR (Status)) {\r
+ Offset = PeCoffGetSizeOfHeaders (PeCoffImage);\r
+ FilePath = PeCoffLoaderGetPdbPointer (PeCoffImage);\r
+ if (FilePath != NULL) {\r
+ \r
+ // \r
+ // In general you should never have to use #ifdef __CC_ARM in the code. It\r
+ // is hidden in the away in the MdePkg. But here we would like to print differnt things\r
+ // for different toolchains. \r
+ //\r
+#ifdef __CC_ARM\r
+ // Print out the command for the RVD debugger to load symbols for this image\r
+ DEBUG ((EFI_D_ERROR, "load /a /ni /np %a &0x%08x\n", SecDeCygwinPathIfNeeded (FilePath), (CHAR8 *)PeCoffImage + Offset));\r
+#elif __GNUC__\r
+ // This may not work correctly if you generate PE/COFF directlyas then the Offset would not be required\r
+ DEBUG ((EFI_D_ERROR, "add-symbol-file %a 0x%08x\n", FilePath, PeCoffImage + Offset));\r
+#else\r
+ DEBUG ((EFI_D_ERROR, "SEC starts at 0x%08x with an entry point at 0x%08x %a\n", PeCoffImage, _ModuleEntryPoint, FilePath));\r
+#endif\r
+ }\r
+ }\r
+\r
+ \r
+ DEBUG_CODE_END ();\r
+\r
+\r
+ // SEC phase needs to run library constructors by hand.\r
+ ExtractGuidedSectionLibConstructor ();\r
+ LzmaDecompressLibConstructor ();\r
+\r
+ // Build HOBs to pass up our version of stuff the DXE Core needs to save space\r
+ BuildPeCoffLoaderHob ();\r
+ BuildExtractSectionHob (\r
+ &gLzmaCustomDecompressGuid,\r
+ LzmaGuidedSectionGetInfo,\r
+ LzmaGuidedSectionExtraction\r
+ );\r
+\r
+ // Assume the FV that contains the SEC (our code) also contains a compressed FV.\r
+ DecompressFirstFv ();\r
+\r
+ // Load the DXE Core and transfer control to it\r
+ LoadDxeCoreFromFv (NULL, 0);\r
+ \r
+ // DXE Core should always load and never return\r
+ ASSERT (FALSE);\r
+}\r
+\r
--- /dev/null
+
+#/** @file
+# SEC - Reset vector code that jumps to C and loads DXE core
+#
+# Copyright (c) 2008, Apple Inc. <BR>
+# All rights reserved. This program and the accompanying materials
+# are licensed and made available under the terms and conditions of the BSD License
+# which accompanies this distribution. The full text of the license may be found at
+# http://opensource.org/licenses/bsd-license.php
+#
+# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+#
+#**/
+
+[Defines]
+ INF_VERSION = 0x00010005
+ BASE_NAME = BeagleBoardSec
+ FILE_GUID = d959e387-7b91-452c-90e0-a1dbac90ddb8
+ MODULE_TYPE = SEC
+ VERSION_STRING = 1.0
+
+
+[Sources.ARM]
+ ModuleEntryPoint.S | GCC
+ ModuleEntryPoint.asm | RVCT
+
+[Sources.ARM]
+ Sec.c
+ Cache.c
+
+[Packages]
+ MdePkg/MdePkg.dec
+ MdeModulePkg/MdeModulePkg.dec
+ EmbeddedPkg/EmbeddedPkg.dec
+ ArmPkg/ArmPkg.dec
+ IntelFrameworkModulePkg/IntelFrameworkModulePkg.dec
+
+[LibraryClasses]
+ BaseLib
+ DebugLib
+ ArmLib
+ IoLib
+ ExtractGuidedSectionLib
+ LzmaDecompressLib
+ PeCoffGetEntryPointLib
+
+[FeaturePcd]
+ gEmbeddedTokenSpaceGuid.PcdCacheEnable
+
+[FixedPcd]
+ gEfiMdePkgTokenSpaceGuid.PcdUartDefaultBaudRate
+ gEmbeddedTokenSpaceGuid.PcdEmbeddedFdBaseAddress
+ gEmbeddedTokenSpaceGuid.PcdEmbeddedFdSize
+ gEmbeddedTokenSpaceGuid.PcdFlashFvMainBase
+ gEmbeddedTokenSpaceGuid.PcdFlashFvMainSize
+ gEmbeddedTokenSpaceGuid.PcdPrePiStackSize
+ gEmbeddedTokenSpaceGuid.PcdPrePiStackBase
+ gEmbeddedTokenSpaceGuid.PcdMemoryBase
+ gEmbeddedTokenSpaceGuid.PcdMemorySize
+
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