)\r
{\r
EFI_STATUS Status;\r
- UINT16 ClockCtrl;\r
SD_MMC_HC_PRIVATE_DATA *Private;\r
\r
Private = SD_MMC_HC_PRIVATE_FROM_THIS (PassThru);\r
if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
- //\r
- // Stop bus clock at first\r
- //\r
- Status = SdMmcHcStopClock (PciIo, Slot);\r
- if (EFI_ERROR (Status)) {\r
- return Status;\r
- }\r
\r
Status = SdMmcHcUhsSignaling (Private->ControllerHandle, PciIo, Slot, BusMode->BusTiming);\r
if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
\r
- //\r
- // Wait Internal Clock Stable in the Clock Control register to be 1 before set SD Clock Enable bit\r
- //\r
- Status = SdMmcHcWaitMmioSet (\r
- PciIo,\r
- Slot,\r
- SD_MMC_HC_CLOCK_CTRL,\r
- sizeof (ClockCtrl),\r
- BIT1,\r
- BIT1,\r
- SD_MMC_HC_GENERIC_TIMEOUT\r
- );\r
- if (EFI_ERROR (Status)) {\r
- return Status;\r
- }\r
- //\r
- // Set SD Clock Enable in the Clock Control register to 1\r
- //\r
- ClockCtrl = BIT2;\r
- Status = SdMmcHcOrMmio (PciIo, Slot, SD_MMC_HC_CLOCK_CTRL, sizeof (ClockCtrl), &ClockCtrl);\r
-\r
Status = EmmcSwitchBusTiming (PciIo, PassThru, Slot, Rca, BusMode->DriverStrength, BusMode->BusTiming, BusMode->ClockFreq);\r
if (EFI_ERROR (Status)) {\r
return Status;\r