Correct TSS segment.

TSS segment should use (SIZE - 1) as limit, and do not set G bit (highest bit of LimitHigh) because limit means byte count.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: "Yao, Jiewen" <jiewen.yao@intel.com>
Reviewed-by: "Fan, Jeff" <jeff.fan@intel.com>
Reviewed-by: "Kinney, Michael D" <michael.d.kinney@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18935 6f19259b-4bc3-4df7-8a09-765794883524

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.S b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.S
index 69dfd946de488159462665b1408fe4079ddd3d46..4130bf5be5eb0e0d3ad9c3a87831550f3c115c14 100644 (file)
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.S
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.S
@@ -82,18 +82,18 @@ CodeSeg64:
 .equ  GDT_SIZE, .- NullSeg\r
 \r
 TssSeg:\r
-            .word      TSS_DESC_SIZE       # LimitLow\r
+            .word      TSS_DESC_SIZE -1    # LimitLow\r
             .word      0                   # BaseLow\r
             .byte      0                   # BaseMid\r
             .byte      0x89\r
-            .byte      0x80                # LimitHigh\r
+            .byte      0x00                # LimitHigh\r
             .byte      0                   # BaseHigh\r
 ExceptionTssSeg:\r
-            .word      TSS_DESC_SIZE       # LimitLow\r
+            .word      TSS_DESC_SIZE - 1   # LimitLow\r
             .word      0                   # BaseLow\r
             .byte      0                   # BaseMid\r
             .byte      0x89\r
-            .byte      0x80                # LimitHigh\r
+            .byte      0x00                # LimitHigh\r
             .byte      0                   # BaseHigh\r
 \r
 .equ  CODE_SEL,          CodeSeg32 - NullSeg\r

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.asm b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.asm
index 65a120e1e78a65f4941bbc07011c3aac1b885709..b4eb492da0c04e6a015d07cda33b222d9bf92515 100644 (file)
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.asm
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiException.asm
@@ -85,18 +85,18 @@ CodeSeg64   LABEL   QWORD
 GDT_SIZE = $ - offset NullSeg\r
 \r
 TssSeg      LABEL   QWORD\r
-            DW      TSS_DESC_SIZE       ; LimitLow\r
+            DW      TSS_DESC_SIZE - 1   ; LimitLow\r
             DW      0                   ; BaseLow\r
             DB      0                   ; BaseMid\r
             DB      89h\r
-            DB      080h                ; LimitHigh\r
+            DB      00h                 ; LimitHigh\r
             DB      0                   ; BaseHigh\r
 ExceptionTssSeg     LABEL   QWORD\r
-            DW      TSS_DESC_SIZE       ; LimitLow\r
+            DW      TSS_DESC_SIZE - 1   ; LimitLow\r
             DW      0                   ; BaseLow\r
             DB      0                   ; BaseMid\r
             DB      89h\r
-            DB      080h                ; LimitHigh\r
+            DB      00h                 ; LimitHigh\r
             DB      0                   ; BaseHigh\r
 \r
 CODE_SEL          = offset CodeSeg32 - offset NullSeg\r

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.S b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.S
index 6dbcaa5b671490d53ca0388fd73730377bd56fd4..2ae6f2c32f54853983af85dacd6bc0b6a2b81a9a 100644 (file)
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.S
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.S
@@ -79,11 +79,11 @@ CodeSeg64:
             .byte 0                     # BaseHigh\r
 # TSS Segment for X64 specially\r
 TssSeg:\r
-            .word TSS_DESC_SIZE         # LimitLow\r
+            .word TSS_DESC_SIZE - 1     # LimitLow\r
             .word 0                     # BaseLow\r
             .byte 0                     # BaseMid\r
             .byte 0x89\r
-            .byte 0xDB                  # LimitHigh\r
+            .byte 0x00                  # LimitHigh\r
             .byte 0                     # BaseHigh\r
             .long 0                     # BaseUpper\r
             .long 0                     # Reserved\r

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.asm b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.asm
index 3d841c654676d479f9113e46688a8dad79d58ea1..ab716450b71a624eeb0f742e224de472170e258b 100644 (file)
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.asm
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiException.asm
@@ -78,11 +78,11 @@ CodeSeg64   LABEL   QWORD
             DB      0                   ; BaseHigh\r
 ; TSS Segment for X64 specially\r
 TssSeg      LABEL   QWORD\r
-            DW      TSS_DESC_SIZE       ; LimitLow\r
+            DW      TSS_DESC_SIZE - 1   ; LimitLow\r
             DW      0                   ; BaseLow\r
             DB      0                   ; BaseMid\r
             DB      89h\r
-            DB      080h                ; LimitHigh\r
+            DB      00h                 ; LimitHigh\r
             DB      0                   ; BaseHigh\r
             DD      0                   ; BaseUpper\r
             DD      0                   ; Reserved\r