ArmPkg/ArmExceptionLib: don't restore ESR and FAR upon exception return

ESR and FAR are populated by the hardware upon exception entry, and
describe the exception, not the interrupted context. So there is no point
in restoring their values before returning from the exception.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
Reviewed-by: Eugene Cohen <eugene@hp.com>

diff --git a/ArmPkg/Library/ArmExceptionLib/AArch64/ExceptionSupport.S b/ArmPkg/Library/ArmExceptionLib/AArch64/ExceptionSupport.S
index 3117e710fa5320f56a2e10a4e9242f328c977fe0..c7ea061a93eae220b9623e5832742abe3764963e 100644 (file)
--- a/ArmPkg/Library/ArmExceptionLib/AArch64/ExceptionSupport.S
+++ b/ArmPkg/Library/ArmExceptionLib/AArch64/ExceptionSupport.S
@@ -356,18 +356,12 @@ ASM_PFX(CommonExceptionEntry):
   EL1_OR_EL2_OR_EL3(x6)\r
 1:msr      elr_el1, x1   // Exception Link Register\r
   msr      spsr_el1,x2   // Saved Processor Status Register 32bit\r
-  msr      esr_el1, x4   // EL1 Exception syndrome register 32bit\r
-  msr      far_el1, x5   // EL1 Fault Address Register\r
   b        4f\r
 2:msr      elr_el2, x1   // Exception Link Register\r
   msr      spsr_el2,x2   // Saved Processor Status Register 32bit\r
-  msr      esr_el2, x4   // EL2 Exception syndrome register 32bit\r
-  msr      far_el2, x5   // EL2 Fault Address Register\r
   b        4f\r
 3:msr      elr_el3, x1   // Exception Link Register\r
   msr      spsr_el3,x2   // Saved Processor Status Register 32bit\r
-  msr      esr_el3, x4   // EL3 Exception syndrome register 32bit\r
-  msr      far_el3, x5   // EL3 Fault Address Register\r
 4:msr      fpsr, x3      // Floating point Status Register  32bit\r
 \r
   // pop all regs and return from exception.\r