Vlv2TbltDevicePkg: Sync FLASH libraries from UDK2017 branch
authorKinney, Michael D <michael.d.kinney@intel.com>
Tue, 27 Mar 2018 23:51:06 +0000 (16:51 -0700)
committerKinney, Michael D <michael.d.kinney@intel.com>
Wed, 28 Mar 2018 16:00:49 +0000 (09:00 -0700)
https://bugzilla.tianocore.org/show_bug.cgi?id=911

Update Minnow Max FLASH libraries to match libraries in
the UDK2017 development branch in edk2-platforms.

https://github.com/tianocore/edk2-platforms/tree/devel-MinnowBoardMax-UDK2017

Cc: David Wei <david.wei@intel.com>
Cc: Mang Guo <mang.guo@intel.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: David Wei <david.wei@intel.com>
Reviewed-by: Guo Mang <mang.guo@intel.com>
Vlv2TbltDevicePkg/Feature/Capsule/Library/PlatformFlashAccessLib/PlatformFlashAccessLib.c
Vlv2TbltDevicePkg/Feature/Capsule/Library/PlatformFlashAccessLib/PlatformFlashAccessLib.inf
Vlv2TbltDevicePkg/Library/FlashDeviceLib/FlashDeviceLib.c
Vlv2TbltDevicePkg/Library/FlashDeviceLib/FlashDeviceLib.inf
Vlv2TbltDevicePkg/Library/FlashDeviceLib/SpiChipDefinitions.h

index f3cb31d..9162e02 100644 (file)
@@ -1,7 +1,7 @@
 /** @file\r
   Platform Flash Access library.\r
 \r
-  Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>\r
+  Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>\r
   This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
   which accompanies this distribution.  The full text of the license may be found at\r
@@ -11,6 +11,7 @@
   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
 \r
 **/\r
+#include <Uefi.h>\r
 \r
 #include <PiDxe.h>\r
 \r
 #include <Library/DebugLib.h>\r
 #include <Library/PcdLib.h>\r
 #include <Library/PlatformFlashAccessLib.h>\r
-#include <Library/FlashDeviceLib.h>\r
+//#include <Library/FlashDeviceLib.h>\r
 #include <Library/MemoryAllocationLib.h>\r
+#include <Protocol/Spi.h>\r
+#include <Library/CacheMaintenanceLib.h>\r
+#include "PchAccess.h"\r
+#include <Library/IoLib.h>\r
+#include <Library/UefiLib.h>\r
+#include <Library/UefiBootServicesTableLib.h>\r
+#include <Library/PrintLib.h>\r
 \r
-#define SECTOR_SIZE_64KB  0x10000      // Common 64kBytes sector size\r
-#define ALINGED_SIZE  SECTOR_SIZE_64KB\r
+//#define SECTOR_SIZE_64KB  0x10000      // Common 64kBytes sector size\r
+//#define ALINGED_SIZE  SECTOR_SIZE_64KB\r
+\r
+#define BLOCK_SIZE 0x1000\r
+#define ALINGED_SIZE BLOCK_SIZE\r
+\r
+#define R_PCH_LPC_BIOS_CNTL                       0xDC\r
+#define B_PCH_LPC_BIOS_CNTL_SMM_BWP               0x20            ///< SMM BIOS write protect disable\r
+\r
+//\r
+// Prefix Opcode Index on the host SPI controller\r
+//\r
+typedef enum {\r
+  SPI_WREN,             // Prefix Opcode 0: Write Enable\r
+  SPI_EWSR,             // Prefix Opcode 1: Enable Write Status Register\r
+} PREFIX_OPCODE_INDEX;\r
+//\r
+// Opcode Menu Index on the host SPI controller\r
+//\r
+typedef enum {\r
+  SPI_READ_ID,        // Opcode 0: READ ID, Read cycle with address\r
+  SPI_READ,           // Opcode 1: READ, Read cycle with address\r
+  SPI_RDSR,           // Opcode 2: Read Status Register, No address\r
+  SPI_WRDI_SFDP,      // Opcode 3: Write Disable or Discovery Parameters, No address\r
+  SPI_SERASE,         // Opcode 4: Sector Erase (4KB), Write cycle with address\r
+  SPI_BERASE,         // Opcode 5: Block Erase (32KB), Write cycle with address\r
+  SPI_PROG,           // Opcode 6: Byte Program, Write cycle with address\r
+  SPI_WRSR,           // Opcode 7: Write Status Register, No address\r
+} SPI_OPCODE_INDEX;\r
 \r
 STATIC EFI_PHYSICAL_ADDRESS     mInternalFdAddress;\r
 \r
+EFI_SPI_PROTOCOL  *mSpiProtocol;\r
+\r
+/**\r
+  Read NumBytes bytes of data from the address specified by\r
+  PAddress into Buffer.\r
+\r
+  @param[in]      Address       The starting physical address of the read.\r
+  @param[in,out]  NumBytes      On input, the number of bytes to read. On output, the number\r
+                                of bytes actually read.\r
+  @param[out]     Buffer        The destination data buffer for the read.\r
+\r
+  @retval         EFI_SUCCESS       Opertion is successful.\r
+  @retval         EFI_DEVICE_ERROR  If there is any device errors.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+SpiFlashRead (\r
+  IN     UINTN     Address,\r
+  IN OUT UINT32    *NumBytes,\r
+     OUT UINT8     *Buffer\r
+  )\r
+{\r
+  EFI_STATUS    Status = EFI_SUCCESS;\r
+  UINTN         Offset = 0;\r
+\r
+  ASSERT ((NumBytes != NULL) && (Buffer != NULL));\r
+\r
+\r
+  //if (Address >= (UINTN)PcdGet32 (PcdGbeRomBase) && Address < (UINTN)PcdGet32 (PcdPDRRomBase)) {\r
+    Offset = Address - (UINTN)PcdGet32 (PcdFlashChipBase);\r
+\r
+    Status = mSpiProtocol->Execute (\r
+                               mSpiProtocol,\r
+                               1, //SPI_READ,\r
+                               0, //SPI_WREN,\r
+                               TRUE,\r
+                               TRUE,\r
+                               FALSE,\r
+                               Offset,\r
+                               BLOCK_SIZE,\r
+                               Buffer,\r
+                               EnumSpiRegionAll\r
+                               );\r
+    return Status;\r
+}\r
+\r
+/**\r
+  Write NumBytes bytes of data from Buffer to the address specified by\r
+  PAddresss.\r
+\r
+  @param[in]      Address         The starting physical address of the write.\r
+  @param[in,out]  NumBytes        On input, the number of bytes to write. On output,\r
+                                  the actual number of bytes written.\r
+  @param[in]      Buffer          The source data buffer for the write.\r
+\r
+  @retval         EFI_SUCCESS       Opertion is successful.\r
+  @retval         EFI_DEVICE_ERROR  If there is any device errors.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+SpiFlashWrite (\r
+  IN     UINTN     Address,\r
+  IN OUT UINT32    *NumBytes,\r
+  IN     UINT8     *Buffer\r
+  )\r
+{\r
+  EFI_STATUS                Status;\r
+  UINTN                     Offset;\r
+  UINT32                    Length;\r
+  UINT32                    RemainingBytes;\r
+\r
+  ASSERT ((NumBytes != NULL) && (Buffer != NULL));\r
+  ASSERT (Address >= (UINTN)PcdGet32 (PcdFlashChipBase));\r
+\r
+  Offset    = Address - (UINTN)PcdGet32 (PcdFlashChipBase);\r
+\r
+  ASSERT ((*NumBytes + Offset) <= (UINTN)PcdGet32 (PcdFlashChipSize));\r
+\r
+  Status = EFI_SUCCESS;\r
+  RemainingBytes = *NumBytes;\r
+\r
+  while (RemainingBytes > 0) {\r
+    if (RemainingBytes > SIZE_4KB) {\r
+      Length = SIZE_4KB;\r
+    } else {\r
+      Length = RemainingBytes;\r
+    }\r
+    Status = mSpiProtocol->Execute (\r
+                             mSpiProtocol,\r
+                             SPI_PROG,\r
+                             SPI_WREN,\r
+                             TRUE,\r
+                             TRUE,\r
+                             TRUE,\r
+                             (UINT32) Offset,\r
+                             Length,\r
+                             Buffer,\r
+                             EnumSpiRegionAll\r
+                             );\r
+    if (EFI_ERROR (Status)) {\r
+      break;\r
+    }\r
+    RemainingBytes -= Length;\r
+    Offset += Length;\r
+    Buffer += Length;\r
+  }\r
+\r
+  //\r
+  // Actual number of bytes written\r
+  //\r
+  *NumBytes -= RemainingBytes;\r
+\r
+  return Status;\r
+}\r
+\r
+\r
+EFI_STATUS\r
+InternalReadBlock (\r
+  IN  EFI_PHYSICAL_ADDRESS  BaseAddress,\r
+  OUT VOID                  *ReadBuffer\r
+  )\r
+{\r
+  EFI_STATUS    Status;\r
+  UINT32        BlockSize;\r
+\r
+  BlockSize = BLOCK_SIZE;\r
+\r
+  Status = SpiFlashRead ((UINTN) BaseAddress, &BlockSize, ReadBuffer);\r
+\r
+  return Status;\r
+}\r
+\r
+/**\r
+  Erase the block starting at Address.\r
+\r
+  @param[in]  Address         The starting physical address of the block to be erased.\r
+                              This library assume that caller garantee that the PAddress\r
+                              is at the starting address of this block.\r
+  @param[in]  NumBytes        On input, the number of bytes of the logical block to be erased.\r
+                              On output, the actual number of bytes erased.\r
+\r
+  @retval     EFI_SUCCESS.      Opertion is successful.\r
+  @retval     EFI_DEVICE_ERROR  If there is any device errors.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+SpiFlashBlockErase (\r
+  IN UINTN    Address,\r
+  IN UINTN    *NumBytes\r
+  )\r
+{\r
+  EFI_STATUS          Status;\r
+  UINTN               Offset;\r
+  UINTN               RemainingBytes;\r
+\r
+  ASSERT (NumBytes != NULL);\r
+  ASSERT (Address >= (UINTN)PcdGet32 (PcdFlashChipBase));\r
+\r
+  Offset    = Address - (UINTN)PcdGet32 (PcdFlashChipBase);\r
+\r
+  ASSERT ((*NumBytes % SIZE_4KB) == 0);\r
+  ASSERT ((*NumBytes + Offset) <= (UINTN)PcdGet32 (PcdFlashChipSize));\r
+\r
+  Status = EFI_SUCCESS;\r
+  RemainingBytes = *NumBytes;\r
+\r
+  //\r
+  // To adjust the Offset with Bios/Gbe\r
+  //\r
+//  if (Address >= (UINTN)PcdGet32 (PcdFlashChipBase)) {\r
+//    Offset = Address - (UINTN)PcdGet32 (PcdFlashChipBase);\r
+\r
+    while (RemainingBytes > 0) {\r
+      Status = mSpiProtocol->Execute (\r
+                               mSpiProtocol,\r
+                               SPI_SERASE,\r
+                               SPI_WREN,\r
+                               FALSE,\r
+                               TRUE,\r
+                               FALSE,\r
+                               (UINT32) Offset,\r
+                               0,\r
+                               NULL,\r
+                               EnumSpiRegionAll\r
+                               );\r
+      if (EFI_ERROR (Status)) {\r
+        break;\r
+      }\r
+      RemainingBytes -= SIZE_4KB;\r
+      Offset         += SIZE_4KB;\r
+    }\r
+//  }\r
+\r
+  //\r
+  // Actual number of bytes erased\r
+  //\r
+  *NumBytes -= RemainingBytes;\r
+\r
+  return Status;\r
+}\r
+\r
+/**\r
+\r
+Routine Description:\r
+\r
+  Erase the whole block.\r
+\r
+Arguments:\r
+\r
+  BaseAddress  - Base address of the block to be erased.\r
+\r
+Returns:\r
+\r
+  EFI_SUCCESS - The command completed successfully.\r
+  Other       - Device error or wirte-locked, operation failed.\r
+\r
+**/\r
+EFI_STATUS\r
+InternalEraseBlock (\r
+  IN  EFI_PHYSICAL_ADDRESS BaseAddress\r
+  )\r
+{\r
+  EFI_STATUS                              Status;\r
+  UINTN                                   NumBytes;\r
+\r
+  NumBytes = BLOCK_SIZE;\r
+\r
+  Status = SpiFlashBlockErase ((UINTN) BaseAddress, &NumBytes);\r
+\r
+  return Status;\r
+}\r
+\r
+EFI_STATUS\r
+InternalCompareBlock (\r
+  IN  EFI_PHYSICAL_ADDRESS        BaseAddress,\r
+  IN  UINT8                       *Buffer\r
+  )\r
+{\r
+  EFI_STATUS                              Status;\r
+  VOID                                    *CompareBuffer;\r
+  UINT32                                  NumBytes;\r
+  INTN                                    CompareResult;\r
+\r
+  NumBytes = BLOCK_SIZE;\r
+  CompareBuffer = AllocatePool (NumBytes);\r
+  if (CompareBuffer == NULL) {\r
+    Status = EFI_OUT_OF_RESOURCES;\r
+    goto Done;\r
+  }\r
+\r
+  Status = SpiFlashRead ((UINTN) BaseAddress, &NumBytes, CompareBuffer);\r
+  if (EFI_ERROR (Status)) {\r
+    goto Done;\r
+  }\r
+  CompareResult = CompareMem (CompareBuffer, Buffer, BLOCK_SIZE);\r
+  if (CompareResult != 0) {\r
+    Status = EFI_VOLUME_CORRUPTED;\r
+  }\r
+\r
+Done:\r
+  if (CompareBuffer != NULL) {\r
+    FreePool (CompareBuffer);\r
+  }\r
+\r
+  return Status;\r
+}\r
+\r
+/**\r
+\r
+Routine Description:\r
+\r
+  Write a block of data.\r
+\r
+Arguments:\r
+\r
+  BaseAddress  - Base address of the block.\r
+  Buffer       - Data buffer.\r
+  BufferSize   - Size of the buffer.\r
+\r
+Returns:\r
+\r
+  EFI_SUCCESS           - The command completed successfully.\r
+  EFI_INVALID_PARAMETER - Invalid parameter, can not proceed.\r
+  Other                 - Device error or wirte-locked, operation failed.\r
+\r
+**/\r
+EFI_STATUS\r
+InternalWriteBlock (\r
+  IN  EFI_PHYSICAL_ADDRESS        BaseAddress,\r
+  IN  UINT8                       *Buffer,\r
+  IN  UINT32                      BufferSize\r
+  )\r
+{\r
+  EFI_STATUS                              Status;\r
+\r
+  Status = SpiFlashWrite ((UINTN) BaseAddress, &BufferSize, Buffer);\r
+\r
+  if (EFI_ERROR (Status)) {\r
+    DEBUG((DEBUG_ERROR, "\nFlash write error."));\r
+    return Status;\r
+  }\r
+\r
+  WriteBackInvalidateDataCacheRange ((VOID *) (UINTN) BaseAddress, BLOCK_SIZE);\r
+\r
+  Status = InternalCompareBlock (BaseAddress, Buffer);\r
+  if (EFI_ERROR (Status)) {\r
+    DEBUG((DEBUG_ERROR, "\nError when writing to BaseAddress %x with different at offset %x.", BaseAddress, Status));\r
+  } else {\r
+    DEBUG((DEBUG_INFO, "\nVerified data written to Block at %x is correct.", BaseAddress));\r
+  }\r
+\r
+  return Status;\r
+\r
+}\r
+\r
 /**\r
   Perform flash write opreation.\r
 \r
@@ -51,36 +404,122 @@ PerformFlashWrite (
   IN UINTN                        Length\r
   )\r
 {\r
-  EFI_STATUS          Status;\r
+  EFI_STATUS            Status = EFI_SUCCESS;\r
+  UINTN               Index;\r
+  EFI_PHYSICAL_ADDRESS  Address;\r
+  UINTN                 CountOfBlocks;\r
+  EFI_TPL               OldTpl;\r
+  BOOLEAN               FlashError;\r
+  UINT8                 *Buf;\r
+  UINTN                 LpcBaseAddress;\r
+  UINT8                 Data8Or;\r
+  UINT8                 Data8And;\r
+  UINT8                 BiosCntl;\r
+\r
+  Index             = 0;\r
+  Address           = 0;\r
+  CountOfBlocks     = 0;\r
+  FlashError        = FALSE;\r
+  Buf               = Buffer;\r
 \r
-  DEBUG((DEBUG_INFO, "PerformFlashWrite - 0x%x(%x) - 0x%x\n", (UINTN)FlashAddress, (UINTN)FlashAddressType, Length));\r
+  DEBUG((DEBUG_INFO | DEBUG_ERROR, "PerformFlashWrite - 0x%x(%x) - 0x%x\n", (UINTN)FlashAddress, (UINTN)FlashAddressType, Length));\r
   if (FlashAddressType == FlashAddressTypeRelativeAddress) {\r
     FlashAddress = FlashAddress + mInternalFdAddress;\r
   }\r
 \r
-  DEBUG((DEBUG_INFO, "                  - 0x%x(%x) - 0x%x\n", (UINTN)FlashAddress, (UINTN)FlashAddressType, Length));\r
-  LibFvbFlashDeviceBlockLock((UINTN)FlashAddress, Length, FALSE);\r
+  CountOfBlocks = (UINTN) (Length / BLOCK_SIZE);\r
+  Address = FlashAddress;\r
 \r
+  LpcBaseAddress = MmPciAddress (0,\r
+                    DEFAULT_PCI_BUS_NUMBER_PCH,\r
+                    PCI_DEVICE_NUMBER_PCH_LPC,\r
+                    PCI_FUNCTION_NUMBER_PCH_LPC,\r
+                    0\r
+                    );\r
+  BiosCntl = MmioRead8 (LpcBaseAddress + R_PCH_LPC_BIOS_CNTL);\r
+  if ((BiosCntl & B_PCH_LPC_BIOS_CNTL_SMM_BWP) == B_PCH_LPC_BIOS_CNTL_SMM_BWP) {\r
+    ///\r
+    /// Clear SMM_BWP bit (D31:F0:RegDCh[5])\r
+    ///\r
+    Data8And  = (UINT8) ~B_PCH_LPC_BIOS_CNTL_SMM_BWP;\r
+    Data8Or   = 0x00;\r
+\r
+    MmioAndThenOr8 (\r
+      LpcBaseAddress + R_PCH_LPC_BIOS_CNTL,\r
+      Data8And,\r
+      Data8Or\r
+      );\r
+    DEBUG((DEBUG_INFO, "PerformFlashWrite Clear SMM_BWP bit\n"));\r
+  }\r
+\r
+    //\r
+    // Raise TPL to TPL_NOTIFY to block any event handler,\r
+    // while still allowing RaiseTPL(TPL_NOTIFY) within\r
+    // output driver during Print()\r
   //\r
-  // Erase & Write\r
-  //\r
-  Status = LibFvbFlashDeviceBlockErase((UINTN)FlashAddress, Length);\r
-  ASSERT_EFI_ERROR(Status);\r
+    OldTpl = gBS->RaiseTPL (TPL_NOTIFY);\r
+    for (Index = 0; Index < CountOfBlocks; Index++) {\r
+      //\r
+      // Handle block based on address and contents.\r
+      //\r
+      if (!EFI_ERROR (InternalCompareBlock (Address, Buf))) {\r
+        DEBUG((DEBUG_INFO, "Skipping block at 0x%lx (already programmed)\n", Address));\r
+      } else {\r
+        //\r
+        // Display a dot for each block being updated.\r
+        //\r
+        Print (L".");\r
+\r
+        //\r
+        // Make updating process uninterruptable,\r
+        // so that the flash memory area is not accessed by other entities\r
+        // which may interfere with the updating process\r
+        //\r
+        Status  = InternalEraseBlock (Address);\r
   if (EFI_ERROR(Status)) {\r
-    LibFvbFlashDeviceBlockLock((UINTN)FlashAddress, Length, TRUE);\r
-    DEBUG((DEBUG_ERROR, "Flash Erase error\n"));\r
-    return Status;\r
+          gBS->RestoreTPL (OldTpl);\r
+          FlashError = TRUE;\r
+          goto Done;\r
   }\r
-\r
-  Status = LibFvbFlashDeviceWrite((UINTN)FlashAddress, &Length, Buffer);\r
-  ASSERT_EFI_ERROR(Status);\r
+        Status = InternalWriteBlock (\r
+                  Address,\r
+                  Buf,\r
+                  (UINT32)(Length > BLOCK_SIZE ? BLOCK_SIZE : Length)\r
+                  );\r
   if (EFI_ERROR(Status)) {\r
-    LibFvbFlashDeviceBlockLock((UINTN)FlashAddress, Length, TRUE);\r
-    DEBUG((DEBUG_ERROR, "Flash write error\n"));\r
-    return Status;\r
+          gBS->RestoreTPL (OldTpl);\r
+          FlashError = TRUE;\r
+          goto Done;\r
+        }\r
   }\r
 \r
-  LibFvbFlashDeviceBlockLock((UINTN)FlashAddress, Length, TRUE);\r
+      //\r
+      // Move to next block to update.\r
+      //\r
+      Address += BLOCK_SIZE;\r
+      Buf += BLOCK_SIZE;\r
+      if (Length > BLOCK_SIZE) {\r
+        Length -= BLOCK_SIZE;\r
+      } else {\r
+        Length = 0;\r
+      }\r
+    }\r
+    gBS->RestoreTPL (OldTpl);\r
+\r
+  Done:\r
+  if ((BiosCntl & B_PCH_LPC_BIOS_CNTL_SMM_BWP) == B_PCH_LPC_BIOS_CNTL_SMM_BWP) {\r
+    //\r
+    // Restore original control setting\r
+    //\r
+    MmioWrite8 (LpcBaseAddress + R_PCH_LPC_BIOS_CNTL, BiosCntl);\r
+    }\r
+\r
+  //\r
+  // Print flash update failure message if error detected.\r
+  //\r
+  if (FlashError) {\r
+    Print (L"No %r\n", Status);\r
+  }\r
 \r
   return EFI_SUCCESS;\r
 }\r
@@ -183,8 +622,16 @@ PerformFlashAccessLibConstructor (
   VOID\r
   )\r
 {\r
+  EFI_STATUS Status;\r
   mInternalFdAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)PcdGet32(PcdFlashAreaBaseAddress);\r
   DEBUG((DEBUG_INFO, "PcdFlashAreaBaseAddress - 0x%x\n", mInternalFdAddress));\r
 \r
+  Status = gBS->LocateProtocol (\r
+                  &gEfiSpiProtocolGuid,\r
+                  NULL,\r
+                  (VOID **) &mSpiProtocol\r
+                  );\r
+  ASSERT_EFI_ERROR(Status);\r
+\r
   return EFI_SUCCESS;\r
 }\r
index 17ab38e..fbbdb91 100644 (file)
@@ -1,7 +1,7 @@
 ## @file\r
 #  Platform Flash Access library.\r
 #\r
-#  Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>\r
+#  Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>\r
 #  This program and the accompanying materials\r
 #  are licensed and made available under the terms and conditions of the BSD License\r
 #  which accompanies this distribution.  The full text of the license may be found at\r
   MdeModulePkg/MdeModulePkg.dec\r
   SignedCapsulePkg/SignedCapsulePkg.dec\r
   Vlv2TbltDevicePkg/PlatformPkg.dec\r
+  Vlv2DeviceRefCodePkg/Vlv2DeviceRefCodePkg.dec\r
 \r
 [LibraryClasses]\r
   BaseMemoryLib\r
+  IoLib\r
   PcdLib\r
   DebugLib\r
-  FlashDeviceLib\r
+#  FlashDeviceLib\r
   MemoryAllocationLib\r
+  CacheMaintenanceLib\r
+\r
+[Guids]\r
+  gEdkiiSystemFmpCapsuleConfigFileGuid          ## SOMETIMES_CONSUMES ## GUID\r
+\r
+[Protocols]\r
+  gEfiSpiProtocolGuid                          ## CONSUMES\r
 \r
 [Pcd]\r
-  gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress\r
+  gPlatformModuleTokenSpaceGuid.PcdFlashAreaBaseAddress  ## SOMETIMES_CONSUMES\r
+  gPlatformModuleTokenSpaceGuid.PcdFlashChipBase         ## SOMETIMES_CONSUMES\r
+  gPlatformModuleTokenSpaceGuid.PcdFlashChipSize         ## SOMETIMES_CONSUMES\r
+  gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress      ## SOMETIMES_CONSUMES\r
+\r
index 8e6e5b4..392ad1c 100644 (file)
 #include <Library/FlashDeviceLib.h>\r
 #include <Library/DebugLib.h>\r
 #include <Library/BaseLib.h>\r
+#include <Library/UefiBootServicesTableLib.h>\r
+#include <Library/UefiRuntimeServicesTableLib.h>\r
 #include <Library/BaseMemoryLib.h>\r
+#include <Library/UefiRuntimeLib.h>\r
+#include <Protocol/SmmBase2.h>\r
 #include <Guid/EventGroup.h>\r
-#include <Library/SpiFlash.H>\r
+#include "SpiChipDefinitions.h"\r
 \r
-#define FLASH_SIZE  0x400000\r
-\r
-#define FLASH_DEVICE_BASE_ADDRESS (0xFFFFFFFF-FLASH_SIZE+1)\r
 UINTN FlashDeviceBase = FLASH_DEVICE_BASE_ADDRESS;\r
 \r
 EFI_SPI_PROTOCOL *mSpiProtocol = NULL;\r
@@ -77,11 +78,11 @@ SpiFlashBlockErase (
   UINT32              SpiAddress;\r
 \r
   SpiAddress = (UINT32)(UINTN)(BaseAddress) - (UINT32)FlashDeviceBase;\r
-  SectorSize = SECTOR_SIZE_64KB;\r
+  SectorSize = SECTOR_SIZE_4KB;\r
   while ( (NumBytes > 0) && (NumBytes <= MAX_FWH_SIZE) ) {\r
     Status = mSpiProtocol->Execute (\r
                              mSpiProtocol,\r
-                             SPI_BERASE,\r
+                             SPI_SERASE,\r
                              SPI_WREN,\r
                              FALSE,\r
                              TRUE,\r
@@ -319,3 +320,148 @@ LibFvbFlashDeviceBlockLock (
   return Status;\r
 }\r
 \r
+VOID\r
+EFIAPI\r
+LibFvbFlashDeviceVirtualAddressChangeNotifyEvent (\r
+  IN EFI_EVENT        Event,\r
+  IN VOID             *Context\r
+  )\r
+{\r
+  gRT->ConvertPointer (0, (VOID **) &mSpiProtocol);\r
+  gRT->ConvertPointer (0, (VOID **) &FlashDeviceBase);\r
+}\r
+\r
+\r
+/**\r
+  The library constructuor.\r
+\r
+  The function does the necessary initialization work for this library\r
+  instance. Please put all initialization works in it.\r
+\r
+  @param[in]  ImageHandle       The firmware allocated handle for the UEFI image.\r
+  @param[in]  SystemTable       A pointer to the EFI system table.\r
+\r
+  @retval     EFI_SUCCESS       The function always return EFI_SUCCESS for now.\r
+                                It will ASSERT on error for debug version.\r
+  @retval     EFI_ERROR         Please reference LocateProtocol for error code details.\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+LibFvbFlashDeviceSupportInit (\r
+  IN EFI_HANDLE         ImageHandle,\r
+  IN EFI_SYSTEM_TABLE   *SystemTable\r
+  )\r
+{\r
+  EFI_STATUS Status;\r
+  EFI_EVENT  Event;\r
+  UINT8                         SfId[3];\r
+  UINT8                         FlashIndex;\r
+  UINT8                         SpiReadError;\r
+  UINT8                         SpiNotMatchError;\r
+  EFI_SMM_BASE2_PROTOCOL       *SmmBase;\r
+  BOOLEAN                       InSmm;\r
+\r
+  SpiReadError     = 0x00;\r
+  SpiNotMatchError = 0x00;\r
+\r
+  InSmm = FALSE;\r
+  Status = gBS->LocateProtocol (\r
+                  &gEfiSmmBase2ProtocolGuid,\r
+                  NULL,\r
+                  (void **)&SmmBase\r
+                  );\r
+  if (!EFI_ERROR(Status)) {\r
+    Status = SmmBase->InSmm(SmmBase, &InSmm);\r
+    if (EFI_ERROR(Status)) {\r
+      InSmm = FALSE;\r
+    }\r
+  }\r
+\r
+  if (!InSmm) {\r
+    Status = gBS->LocateProtocol (\r
+                  &gEfiSpiProtocolGuid,\r
+                  NULL,\r
+                  (VOID **)&mSpiProtocol\r
+                  );\r
+    ASSERT_EFI_ERROR (Status);\r
+\r
+    Status = gBS->CreateEventEx (\r
+                  EVT_NOTIFY_SIGNAL,\r
+                  TPL_NOTIFY,\r
+                  LibFvbFlashDeviceVirtualAddressChangeNotifyEvent,\r
+                  NULL,\r
+                  &gEfiEventVirtualAddressChangeGuid,\r
+                  &Event\r
+                  );\r
+    ASSERT_EFI_ERROR (Status);\r
+  } else {\r
+    Status = gBS->LocateProtocol (\r
+                    &gEfiSmmSpiProtocolGuid,\r
+                    NULL,\r
+                    (VOID **)&mSpiProtocol\r
+                    );\r
+    ASSERT_EFI_ERROR (Status);\r
+  }\r
+\r
+\r
+  for (FlashIndex = EnumSpiFlashW25Q64; FlashIndex < EnumSpiFlashMax; FlashIndex++) {\r
+    Status = mSpiProtocol->Init (mSpiProtocol, &(mInitTable[FlashIndex]));\r
+    if (!EFI_ERROR (Status)) {\r
+      //\r
+      // Read Vendor/Device IDs to check if the driver supports the Serial Flash device.\r
+      //\r
+      Status = mSpiProtocol->Execute (\r
+                               mSpiProtocol,\r
+                               SPI_READ_ID,\r
+                               SPI_WREN,\r
+                               TRUE,\r
+                               FALSE,\r
+                               FALSE,\r
+                               0,\r
+                               3,\r
+                               SfId,\r
+                               EnumSpiRegionAll\r
+                               );\r
+      if (!EFI_ERROR (Status)) {\r
+        if ((SfId[0] == mInitTable[FlashIndex].VendorId)  &&\r
+            (SfId[1] == mInitTable[FlashIndex].DeviceId0) &&\r
+            (SfId[2] == mInitTable[FlashIndex].DeviceId1)) {\r
+            //\r
+            // Found a matching SPI device, FlashIndex now contains flash device.\r
+            //\r
+            DEBUG ((DEBUG_ERROR, "OK - Found SPI Flash Type in SPI Flash Driver, Device Type ID 0 = 0x%02x!\n", mInitTable[FlashIndex].DeviceId0));\r
+            DEBUG ((DEBUG_ERROR, "Device Type ID 1 = 0x%02x!\n", mInitTable[FlashIndex].DeviceId1));\r
+\r
+            if (mInitTable[FlashIndex].BiosStartOffset == (UINTN) (-1)) {\r
+              DEBUG ((DEBUG_ERROR, "ERROR - The size of BIOS image is bigger than SPI Flash device!\n"));\r
+              CpuDeadLoop ();\r
+            }\r
+            break;\r
+        } else {\r
+          SpiNotMatchError++;\r
+        }\r
+      } else {\r
+        SpiReadError++;\r
+      }\r
+    }\r
+  }\r
+\r
+  DEBUG ((DEBUG_ERROR, "SPI flash chip VID = 0x%X, DID0 = 0x%X, DID1 = 0x%X\n", SfId[0], SfId[1], SfId[2]));\r
+\r
+  if (FlashIndex < EnumSpiFlashMax)  {\r
+    return EFI_SUCCESS;\r
+  } else {\r
+  if (SpiReadError != 0) {\r
+      DEBUG ((DEBUG_ERROR, "ERROR - SPI Read ID execution failed! Error Count = %d\n", SpiReadError));\r
+   }\r
+    else {\r
+      if (SpiNotMatchError != 0) {\r
+        DEBUG ((DEBUG_ERROR, "ERROR - No supported SPI flash chip found! Error Count = %d\n", SpiNotMatchError));\r
+        DEBUG ((DEBUG_ERROR, "SPI flash chip VID = 0x%X, DID0 = 0x%X, DID1 = 0x%X\n", SfId[0], SfId[1], SfId[2]));\r
+      }\r
+    }\r
+    return EFI_UNSUPPORTED;\r
+  }\r
+}\r
+\r
index 955b247..3331432 100644 (file)
@@ -16,7 +16,7 @@
 \r
 [Defines]\r
   INF_VERSION                    = 0x00010005\r
-  BASE_NAME                      = FlashDeviceLibRuntimeSmm\r
+  BASE_NAME                      = FlashDeviceLib\r
   FILE_GUID                      = E38A1C3C-928C-4bf7-B6C1-7F0EF163FAA5\r
   MODULE_TYPE                    = DXE_DRIVER\r
   VERSION_STRING                 = 1.0\r
@@ -32,7 +32,6 @@
 \r
 [Sources]\r
   FlashDeviceLib.c\r
-  FlashDeviceLibDxeRuntimeSmm.c\r
 \r
 \r
 [Packages]\r
@@ -44,9 +43,6 @@
 [LibraryClasses]\r
   DebugLib\r
 \r
-[Guids]\r
-  gEfiEventVirtualAddressChangeGuid\r
-\r
 [Protocols]\r
   gEfiSpiProtocolGuid\r
   gEfiSmmSpiProtocolGuid\r
index fdf742c..954aadc 100644 (file)
@@ -17,6 +17,7 @@
 #include <Library/SpiFlash.H>\r
 \r
 #define FLASH_SIZE  0x400000\r
+#define FLASH_DEVICE_BASE_ADDRESS (0xFFFFFFFF-FLASH_SIZE+1)\r
 \r
 //\r
 // Serial Flash device initialization data table provided to the\r