IntelFrameworkPkg/DxeIoLibCpuIo: Add new Fifo routines in IoLib class

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Jeff Fan <jeff.fan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Brijesh Singh <brijesh.singh@amd.com>
Signed-off-by: Leo Duran  <leo.duran@amd.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>

diff --git a/IntelFrameworkPkg/Library/DxeIoLibCpuIo/DxeCpuIoLibInternal.h b/IntelFrameworkPkg/Library/DxeIoLibCpuIo/DxeCpuIoLibInternal.h
index 66c73fefd44a7b0a0ef332953ef30ba8d9ec4a7b..c15bca8ee482d440890ff4aca794c71c197737d4 100644 (file)
--- a/IntelFrameworkPkg/Library/DxeIoLibCpuIo/DxeCpuIoLibInternal.h
+++ b/IntelFrameworkPkg/Library/DxeIoLibCpuIo/DxeCpuIoLibInternal.h
@@ -5,6 +5,8 @@
   all source code of this library instance.\r
   \r
   Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>\r
+  Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>\r
+\r
   This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
   which accompanies this distribution.  The full text of the license may be found at\r
@@ -35,8 +37,10 @@
   Reads registers in the EFI CPU I/O space.\r
 \r
   Reads the I/O port specified by Port with registers width specified by Width.\r
-  The read value is returned. If such operations are not supported, then ASSERT().\r
+  The read value is returned.\r
+\r
   This function must guarantee that all I/O read and write operations are serialized.\r
+  If such operations are not supported, then ASSERT().\r
 \r
   @param  Port          The base address of the I/O operation.\r
                         The caller is responsible for aligning the Address if required.\r
@@ -48,16 +52,18 @@
 UINT64\r
 EFIAPI\r
 IoReadWorker (\r
-  IN      UINTN                     Port,\r
-  IN      EFI_CPU_IO_PROTOCOL_WIDTH Width\r
+  IN      UINTN                      Port,\r
+  IN      EFI_CPU_IO_PROTOCOL_WIDTH  Width\r
   );\r
 \r
 /**\r
   Writes registers in the EFI CPU I/O space.\r
 \r
   Writes the I/O port specified by Port with registers width and value specified by Width\r
-  and Data respectively.  Data is returned. If such operations are not supported, then ASSERT().\r
+  and Data respectively. Data is returned.\r
+\r
   This function must guarantee that all I/O read and write operations are serialized.\r
+  If such operations are not supported, then ASSERT().\r
 \r
   @param  Port          The base address of the I/O operation.\r
                         The caller is responsible for aligning the Address if required.\r
@@ -70,9 +76,59 @@ IoReadWorker (
 UINT64\r
 EFIAPI\r
 IoWriteWorker (\r
-  IN      UINTN                     Port,\r
-  IN      EFI_CPU_IO_PROTOCOL_WIDTH Width,\r
-  IN      UINT64                    Data\r
+  IN      UINTN                      Port,\r
+  IN      EFI_CPU_IO_PROTOCOL_WIDTH  Width,\r
+  IN      UINT64                     Data\r
+  );\r
+\r
+/**\r
+  Reads registers in the EFI CPU I/O space.\r
+\r
+  Reads the I/O port specified by Port with registers width specified by Width.\r
+  The port is read Count times, and the read data is stored in the provided Buffer.\r
+\r
+  This function must guarantee that all I/O read and write operations are serialized.\r
+  If such operations are not supported, then ASSERT().\r
+\r
+  @param  Port          The base address of the I/O operation.\r
+                        The caller is responsible for aligning the Address if required.\r
+  @param  Width         The width of the I/O operation.\r
+  @param  Count         The number of times to read I/O port.\r
+  @param  Buffer        The buffer to store the read data into.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+IoReadFifoWorker (\r
+  IN      UINTN                      Port,\r
+  IN      EFI_CPU_IO_PROTOCOL_WIDTH  Width,\r
+  IN      UINTN                      Count,\r
+  IN      VOID                       *Buffer\r
+  );\r
+\r
+/**\r
+  Writes registers in the EFI CPU I/O space.\r
+\r
+  Writes the I/O port specified by Port with registers width specified by Width.\r
+  The port is written Count times, and the write data is retrieved from the provided Buffer.\r
+\r
+  This function must guarantee that all I/O read and write operations are serialized.\r
+  If such operations are not supported, then ASSERT().\r
+\r
+  @param  Port          The base address of the I/O operation.\r
+                        The caller is responsible for aligning the Address if required.\r
+  @param  Width         The width of the I/O operation.\r
+  @param  Count         The number of times to write I/O port.\r
+  @param  Buffer        The buffer to store the read data into.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+IoWriteFifoWorker (\r
+  IN      UINTN                      Port,\r
+  IN      EFI_CPU_IO_PROTOCOL_WIDTH  Width,\r
+  IN      UINTN                      Count,\r
+  IN      VOID                       *Buffer\r
   );\r
 \r
 /**\r

diff --git a/IntelFrameworkPkg/Library/DxeIoLibCpuIo/IoLib.c b/IntelFrameworkPkg/Library/DxeIoLibCpuIo/IoLib.c
index c1c48d5e626323d0e248ea068eb903abd6d8a569..1dbc362f093438e5973546b7c1829c710aa5bf2b 100644 (file)
--- a/IntelFrameworkPkg/Library/DxeIoLibCpuIo/IoLib.c
+++ b/IntelFrameworkPkg/Library/DxeIoLibCpuIo/IoLib.c
@@ -4,6 +4,8 @@
   are based on EFI_CPU_IO_PROTOCOL.\r
   \r
   Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>\r
+  Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>\r
+\r
   This program and the accompanying materials\r
   are licensed and made available under the terms and conditions of the BSD License\r
   which accompanies this distribution.  The full text of the license may be found at\r
@@ -112,6 +114,68 @@ IoWriteWorker (
   return Data;\r
 }\r
 \r
+/**\r
+  Reads registers in the EFI CPU I/O space.\r
+\r
+  Reads the I/O port specified by Port with registers width specified by Width.\r
+  The port is read Count times, and the read data is stored in the provided Buffer.\r
+\r
+  This function must guarantee that all I/O read and write operations are serialized.\r
+  If such operations are not supported, then ASSERT().\r
+\r
+  @param  Port          The base address of the I/O operation.\r
+                        The caller is responsible for aligning the Address if required.\r
+  @param  Width         The width of the I/O operation.\r
+  @param  Count         The number of times to read I/O port.\r
+  @param  Buffer        The buffer to store the read data into.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+IoReadFifoWorker (\r
+  IN      UINTN                      Port,\r
+  IN      EFI_CPU_IO_PROTOCOL_WIDTH  Width,\r
+  IN      UINTN                      Count,\r
+  IN      VOID                       *Buffer\r
+  )\r
+{\r
+  EFI_STATUS  Status;\r
+\r
+  Status = mCpuIo->Io.Read (mCpuIo, Width, Port, Count, Buffer);\r
+  ASSERT_EFI_ERROR (Status);\r
+}\r
+\r
+/**\r
+  Writes registers in the EFI CPU I/O space.\r
+\r
+  Writes the I/O port specified by Port with registers width specified by Width.\r
+  The port is written Count times, and the write data is retrieved from the provided Buffer.\r
+\r
+  This function must guarantee that all I/O read and write operations are serialized.\r
+  If such operations are not supported, then ASSERT().\r
+\r
+  @param  Port          The base address of the I/O operation.\r
+                        The caller is responsible for aligning the Address if required.\r
+  @param  Width         The width of the I/O operation.\r
+  @param  Count         The number of times to write I/O port.\r
+  @param  Buffer        The buffer to store the read data into.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+IoWriteFifoWorker (\r
+  IN      UINTN                      Port,\r
+  IN      EFI_CPU_IO_PROTOCOL_WIDTH  Width,\r
+  IN      UINTN                      Count,\r
+  IN      VOID                       *Buffer\r
+  )\r
+{\r
+  EFI_STATUS  Status;\r
+\r
+  Status = mCpuIo->Io.Write (mCpuIo, Width, Port, Count, Buffer);\r
+  ASSERT_EFI_ERROR (Status);\r
+}\r
+\r
 /**\r
   Reads memory-mapped registers in the EFI system memory space.\r
 \r
@@ -401,6 +465,190 @@ IoWrite64 (
   return IoWriteWorker (Port, EfiCpuIoWidthUint64, Value);\r
 }\r
 \r
+/**\r
+  Reads an 8-bit I/O port fifo into a block of memory.\r
+\r
+  Reads the 8-bit I/O fifo port specified by Port.\r
+  The port is read Count times, and the read data is\r
+  stored in the provided Buffer.\r
+\r
+  This function must guarantee that all I/O read and write operations are\r
+  serialized.\r
+\r
+  If 8-bit I/O port operations are not supported, then ASSERT().\r
+\r
+  @param  Port    The I/O port to read.\r
+  @param  Count   The number of times to read I/O port.\r
+  @param  Buffer  The buffer to store the read data into.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+IoReadFifo8 (\r
+  IN      UINTN                     Port,\r
+  IN      UINTN                     Count,\r
+  OUT     VOID                      *Buffer\r
+  )\r
+{\r
+  IoReadFifoWorker (Port, EfiCpuIoWidthFifoUint8, Count, Buffer);\r
+}\r
+\r
+/**\r
+  Writes a block of memory into an 8-bit I/O port fifo.\r
+\r
+  Writes the 8-bit I/O fifo port specified by Port.\r
+  The port is written Count times, and the write data is\r
+  retrieved from the provided Buffer.\r
+\r
+  This function must guarantee that all I/O write and write operations are\r
+  serialized.\r
+\r
+  If 8-bit I/O port operations are not supported, then ASSERT().\r
+\r
+  @param  Port    The I/O port to write.\r
+  @param  Count   The number of times to write I/O port.\r
+  @param  Buffer  The buffer to retrieve the write data from.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+IoWriteFifo8 (\r
+  IN      UINTN                     Port,\r
+  IN      UINTN                     Count,\r
+  IN      VOID                      *Buffer\r
+  )\r
+{\r
+  IoWriteFifoWorker (Port, EfiCpuIoWidthFifoUint8, Count, Buffer);\r
+}\r
+\r
+/**\r
+  Reads a 16-bit I/O port fifo into a block of memory.\r
+\r
+  Reads the 16-bit I/O fifo port specified by Port.\r
+  The port is read Count times, and the read data is\r
+  stored in the provided Buffer.\r
+\r
+  This function must guarantee that all I/O read and write operations are\r
+  serialized.\r
+\r
+  If 16-bit I/O port operations are not supported, then ASSERT().\r
+\r
+  @param  Port    The I/O port to read.\r
+  @param  Count   The number of times to read I/O port.\r
+  @param  Buffer  The buffer to store the read data into.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+IoReadFifo16 (\r
+  IN      UINTN                     Port,\r
+  IN      UINTN                     Count,\r
+  OUT     VOID                      *Buffer\r
+  )\r
+{\r
+  //\r
+  // Make sure Port is aligned on a 16-bit boundary.\r
+  //\r
+  ASSERT ((Port & 1) == 0);\r
+  IoReadFifoWorker (Port, EfiCpuIoWidthFifoUint16, Count, Buffer);\r
+}\r
+\r
+/**\r
+  Writes a block of memory into a 16-bit I/O port fifo.\r
+\r
+  Writes the 16-bit I/O fifo port specified by Port.\r
+  The port is written Count times, and the write data is\r
+  retrieved from the provided Buffer.\r
+\r
+  This function must guarantee that all I/O write and write operations are\r
+  serialized.\r
+\r
+  If 16-bit I/O port operations are not supported, then ASSERT().\r
+\r
+  @param  Port    The I/O port to write.\r
+  @param  Count   The number of times to write I/O port.\r
+  @param  Buffer  The buffer to retrieve the write data from.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+IoWriteFifo16 (\r
+  IN      UINTN                     Port,\r
+  IN      UINTN                     Count,\r
+  IN      VOID                      *Buffer\r
+  )\r
+{\r
+  //\r
+  // Make sure Port is aligned on a 16-bit boundary.\r
+  //\r
+  ASSERT ((Port & 1) == 0);\r
+  IoWriteFifoWorker (Port, EfiCpuIoWidthFifoUint16, Count, Buffer);\r
+}\r
+\r
+/**\r
+  Reads a 32-bit I/O port fifo into a block of memory.\r
+\r
+  Reads the 32-bit I/O fifo port specified by Port.\r
+  The port is read Count times, and the read data is\r
+  stored in the provided Buffer.\r
+\r
+  This function must guarantee that all I/O read and write operations are\r
+  serialized.\r
+\r
+  If 32-bit I/O port operations are not supported, then ASSERT().\r
+\r
+  @param  Port    The I/O port to read.\r
+  @param  Count   The number of times to read I/O port.\r
+  @param  Buffer  The buffer to store the read data into.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+IoReadFifo32 (\r
+  IN      UINTN                     Port,\r
+  IN      UINTN                     Count,\r
+  OUT     VOID                      *Buffer\r
+  )\r
+{\r
+  //\r
+  // Make sure Port is aligned on a 32-bit boundary.\r
+  //\r
+  ASSERT ((Port & 3) == 0);\r
+  IoReadFifoWorker (Port, EfiCpuIoWidthFifoUint32, Count, Buffer);\r
+}\r
+\r
+/**\r
+  Writes a block of memory into a 32-bit I/O port fifo.\r
+\r
+  Writes the 32-bit I/O fifo port specified by Port.\r
+  The port is written Count times, and the write data is\r
+  retrieved from the provided Buffer.\r
+\r
+  This function must guarantee that all I/O write and write operations are\r
+  serialized.\r
+\r
+  If 32-bit I/O port operations are not supported, then ASSERT().\r
+\r
+  @param  Port    The I/O port to write.\r
+  @param  Count   The number of times to write I/O port.\r
+  @param  Buffer  The buffer to retrieve the write data from.\r
+\r
+**/\r
+VOID\r
+EFIAPI\r
+IoWriteFifo32 (\r
+  IN      UINTN                     Port,\r
+  IN      UINTN                     Count,\r
+  IN      VOID                      *Buffer\r
+  )\r
+{\r
+  //\r
+  // Make sure Port is aligned on a 32-bit boundary.\r
+  //\r
+  ASSERT ((Port & 3) == 0);\r
+  IoWriteFifoWorker (Port, EfiCpuIoWidthFifoUint32, Count, Buffer);\r
+}\r
+\r
 /**\r
   Reads an 8-bit MMIO register.\r
 \r