-/** @file\r
- Header file of Serial port hardware definition.\r
-\r
- Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>\r
- \r\r
- This program and the accompanying materials are licensed and made available under\r\r
- the terms and conditions of the BSD License that accompanies this distribution. \r\r
- The full text of the license may be found at \r\r
- http://opensource.org/licenses/bsd-license.php. \r\r
- \r\r
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r\r
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r\r
- \r\r
- This software and associated documentation\r
- (if any) is furnished under a license and may only be used or\r
- copied in accordance with the terms of the license. Except as\r
- permitted by such license, no part of this software or\r
- documentation may be reproduced, stored in a retrieval system, or\r
- transmitted in any form or by any means without the express written\r
- consent of Intel Corporation.\r
-\r
- Module Name: PlatformSerialPortLib.h\r
-\r
-**/\r
-\r
-#ifndef __PLATFORM_SERIAL_PORT_LIB_H_\r
-#define __PLATFORM_SERIAL_PORT_LIB_H_\r
-\r
-#include <Base.h>\r
-#include <Library/BaseLib.h>\r
-#include <Library/IoLib.h>\r
-#include <Library/PcdLib.h>\r
-#include <Library/SerialPortLib.h>\r
-\r
-//\r
-// UART Register Offsets\r
-//\r
-#define BAUD_LOW_OFFSET 0x00\r
-#define BAUD_HIGH_OFFSET 0x01\r
-#define IER_OFFSET 0x01\r
-#define LCR_SHADOW_OFFSET 0x01\r
-#define FCR_SHADOW_OFFSET 0x02\r
-#define IR_CONTROL_OFFSET 0x02\r
-#define FCR_OFFSET 0x02\r
-#define EIR_OFFSET 0x02\r
-#define BSR_OFFSET 0x03\r
-#define LCR_OFFSET 0x03\r
-#define MCR_OFFSET 0x04\r
-#define LSR_OFFSET 0x05\r
-#define MSR_OFFSET 0x06\r
-\r
-//\r
-// UART Register Bit Defines\r
-//\r
-#define LSR_TXRDY 0x20\r
-#define LSR_RXDA 0x01\r
-#define DLAB 0x01\r
-\r
-#define UART_DATA 8\r
-#define UART_STOP 1\r
-#define UART_PARITY 0\r
-#define UART_BREAK_SET 0\r
-\r
-VOID\r
-InitializeSio (\r
- VOID\r
- );\r
-\r
-#endif\r
+/** @file
+ Header file of Serial port hardware definition.
+
+ Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>
+ \r
+ This program and the accompanying materials are licensed and made available under\r
+ the terms and conditions of the BSD License that accompanies this distribution. \r
+ The full text of the license may be found at \r
+ http://opensource.org/licenses/bsd-license.php. \r
+ \r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef __PLATFORM_SERIAL_PORT_LIB_H_
+#define __PLATFORM_SERIAL_PORT_LIB_H_
+
+#include <Base.h>
+#include <Library/BaseLib.h>
+#include <Library/IoLib.h>
+#include <Library/PcdLib.h>
+#include <Library/SerialPortLib.h>
+
+//
+// UART Register Offsets
+//
+#define BAUD_LOW_OFFSET 0x00
+#define BAUD_HIGH_OFFSET 0x01
+#define IER_OFFSET 0x01
+#define LCR_SHADOW_OFFSET 0x01
+#define FCR_SHADOW_OFFSET 0x02
+#define IR_CONTROL_OFFSET 0x02
+#define FCR_OFFSET 0x02
+#define EIR_OFFSET 0x02
+#define BSR_OFFSET 0x03
+#define LCR_OFFSET 0x03
+#define MCR_OFFSET 0x04
+#define LSR_OFFSET 0x05
+#define MSR_OFFSET 0x06
+
+//
+// UART Register Bit Defines
+//
+#define LSR_TXRDY 0x20
+#define LSR_RXDA 0x01
+#define DLAB 0x01
+
+#define UART_DATA 8
+#define UART_STOP 1
+#define UART_PARITY 0
+#define UART_BREAK_SET 0
+
+VOID
+InitializeSio (
+ VOID
+ );
+
+#endif
-/** @file\r
- Serial I/O Port library functions with no library constructor/destructor\r
-\r
- Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>\r
- \r\r
- This program and the accompanying materials are licensed and made available under\r\r
- the terms and conditions of the BSD License that accompanies this distribution. \r\r
- The full text of the license may be found at \r\r
- http://opensource.org/licenses/bsd-license.php. \r\r
- \r\r
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r\r
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r\r
- \r\r
- This software and associated documentation\r
- (if any) is furnished under a license and may only be used or\r
- copied in accordance with the terms of the license. Except as\r
- permitted by such license, no part of this software or\r
- documentation may be reproduced, stored in a retrieval system, or\r
- transmitted in any form or by any means without the express written\r
- consent of Intel Corporation.\r
-\r
- Module Name: SerialPortLib.c\r
-\r
-**/\r
-\r
-#include "PlatformSerialPortLib.h"\r
-\r
-UINT16 gComBase = 0x3f8;\r
-UINTN gBps = 115200;\r
-UINT8 gData = 8;\r
-UINT8 gStop = 1;\r
-UINT8 gParity = 0;\r
-UINT8 gBreakSet = 0;\r
-\r
-/**\r
- Initialize Serial Port\r
-\r
- The Baud Rate Divisor registers are programmed and the LCR\r
- is used to configure the communications format. Hard coded\r
- UART config comes from globals in DebugSerialPlatform lib.\r
-\r
- @param None\r
-\r
- @retval None\r
-\r
-**/\r
-RETURN_STATUS\r
-EFIAPI\r
-UARTInitialize (\r
- VOID\r
- )\r
-{\r
- UINTN Divisor;\r
- UINT8 OutputData;\r
- UINT8 Data;\r
-\r
- //\r
- // Map 5..8 to 0..3\r
- //\r
- Data = (UINT8) (gData - (UINT8) 5);\r
-\r
- //\r
- // Calculate divisor for baud generator\r
- //\r
- Divisor = 115200 / gBps;\r
-\r
- //\r
- // Set communications format\r
- //\r
- OutputData = (UINT8) ((DLAB << 7) | ((gBreakSet << 6) | ((gParity << 3) | ((gStop << 2) | Data))));\r
- IoWrite8 (gComBase + LCR_OFFSET, OutputData);\r
-\r
- //\r
- // Configure baud rate\r
- //\r
- IoWrite8 (gComBase + BAUD_HIGH_OFFSET, (UINT8) (Divisor >> 8));\r
- IoWrite8 (gComBase + BAUD_LOW_OFFSET, (UINT8) (Divisor & 0xff));\r
-\r
- //\r
- // Switch back to bank 0\r
- //\r
- OutputData = (UINT8) ((~DLAB << 7) | ((gBreakSet << 6) | ((gParity << 3) | ((gStop << 2) | Data))));\r
- IoWrite8 (gComBase + LCR_OFFSET, OutputData);\r
-\r
- return RETURN_SUCCESS;\r
-}\r
-\r
-/**\r
- Common function to initialize UART Serial device and USB Serial device.\r
-\r
- @param None\r
-\r
- @retval None\r
-\r
-**/\r
-RETURN_STATUS\r
-EFIAPI\r
-SerialPortInitialize (\r
- VOID\r
- )\r
-{\r
-\r
- UARTInitialize ();\r
-\r
-\r
- return RETURN_SUCCESS;\r
-}\r
-\r
-/**\r
- Write data to serial device.\r
-\r
- If the buffer is NULL, then return 0;\r
- if NumberOfBytes is zero, then return 0.\r
-\r
- @param Buffer Point of data buffer which need to be writed.\r
- @param NumberOfBytes Number of output bytes which are cached in Buffer.\r
-\r
- @retval 0 Write data failed.\r
- @retval !0 Actual number of bytes writed to serial device.\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-UARTDbgOut (\r
- IN UINT8 *Buffer,\r
- IN UINTN NumberOfBytes\r
-)\r
-{\r
- UINTN Result;\r
- UINT8 Data;\r
-\r
- if (NULL == Buffer) {\r
- return 0;\r
- }\r
-\r
- Result = NumberOfBytes;\r
-\r
- while (NumberOfBytes--) {\r
- //\r
- // Wait for the serial port to be ready.\r
- //\r
- do {\r
- Data = IoRead8 ((UINT16) PcdGet64 (PcdSerialRegisterBase) + LSR_OFFSET);\r
- } while ((Data & LSR_TXRDY) == 0);\r
- IoWrite8 ((UINT16) PcdGet64 (PcdSerialRegisterBase), *Buffer++);\r
- }\r
-\r
- return Result;\r
-}\r
-\r
-/**\r
- Common function to write data to UART Serial device and USB Serial device.\r
-\r
- @param Buffer Point of data buffer which need to be writed.\r
- @param NumberOfBytes Number of output bytes which are cached in Buffer.\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-SerialPortWrite (\r
- IN UINT8 *Buffer,\r
- IN UINTN NumberOfBytes\r
-)\r
-{\r
- if (FeaturePcdGet (PcdStatusCodeUseIsaSerial)) {\r
- UARTDbgOut (Buffer, NumberOfBytes);\r
- }\r
-\r
- return RETURN_SUCCESS;\r
-}\r
-\r
-/**\r
- Read data from serial device and save the datas in buffer.\r
-\r
- If the buffer is NULL, then return 0;\r
- if NumberOfBytes is zero, then return 0.\r
-\r
- @param Buffer Point of data buffer which need to be writed.\r
- @param NumberOfBytes Number of output bytes which are cached in Buffer.\r
-\r
- @retval 0 Read data failed.\r
- @retval !0 Actual number of bytes raed to serial device.\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-UARTDbgIn (\r
- OUT UINT8 *Buffer,\r
- IN UINTN NumberOfBytes\r
-)\r
-{\r
- UINTN Result;\r
- UINT8 Data;\r
-\r
- if (NULL == Buffer) {\r
- return 0;\r
- }\r
-\r
- Result = NumberOfBytes;\r
-\r
- while (NumberOfBytes--) {\r
- //\r
- // Wait for the serial port to be ready.\r
- //\r
- do {\r
- Data = IoRead8 ((UINT16) PcdGet64 (PcdSerialRegisterBase) + LSR_OFFSET);\r
- } while ((Data & LSR_RXDA) == 0);\r
-\r
- *Buffer++ = IoRead8 ((UINT16) PcdGet64 (PcdSerialRegisterBase));\r
- }\r
-\r
- return Result;\r
-}\r
-\r
-/**\r
- Common function to Read data from UART serial device, USB serial device and save the datas in buffer.\r
-\r
- @param Buffer Point of data buffer which need to be writed.\r
- @param NumberOfBytes Number of output bytes which are cached in Buffer.\r
-\r
-**/\r
-UINTN\r
-EFIAPI\r
-SerialPortRead (\r
- OUT UINT8 *Buffer,\r
- IN UINTN NumberOfBytes\r
-)\r
-{\r
- if (FeaturePcdGet (PcdStatusCodeUseIsaSerial)) {\r
- UARTDbgIn (Buffer, NumberOfBytes);\r
- }\r
-\r
- return RETURN_SUCCESS;\r
-}\r
-\r
-\r
-/**\r
- Polls a serial device to see if there is any data waiting to be read.\r
-\r
- Polls aserial device to see if there is any data waiting to be read.\r
- If there is data waiting to be read from the serial device, then TRUE is returned.\r
- If there is no data waiting to be read from the serial device, then FALSE is returned.\r
-\r
- @retval TRUE Data is waiting to be read from the serial device.\r
- @retval FALSE There is no data waiting to be read from the serial device.\r
-\r
-**/\r
-BOOLEAN\r
-EFIAPI\r
-SerialPortPoll (\r
- VOID\r
- )\r
-{\r
- UINT8 Data;\r
-\r
- //\r
- // Read the serial port status.\r
- //\r
- Data = IoRead8 ((UINT16) PcdGet64 (PcdSerialRegisterBase) + LSR_OFFSET);\r
-\r
- return (BOOLEAN) ((Data & LSR_RXDA) != 0);\r
-}\r
+/** @file
+ Serial I/O Port library functions with no library constructor/destructor
+
+ Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>
+ \r
+ This program and the accompanying materials are licensed and made available under\r
+ the terms and conditions of the BSD License that accompanies this distribution. \r
+ The full text of the license may be found at \r
+ http://opensource.org/licenses/bsd-license.php. \r
+ \r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#include "PlatformSerialPortLib.h"
+
+UINT16 gComBase = 0x3f8;
+UINTN gBps = 115200;
+UINT8 gData = 8;
+UINT8 gStop = 1;
+UINT8 gParity = 0;
+UINT8 gBreakSet = 0;
+
+/**
+ Initialize Serial Port
+
+ The Baud Rate Divisor registers are programmed and the LCR
+ is used to configure the communications format. Hard coded
+ UART config comes from globals in DebugSerialPlatform lib.
+
+ @param None
+
+ @retval None
+
+**/
+RETURN_STATUS
+EFIAPI
+UARTInitialize (
+ VOID
+ )
+{
+ UINTN Divisor;
+ UINT8 OutputData;
+ UINT8 Data;
+
+ //
+ // Map 5..8 to 0..3
+ //
+ Data = (UINT8) (gData - (UINT8) 5);
+
+ //
+ // Calculate divisor for baud generator
+ //
+ Divisor = 115200 / gBps;
+
+ //
+ // Set communications format
+ //
+ OutputData = (UINT8) ((DLAB << 7) | ((gBreakSet << 6) | ((gParity << 3) | ((gStop << 2) | Data))));
+ IoWrite8 (gComBase + LCR_OFFSET, OutputData);
+
+ //
+ // Configure baud rate
+ //
+ IoWrite8 (gComBase + BAUD_HIGH_OFFSET, (UINT8) (Divisor >> 8));
+ IoWrite8 (gComBase + BAUD_LOW_OFFSET, (UINT8) (Divisor & 0xff));
+
+ //
+ // Switch back to bank 0
+ //
+ OutputData = (UINT8) ((~DLAB << 7) | ((gBreakSet << 6) | ((gParity << 3) | ((gStop << 2) | Data))));
+ IoWrite8 (gComBase + LCR_OFFSET, OutputData);
+
+ return RETURN_SUCCESS;
+}
+
+/**
+ Common function to initialize UART Serial device and USB Serial device.
+
+ @param None
+
+ @retval None
+
+**/
+RETURN_STATUS
+EFIAPI
+SerialPortInitialize (
+ VOID
+ )
+{
+
+ UARTInitialize ();
+
+
+ return RETURN_SUCCESS;
+}
+
+/**
+ Write data to serial device.
+
+ If the buffer is NULL, then return 0;
+ if NumberOfBytes is zero, then return 0.
+
+ @param Buffer Point of data buffer which need to be writed.
+ @param NumberOfBytes Number of output bytes which are cached in Buffer.
+
+ @retval 0 Write data failed.
+ @retval !0 Actual number of bytes writed to serial device.
+
+**/
+UINTN
+EFIAPI
+UARTDbgOut (
+ IN UINT8 *Buffer,
+ IN UINTN NumberOfBytes
+)
+{
+ UINTN Result;
+ UINT8 Data;
+
+ if (NULL == Buffer) {
+ return 0;
+ }
+
+ Result = NumberOfBytes;
+
+ while (NumberOfBytes--) {
+ //
+ // Wait for the serial port to be ready.
+ //
+ do {
+ Data = IoRead8 ((UINT16) PcdGet64 (PcdSerialRegisterBase) + LSR_OFFSET);
+ } while ((Data & LSR_TXRDY) == 0);
+ IoWrite8 ((UINT16) PcdGet64 (PcdSerialRegisterBase), *Buffer++);
+ }
+
+ return Result;
+}
+
+/**
+ Common function to write data to UART Serial device and USB Serial device.
+
+ @param Buffer Point of data buffer which need to be writed.
+ @param NumberOfBytes Number of output bytes which are cached in Buffer.
+
+**/
+UINTN
+EFIAPI
+SerialPortWrite (
+ IN UINT8 *Buffer,
+ IN UINTN NumberOfBytes
+)
+{
+ if (FeaturePcdGet (PcdStatusCodeUseIsaSerial)) {
+ UARTDbgOut (Buffer, NumberOfBytes);
+ }
+
+ return RETURN_SUCCESS;
+}
+
+/**
+ Read data from serial device and save the datas in buffer.
+
+ If the buffer is NULL, then return 0;
+ if NumberOfBytes is zero, then return 0.
+
+ @param Buffer Point of data buffer which need to be writed.
+ @param NumberOfBytes Number of output bytes which are cached in Buffer.
+
+ @retval 0 Read data failed.
+ @retval !0 Actual number of bytes raed to serial device.
+
+**/
+UINTN
+EFIAPI
+UARTDbgIn (
+ OUT UINT8 *Buffer,
+ IN UINTN NumberOfBytes
+)
+{
+ UINTN Result;
+ UINT8 Data;
+
+ if (NULL == Buffer) {
+ return 0;
+ }
+
+ Result = NumberOfBytes;
+
+ while (NumberOfBytes--) {
+ //
+ // Wait for the serial port to be ready.
+ //
+ do {
+ Data = IoRead8 ((UINT16) PcdGet64 (PcdSerialRegisterBase) + LSR_OFFSET);
+ } while ((Data & LSR_RXDA) == 0);
+
+ *Buffer++ = IoRead8 ((UINT16) PcdGet64 (PcdSerialRegisterBase));
+ }
+
+ return Result;
+}
+
+/**
+ Common function to Read data from UART serial device, USB serial device and save the datas in buffer.
+
+ @param Buffer Point of data buffer which need to be writed.
+ @param NumberOfBytes Number of output bytes which are cached in Buffer.
+
+**/
+UINTN
+EFIAPI
+SerialPortRead (
+ OUT UINT8 *Buffer,
+ IN UINTN NumberOfBytes
+)
+{
+ if (FeaturePcdGet (PcdStatusCodeUseIsaSerial)) {
+ UARTDbgIn (Buffer, NumberOfBytes);
+ }
+
+ return RETURN_SUCCESS;
+}
+
+
+/**
+ Polls a serial device to see if there is any data waiting to be read.
+
+ Polls aserial device to see if there is any data waiting to be read.
+ If there is data waiting to be read from the serial device, then TRUE is returned.
+ If there is no data waiting to be read from the serial device, then FALSE is returned.
+
+ @retval TRUE Data is waiting to be read from the serial device.
+ @retval FALSE There is no data waiting to be read from the serial device.
+
+**/
+BOOLEAN
+EFIAPI
+SerialPortPoll (
+ VOID
+ )
+{
+ UINT8 Data;
+
+ //
+ // Read the serial port status.
+ //
+ Data = IoRead8 ((UINT16) PcdGet64 (PcdSerialRegisterBase) + LSR_OFFSET);
+
+ return (BOOLEAN) ((Data & LSR_RXDA) != 0);
+}
-/** @file\r
- Header file of Serial port hardware definition.\r
-\r
- Copyright (c) 2012 - 2014, Intel Corporation. All rights reserved.<BR>\r
- \r\r
- This program and the accompanying materials are licensed and made available under\r\r
- the terms and conditions of the BSD License that accompanies this distribution. \r\r
- The full text of the license may be found at \r\r
- http://opensource.org/licenses/bsd-license.php. \r\r
- \r\r
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r\r
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r\r
- \r\r
- This software and associated documentation\r
- (if any) is furnished under a license and may only be used or\r
- copied in accordance with the terms of the license. Except as\r
- permitted by such license, no part of this software or\r
- documentation may be reproduced, stored in a retrieval system, or\r
- transmitted in any form or by any means without the express written\r
- consent of Intel Corporation.\r
-\r
- Module Name: PlatformSerialPortLib.h\r
-\r
-**/\r
-\r
-#ifndef _SIO_INIT_H_\r
-#define _SIO_INIT_H_\r
-\r
-#define WPCN381U_CONFIG_INDEX 0x2E\r
-#define WPCN381U_CONFIG_DATA 0x2F\r
-#define WPCN381U_CONFIG_INDEX1 0x164E\r
-#define WPCN381U_CONFIG_DATA1 0x164F\r
-#define WPCN381U_CHIP_ID 0xF4\r
-#define WDCP376_CHIP_ID 0xF1\r
-\r
-//\r
-// SIO Logical Devices Numbers\r
-//\r
-#define WPCN381U_LDN_UART0 0x03 // LDN for Serial Port Controller\r
-#define WPCN381U_LDN_UART1 0x02 // LDN for Parallel Port Controller\r
-#define WPCN381U_LDN_PS2K 0x06 // LDN for PS2 Keyboard Controller\r
-#define WPCN381U_LDN_PS2M 0x05 // LDN for PS2 Mouse Controller\r
-#define WPCN381U_KB_BASE1_ADDRESS 0x60 // Base Address of KB controller\r
-#define WPCN381U_KB_BASE2_ADDRESS 0x64 // Base Address of KB controller\r
-#define SIO_KBC_CLOCK 0x01 // 0/1/2 - 8/12/16 MHz KBC Clock Source\r
-#define WPCN381U_LDN_GPIO 0x07 // LDN for GPIO\r
-\r
-//\r
-// SIO Registers Layout\r
-//\r
-#define WPCN381U_LD_SEL_REGISTER 0x07 // Logical Device Select Register Address\r
-#define WPCN381U_DEV_ID_REGISTER 0x20 // Device Identification Register Address\r
-#define WPCN381U_ACTIVATE_REGISTER 0x30 // Device Identification Register Address\r
-#define WPCN381U_BASE1_HI_REGISTER 0x60 // Device BaseAddres Register #1 MSB Address\r
-#define WPCN381U_BASE1_LO_REGISTER 0x61 // Device BaseAddres Register #1 LSB Address\r
-#define WPCN381U_BASE2_HI_REGISTER 0x62 // Device BaseAddres Register #1 MSB Address\r
-#define WPCN381U_BASE2_LO_REGISTER 0x63 // Device Ba1eAddres Register #1 LSB Address\r
-#define WPCN381U_IRQ1_REGISTER 0x70 // Device IRQ Register #1 Address\r
-#define WPCN381U_IRQ2_REGISTER 0x71 // Device IRQ Register #2 Address\r
-\r
-//\r
-// SIO Activation Values\r
-//\r
-#define WPCN381U_ACTIVATE_VALUE 0x01 // Value to activate Device\r
-#define WPCN381U_DEACTIVATE_VALUE 0x00 // Value to deactivate Device\r
-\r
-//\r
-// SIO GPIO\r
-//\r
-#define WPCN381U_GPIO_BASE_ADDRESS 0x0A20 // SIO GPIO Base Address\r
-\r
-//\r
-// SIO Serial Port Settings\r
-//\r
-#define WPCN381U_SERIAL_PORT0_BASE_ADDRESS 0x03F8 // Base Address of Serial Port 0 (COMA / UART0)\r
-#define WPCN381U_SERIAL_PORT1_BASE_ADDRESS 0x02F8 // Base Address of Serial Port 1 (COMB / UART1)\r
-\r
-#endif\r
+/** @file
+ Header file of Serial port hardware definition.
+
+ Copyright (c) 2012 - 2017, Intel Corporation. All rights reserved.<BR>
+ \r
+ This program and the accompanying materials are licensed and made available under\r
+ the terms and conditions of the BSD License that accompanies this distribution. \r
+ The full text of the license may be found at \r
+ http://opensource.org/licenses/bsd-license.php. \r
+ \r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+
+**/
+
+#ifndef _SIO_INIT_H_
+#define _SIO_INIT_H_
+
+#define WPCN381U_CONFIG_INDEX 0x2E
+#define WPCN381U_CONFIG_DATA 0x2F
+#define WPCN381U_CONFIG_INDEX1 0x164E
+#define WPCN381U_CONFIG_DATA1 0x164F
+#define WPCN381U_CHIP_ID 0xF4
+#define WDCP376_CHIP_ID 0xF1
+
+//
+// SIO Logical Devices Numbers
+//
+#define WPCN381U_LDN_UART0 0x03 // LDN for Serial Port Controller
+#define WPCN381U_LDN_UART1 0x02 // LDN for Parallel Port Controller
+#define WPCN381U_LDN_PS2K 0x06 // LDN for PS2 Keyboard Controller
+#define WPCN381U_LDN_PS2M 0x05 // LDN for PS2 Mouse Controller
+#define WPCN381U_KB_BASE1_ADDRESS 0x60 // Base Address of KB controller
+#define WPCN381U_KB_BASE2_ADDRESS 0x64 // Base Address of KB controller
+#define SIO_KBC_CLOCK 0x01 // 0/1/2 - 8/12/16 MHz KBC Clock Source
+#define WPCN381U_LDN_GPIO 0x07 // LDN for GPIO
+
+//
+// SIO Registers Layout
+//
+#define WPCN381U_LD_SEL_REGISTER 0x07 // Logical Device Select Register Address
+#define WPCN381U_DEV_ID_REGISTER 0x20 // Device Identification Register Address
+#define WPCN381U_ACTIVATE_REGISTER 0x30 // Device Identification Register Address
+#define WPCN381U_BASE1_HI_REGISTER 0x60 // Device BaseAddres Register #1 MSB Address
+#define WPCN381U_BASE1_LO_REGISTER 0x61 // Device BaseAddres Register #1 LSB Address
+#define WPCN381U_BASE2_HI_REGISTER 0x62 // Device BaseAddres Register #1 MSB Address
+#define WPCN381U_BASE2_LO_REGISTER 0x63 // Device Ba1eAddres Register #1 LSB Address
+#define WPCN381U_IRQ1_REGISTER 0x70 // Device IRQ Register #1 Address
+#define WPCN381U_IRQ2_REGISTER 0x71 // Device IRQ Register #2 Address
+
+//
+// SIO Activation Values
+//
+#define WPCN381U_ACTIVATE_VALUE 0x01 // Value to activate Device
+#define WPCN381U_DEACTIVATE_VALUE 0x00 // Value to deactivate Device
+
+//
+// SIO GPIO
+//
+#define WPCN381U_GPIO_BASE_ADDRESS 0x0A20 // SIO GPIO Base Address
+
+//
+// SIO Serial Port Settings
+//
+#define WPCN381U_SERIAL_PORT0_BASE_ADDRESS 0x03F8 // Base Address of Serial Port 0 (COMA / UART0)
+#define WPCN381U_SERIAL_PORT1_BASE_ADDRESS 0x02F8 // Base Address of Serial Port 1 (COMB / UART1)
+
+#endif
-/*++\r
-\r
- Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>\r
- \r\r
- This program and the accompanying materials are licensed and made available under\r\r
- the terms and conditions of the BSD License that accompanies this distribution. \r\r
- The full text of the license may be found at \r\r
- http://opensource.org/licenses/bsd-license.php. \r\r
- \r\r
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r\r
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r\r
- \r\r
-\r
-Module Name:\r
-\r
- PlatformStatusCode.h\r
-\r
-Abstract:\r
-\r
- Contains Platform specific implementations required to use status codes.\r
-\r
---*/\r
-\r
-#ifndef _PLATFORM_STATUS_CODE_H_\r
-#define _PLATFORM_STATUS_CODE_H_\r
-\r
-\r
-#define CONFIG_PORT0 0x4E\r
-#define INDEX_PORT0 0x4E\r
-#define DATA_PORT0 0x4F\r
-#define PCI_IDX 0xCF8\r
-#define PCI_DAT 0xCFC\r
-\r
-#include "MonoStatusCode.h"\r
-\r
-/*++\r
-\r
-Copyright (c) 1999 - 2014, Intel Corporation. All rights reserved\r
- \r\r
- This program and the accompanying materials are licensed and made available under\r\r
- the terms and conditions of the BSD License that accompanies this distribution. \r\r
- The full text of the license may be found at \r\r
- http://opensource.org/licenses/bsd-license.php. \r\r
- \r\r
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r\r
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r\r
- \r\r
-This software and associated documentation (if any) is furnished\r
-under a license and may only be used or copied in accordance\r
-with the terms of the license. Except as permitted by such\r
-license, no part of this software or documentation may be\r
-reproduced, stored in a retrieval system, or transmitted in any\r
-form or by any means without the express written consent of\r
-Intel Corporation.\r
-\r
-\r
-Module Name:\r
-\r
- Port80StatusCodeLib.h\r
-\r
-Abstract:\r
-\r
- Lib to provide status code reporting via port 80.\r
-\r
---*/\r
-\r
-#ifndef _PEI_PORT_80_STATUS_CODE_H_\r
-#define _PEI_PORT_80_STATUS_CODE_H_\r
-\r
-\r
-\r
-//\r
-// Status code reporting function\r
-//\r
-EFI_STATUS\r
-Port80ReportStatusCode (\r
- IN CONST EFI_PEI_SERVICES **PeiServices,\r
- IN EFI_STATUS_CODE_TYPE CodeType,\r
- IN EFI_STATUS_CODE_VALUE Value,\r
- IN UINT32 Instance,\r
- IN CONST EFI_GUID * CallerId,\r
- IN CONST EFI_STATUS_CODE_DATA * Data OPTIONAL\r
- );\r
-\r
-#endif\r
-\r
-/*++\r
-\r
-Copyright (c) 1999 - 2014, Intel Corporation. All rights reserved\r
- \r\r
- This program and the accompanying materials are licensed and made available under\r\r
- the terms and conditions of the BSD License that accompanies this distribution. \r\r
- The full text of the license may be found at \r\r
- http://opensource.org/licenses/bsd-license.php. \r\r
- \r\r
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r\r
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r\r
- \r\r
-This software and associated documentation (if any) is furnished\r
-under a license and may only be used or copied in accordance\r
-with the terms of the license. Except as permitted by such\r
-license, no part of this software or documentation may be\r
-reproduced, stored in a retrieval system, or transmitted in any\r
-form or by any means without the express written consent of\r
-Intel Corporation.\r
-\r
-\r
-Module Name:\r
-\r
- SerialStatusCodeLib.h\r
-\r
-Abstract:\r
-\r
- Lib to provide Serial I/O status code reporting.\r
-\r
---*/\r
-\r
-#ifndef _PEI_SERIAL_STATUS_CODE_LIB_H_\r
-#define _PEI_SERIAL_STATUS_CODE_LIB_H_\r
-\r
-\r
-#include <Guid/StatusCodeDataTypeId.h>\r
-#include <Guid/StatusCodeDataTypeDebug.h>\r
-#include <Library/ReportStatusCodeLib.h>\r
-#include <Library/PrintLib.h>\r
-#include <Library/BaseMemoryLib.h>\r
-\r
-//\r
-// Initialization function\r
-//\r
-VOID\r
-SerialInitializeStatusCode (\r
- VOID\r
- );\r
-\r
-//\r
-// Status code reporting function\r
-//\r
-EFI_STATUS\r
-SerialReportStatusCode (\r
- IN CONST EFI_PEI_SERVICES **PeiServices,\r
- IN EFI_STATUS_CODE_TYPE CodeType,\r
- IN EFI_STATUS_CODE_VALUE Value,\r
- IN UINT32 Instance,\r
- IN CONST EFI_GUID * CallerId,\r
- IN CONST EFI_STATUS_CODE_DATA * Data OPTIONAL\r
- );\r
-\r
-#endif\r
-\r
-extern EFI_PEI_PROGRESS_CODE_PPI mStatusCodePpi;\r
-extern EFI_PEI_PPI_DESCRIPTOR mPpiListStatusCode;\r
-#define EFI_SIGNATURE_16(A, B) ((A) | (B << 8))\r
-#define EFI_SIGNATURE_32(A, B, C, D) (EFI_SIGNATURE_16 (A, B) | (EFI_SIGNATURE_16 (C, D) << 16))\r
-#define STATUSCODE_PEIM_SIGNATURE EFI_SIGNATURE_32 ('p', 's', 't', 'c')\r
-\r
-typedef struct {\r
- UINT32 Signature;\r
- EFI_FFS_FILE_HEADER *FfsHeader;\r
- EFI_PEI_NOTIFY_DESCRIPTOR StatusCodeNotify;\r
-} STATUSCODE_CALLBACK_STATE_INFORMATION;\r
-\r
-#pragma pack(1)\r
-typedef struct {\r
- UINT16 Limit;\r
- UINT32 Base;\r
-} GDT_DSCRIPTOR;\r
-#pragma pack()\r
-\r
-#define STATUSCODE_PEIM_FROM_THIS(a) \\r
- BASE_CR ( \\r
- a, \\r
- STATUSCODE_CALLBACK_STATE_INFORMATION, \\r
- StatusCodeNotify \\r
- )\r
-\r
-VOID\r
-EFIAPI\r
-PlatformInitializeStatusCode (\r
- IN EFI_FFS_FILE_HEADER *FfsHeader,\r
- IN CONST EFI_PEI_SERVICES **PeiServices\r
- );\r
-\r
-\r
-//\r
-// Function declarations\r
-//\r
-/**\r
- Install Firmware Volume Hob's once there is main memory\r
-\r
- @param PeiServices General purpose services available to every PEIM.\r
- @param NotifyDescriptor Not Used\r
- @param Ppi Not Used\r
-\r
- @retval Status EFI_SUCCESS if the interface could be successfully\r
- installed\r
-\r
-**/\r
-EFI_STATUS\r
-EFIAPI\r
-MemoryDiscoveredPpiNotifyCallback (\r
- IN EFI_PEI_SERVICES **PeiServices,\r
- IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor,\r
- IN VOID *Ppi\r
- );\r
-\r
-#endif\r
+/*++
+
+ Copyright (c) 2004 - 2017, Intel Corporation. All rights reserved.<BR>
+ \r
+ This program and the accompanying materials are licensed and made available under\r
+ the terms and conditions of the BSD License that accompanies this distribution. \r
+ The full text of the license may be found at \r
+ http://opensource.org/licenses/bsd-license.php. \r
+ \r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+ \r
+
+Module Name:
+
+ PlatformStatusCode.h
+
+Abstract:
+
+ Contains Platform specific implementations required to use status codes.
+
+--*/
+
+#ifndef _PLATFORM_STATUS_CODE_H_
+#define _PLATFORM_STATUS_CODE_H_
+
+
+#define CONFIG_PORT0 0x4E
+#define INDEX_PORT0 0x4E
+#define DATA_PORT0 0x4F
+#define PCI_IDX 0xCF8
+#define PCI_DAT 0xCFC
+
+#include "MonoStatusCode.h"
+#ifndef _PEI_PORT_80_STATUS_CODE_H_
+#define _PEI_PORT_80_STATUS_CODE_H_
+
+
+
+//
+// Status code reporting function
+//
+EFI_STATUS
+Port80ReportStatusCode (
+ IN CONST EFI_PEI_SERVICES **PeiServices,
+ IN EFI_STATUS_CODE_TYPE CodeType,
+ IN EFI_STATUS_CODE_VALUE Value,
+ IN UINT32 Instance,
+ IN CONST EFI_GUID * CallerId,
+ IN CONST EFI_STATUS_CODE_DATA * Data OPTIONAL
+ );
+
+#endif
+
+#ifndef _PEI_SERIAL_STATUS_CODE_LIB_H_
+#define _PEI_SERIAL_STATUS_CODE_LIB_H_
+
+
+#include <Guid/StatusCodeDataTypeId.h>
+#include <Guid/StatusCodeDataTypeDebug.h>
+#include <Library/ReportStatusCodeLib.h>
+#include <Library/PrintLib.h>
+#include <Library/BaseMemoryLib.h>
+
+//
+// Initialization function
+//
+VOID
+SerialInitializeStatusCode (
+ VOID
+ );
+
+//
+// Status code reporting function
+//
+EFI_STATUS
+SerialReportStatusCode (
+ IN CONST EFI_PEI_SERVICES **PeiServices,
+ IN EFI_STATUS_CODE_TYPE CodeType,
+ IN EFI_STATUS_CODE_VALUE Value,
+ IN UINT32 Instance,
+ IN CONST EFI_GUID * CallerId,
+ IN CONST EFI_STATUS_CODE_DATA * Data OPTIONAL
+ );
+
+#endif
+
+extern EFI_PEI_PROGRESS_CODE_PPI mStatusCodePpi;
+extern EFI_PEI_PPI_DESCRIPTOR mPpiListStatusCode;
+#define EFI_SIGNATURE_16(A, B) ((A) | (B << 8))
+#define EFI_SIGNATURE_32(A, B, C, D) (EFI_SIGNATURE_16 (A, B) | (EFI_SIGNATURE_16 (C, D) << 16))
+#define STATUSCODE_PEIM_SIGNATURE EFI_SIGNATURE_32 ('p', 's', 't', 'c')
+
+typedef struct {
+ UINT32 Signature;
+ EFI_FFS_FILE_HEADER *FfsHeader;
+ EFI_PEI_NOTIFY_DESCRIPTOR StatusCodeNotify;
+} STATUSCODE_CALLBACK_STATE_INFORMATION;
+
+#pragma pack(1)
+typedef struct {
+ UINT16 Limit;
+ UINT32 Base;
+} GDT_DSCRIPTOR;
+#pragma pack()
+
+#define STATUSCODE_PEIM_FROM_THIS(a) \
+ BASE_CR ( \
+ a, \
+ STATUSCODE_CALLBACK_STATE_INFORMATION, \
+ StatusCodeNotify \
+ )
+
+VOID
+EFIAPI
+PlatformInitializeStatusCode (
+ IN EFI_FFS_FILE_HEADER *FfsHeader,
+ IN CONST EFI_PEI_SERVICES **PeiServices
+ );
+
+
+//
+// Function declarations
+//
+/**
+ Install Firmware Volume Hob's once there is main memory
+
+ @param PeiServices General purpose services available to every PEIM.
+ @param NotifyDescriptor Not Used
+ @param Ppi Not Used
+
+ @retval Status EFI_SUCCESS if the interface could be successfully
+ installed
+
+**/
+EFI_STATUS
+EFIAPI
+MemoryDiscoveredPpiNotifyCallback (
+ IN EFI_PEI_SERVICES **PeiServices,
+ IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor,
+ IN VOID *Ppi
+ );
+
+#endif
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