#define MMCI0_POW2_BLOCKLEN 9\r
#define MMCI0_TIMEOUT 1000\r
\r
-BOOLEAN MciIsPowerOn() {\r
- return ((MmioRead32(MCI_POWER_CONTROL_REG) & 0x3) == MCI_POWER_ON);\r
+BOOLEAN\r
+MciIsPowerOn (\r
+ VOID\r
+ )\r
+{\r
+ return ((MmioRead32(MCI_POWER_CONTROL_REG) & 0x3) == MCI_POWER_ON);\r
}\r
\r
-EFI_STATUS MciInitialize() {\r
- MCI_TRACE("MciInitialize()");\r
- return EFI_SUCCESS;\r
+EFI_STATUS\r
+MciInitialize (\r
+ VOID\r
+ )\r
+{\r
+ MCI_TRACE("MciInitialize()");\r
+ return EFI_SUCCESS;\r
}\r
\r
-BOOLEAN MciIsCardPresent() {\r
- return (MmioRead32(FixedPcdGet32(PcdPL180SysMciRegAddress)) & 1);\r
+BOOLEAN\r
+MciIsCardPresent (\r
+ VOID\r
+ )\r
+{\r
+ return (MmioRead32(FixedPcdGet32(PcdPL180SysMciRegAddress)) & 1);\r
}\r
\r
-BOOLEAN MciIsReadOnly() {\r
- return (MmioRead32(FixedPcdGet32(PcdPL180SysMciRegAddress)) & 2);\r
+BOOLEAN\r
+MciIsReadOnly (\r
+ VOID\r
+ )\r
+{\r
+ return (MmioRead32(FixedPcdGet32(PcdPL180SysMciRegAddress)) & 2);\r
}\r
\r
// Convert block size to 2^n\r
-UINT32 GetPow2BlockLen(UINT32 BlockLen) {\r
- UINTN Loop;\r
- UINTN Pow2BlockLen;\r
- \r
- Loop = 0x8000;\r
- Pow2BlockLen = 15;\r
- do {\r
- Loop = (Loop >> 1) & 0xFFFF;\r
- Pow2BlockLen--;\r
- } while (Pow2BlockLen && (!(Loop & BlockLen)));\r
-\r
- return Pow2BlockLen;\r
+STATIC\r
+UINT32\r
+GetPow2BlockLen (\r
+ IN UINT32 BlockLen\r
+ )\r
+{\r
+ UINTN Loop;\r
+ UINTN Pow2BlockLen;\r
+\r
+ Loop = 0x8000;\r
+ Pow2BlockLen = 15;\r
+ do {\r
+ Loop = (Loop >> 1) & 0xFFFF;\r
+ Pow2BlockLen--;\r
+ } while (Pow2BlockLen && (!(Loop & BlockLen)));\r
+\r
+ return Pow2BlockLen;\r
}\r
\r
-VOID MciPrepareDataPath(UINTN TransferDirection) {\r
- // Set Data Length & Data Timer\r
- MmioWrite32(MCI_DATA_TIMER_REG,0xFFFFFFF);\r
- MmioWrite32(MCI_DATA_LENGTH_REG,MMCI0_BLOCKLEN);\r
+VOID\r
+MciPrepareDataPath (\r
+ IN UINTN TransferDirection\r
+ )\r
+{\r
+ // Set Data Length & Data Timer\r
+ MmioWrite32(MCI_DATA_TIMER_REG,0xFFFFFFF);\r
+ MmioWrite32(MCI_DATA_LENGTH_REG,MMCI0_BLOCKLEN);\r
\r
#ifndef USE_STREAM\r
- //Note: we are using a hardcoded BlockLen (=512). If we decide to use a variable size, we could\r
- // compute the pow2 of BlockLen with the above function GetPow2BlockLen()\r
- MmioWrite32(MCI_DATA_CTL_REG, MCI_DATACTL_ENABLE | TransferDirection | (MMCI0_POW2_BLOCKLEN << 4));\r
+ //Note: we are using a hardcoded BlockLen (=512). If we decide to use a variable size, we could\r
+ // compute the pow2 of BlockLen with the above function GetPow2BlockLen()\r
+ MmioWrite32(MCI_DATA_CTL_REG, MCI_DATACTL_ENABLE | MCI_DATACTL_DMA_ENABLE | TransferDirection | (MMCI0_POW2_BLOCKLEN << 4));\r
#else\r
- MmioWrite32(MCI_DATA_CTL_REG, MCI_DATACTL_ENABLE | TransferDirection | MCI_DATACTL_STREAM_TRANS);\r
+ MmioWrite32(MCI_DATA_CTL_REG, MCI_DATACTL_ENABLE | MCI_DATACTL_DMA_ENABLE | TransferDirection | MCI_DATACTL_STREAM_TRANS);\r
#endif\r
}\r
\r
-EFI_STATUS MciSendCommand(MMC_CMD MmcCmd, UINT32 Argument) {\r
- UINT32 Status;\r
- UINT32 Timer;\r
- UINT32 Cmd;\r
+EFI_STATUS\r
+MciSendCommand (\r
+ IN MMC_CMD MmcCmd,\r
+ IN UINT32 Argument\r
+ )\r
+{\r
+ UINT32 Status;\r
+ UINT32 Cmd;\r
+ UINTN RetVal;\r
+ UINTN CmdCtrlReg;\r
+\r
+ RetVal = EFI_SUCCESS;\r
+\r
+ if ((MmcCmd == MMC_CMD17) || (MmcCmd == MMC_CMD11)) {\r
+ MciPrepareDataPath(MCI_DATACTL_CARD_TO_CONT);\r
+ } else if ((MmcCmd == MMC_CMD24) || (MmcCmd == MMC_CMD20)) {\r
+ MciPrepareDataPath(MCI_DATACTL_CONT_TO_CARD);\r
+ }\r
+\r
+ // Create Command for PL180\r
+ Cmd = INDX(MmcCmd);\r
+ if (MmcCmd & MMC_CMD_WAIT_RESPONSE) {\r
+ Cmd |= MCI_CPSM_WAIT_RESPONSE;\r
+ }\r
+\r
+ if (MmcCmd & MMC_CMD_LONG_RESPONSE) {\r
+ Cmd |= MCI_CPSM_LONG_RESPONSE;\r
+ }\r
\r
- if ((MmcCmd == MMC_CMD17) || (MmcCmd == MMC_CMD11)) {\r
- MciPrepareDataPath(MCI_DATACTL_CARD_TO_CONT);\r
- } else if ((MmcCmd == MMC_CMD24) || (MmcCmd == MMC_CMD20)) {\r
- MciPrepareDataPath(MCI_DATACTL_CONT_TO_CARD);\r
+ // Clear Status register static flags\r
+ MmioWrite32(MCI_CLEAR_STATUS_REG,0x7FF);\r
+\r
+ //Write to command argument register\r
+ MmioWrite32(MCI_ARGUMENT_REG,Argument);\r
+\r
+ //Write to command register\r
+ MmioWrite32(MCI_COMMAND_REG,Cmd);\r
+\r
+ if (Cmd & MCI_CPSM_WAIT_RESPONSE) {\r
+ Status = MmioRead32(MCI_STATUS_REG);\r
+ while (!(Status & (MCI_STATUS_CMD_RESPEND | MCI_STATUS_CMD_CMDCRCFAIL | MCI_STATUS_CMD_CMDTIMEOUT | MCI_STATUS_CMD_START_BIT_ERROR))) {\r
+ Status = MmioRead32(MCI_STATUS_REG);\r
}\r
\r
- // Create Command for PL180\r
- Cmd = INDX(MmcCmd);\r
- if (MmcCmd & MMC_CMD_WAIT_RESPONSE)\r
- Cmd |= MCI_CPSM_WAIT_RESPONSE;\r
- if (MmcCmd & MMC_CMD_LONG_RESPONSE)\r
- Cmd |= MCI_CPSM_LONG_RESPONSE;\r
-\r
- MmioWrite32(MCI_CLEAR_STATUS_REG,0x5FFF);\r
- MmioWrite32(MCI_ARGUMENT_REG,Argument);\r
- MmioWrite32(MCI_COMMAND_REG,Cmd);\r
-\r
- Timer = 1000;\r
- if (Cmd & MCI_CPSM_WAIT_RESPONSE) {\r
- Status = MmioRead32(MCI_STATUS_REG);\r
- while (!(Status & (MCI_STATUS_CMD_RESPEND | MCI_STATUS_CMD_CMDCRCFAIL | MCI_STATUS_CMD_CMDTIMEOUT)) && Timer) {\r
- //NanoSecondDelay(10);\r
- Status = MmioRead32(MCI_STATUS_REG);\r
- Timer--;\r
- }\r
-\r
- if ((Timer == 0) || (Status == MCI_STATUS_CMD_CMDTIMEOUT)) {\r
- //DEBUG ((EFI_D_ERROR, "MciSendCommand(CmdIndex:%d) TIMEOUT! Response:0x%X Status:0x%X\n",Cmd & 0x3F,MmioRead32(MCI_RESPONSE0_REG),Status));\r
- return EFI_TIMEOUT;\r
- } else if (!((Cmd & 0x3F) == INDX(1)) && (Status & MCI_STATUS_CMD_CMDCRCFAIL)) {\r
- // The CMD1 does not contain CRC. We should ignore the CRC failed Status.\r
- return EFI_CRC_ERROR;\r
- } else {\r
- return EFI_SUCCESS;\r
- }\r
+ if ((Status & MCI_STATUS_CMD_START_BIT_ERROR)) {\r
+ DEBUG ((EFI_D_ERROR, "MciSendCommand(CmdIndex:%d) Start bit Error! Response:0x%X Status:0x%x\n",(Cmd & 0x3F),MmioRead32(MCI_RESPONSE0_REG),Status));\r
+ RetVal = EFI_NO_RESPONSE;\r
+ goto Exit;\r
+ } else if ((Status & MCI_STATUS_CMD_CMDTIMEOUT)) {\r
+ //DEBUG ((EFI_D_ERROR, "MciSendCommand(CmdIndex:%d) TIMEOUT! Response:0x%X Status:0x%x\n",(Cmd & 0x3F),MmioRead32(MCI_RESPONSE0_REG),Status));\r
+ RetVal = EFI_TIMEOUT;\r
+ goto Exit;\r
+ } else if (!((Cmd & 0x3F) == INDX(1)) && (Status & MCI_STATUS_CMD_CMDCRCFAIL)) {\r
+ // The CMD1 does not contain CRC. We should ignore the CRC failed Status.\r
+ RetVal = EFI_CRC_ERROR;\r
+ goto Exit;\r
} else {\r
- Status = MmioRead32(MCI_STATUS_REG);\r
- while (!(Status & MCI_STATUS_CMD_SENT) && Timer) {\r
- //NanoSecondDelay(10);\r
- Status = MmioRead32(MCI_STATUS_REG);\r
- Timer--;\r
- }\r
-\r
- if (Timer == 0) {\r
- //DEBUG ((EFI_D_ERROR, "MciSendCommand(CmdIndex:%d) TIMEOUT2! 0x%X\n",Cmd & 0x3F,MmioRead32(MCI_RESPONSE0_REG)));\r
- return EFI_TIMEOUT;\r
- } else {\r
- return EFI_SUCCESS;\r
- }\r
+ RetVal = EFI_SUCCESS;\r
+ goto Exit;\r
}\r
-}\r
-\r
-EFI_STATUS MciReceiveResponse(MMC_RESPONSE_TYPE Type, UINT32* Buffer) {\r
- if (Buffer == NULL) {\r
- return EFI_INVALID_PARAMETER;\r
+ } else {\r
+ Status = MmioRead32(MCI_STATUS_REG);\r
+ while (!(Status & (MCI_STATUS_CMD_SENT | MCI_STATUS_CMD_CMDCRCFAIL | MCI_STATUS_CMD_CMDTIMEOUT| MCI_STATUS_CMD_START_BIT_ERROR))) {\r
+ Status = MmioRead32(MCI_STATUS_REG);\r
}\r
\r
- if ((Type == MMC_RESPONSE_TYPE_R1) || (Type == MMC_RESPONSE_TYPE_R1b) ||\r
- (Type == MMC_RESPONSE_TYPE_R3) || (Type == MMC_RESPONSE_TYPE_R6) ||\r
- (Type == MMC_RESPONSE_TYPE_R7)) {\r
- Buffer[0] = MmioRead32(MCI_RESPONSE0_REG);\r
- Buffer[1] = MmioRead32(MCI_RESPONSE1_REG);\r
- } else if (Type == MMC_RESPONSE_TYPE_R2) {\r
- Buffer[0] = MmioRead32(MCI_RESPONSE0_REG);\r
- Buffer[1] = MmioRead32(MCI_RESPONSE1_REG);\r
- Buffer[2] = MmioRead32(MCI_RESPONSE2_REG);\r
- Buffer[3] = MmioRead32(MCI_RESPONSE3_REG);\r
+ if ((Status & MCI_STATUS_CMD_START_BIT_ERROR)) {\r
+ DEBUG ((EFI_D_ERROR, "MciSendCommand(CmdIndex:%d) Start bit Error! Response:0x%X Status:0x%x\n",(Cmd & 0x3F),MmioRead32(MCI_RESPONSE0_REG),Status));\r
+ RetVal = EFI_NO_RESPONSE;\r
+ goto Exit;\r
+ } else if ((Status & MCI_STATUS_CMD_CMDTIMEOUT)) {\r
+ //DEBUG ((EFI_D_ERROR, "MciSendCommand(CmdIndex:%d) TIMEOUT! Response:0x%X Status:0x%x\n",(Cmd & 0x3F),MmioRead32(MCI_RESPONSE0_REG),Status));\r
+ RetVal = EFI_TIMEOUT;\r
+ goto Exit;\r
+ } else\r
+ if (!((Cmd & 0x3F) == INDX(1)) && (Status & MCI_STATUS_CMD_CMDCRCFAIL)) {\r
+ // The CMD1 does not contain CRC. We should ignore the CRC failed Status.\r
+ RetVal = EFI_CRC_ERROR;\r
+ goto Exit;\r
+ } else {\r
+ RetVal = EFI_SUCCESS;\r
+ goto Exit;\r
}\r
+ }\r
\r
- return EFI_SUCCESS;\r
-}\r
-\r
-EFI_STATUS MciReadBlockData(EFI_LBA Lba, UINTN Length, UINT32* Buffer) {\r
- UINTN Loop;\r
- UINTN Finish;\r
- UINTN Timer;\r
- UINTN Status;\r
-\r
- // Read data from the RX FIFO\r
- Loop = 0;\r
- Finish = MMCI0_BLOCKLEN / 4;\r
- Timer = MMCI0_TIMEOUT * 10;\r
- do {\r
- // Read the Status flags\r
- Status = MmioRead32(MCI_STATUS_REG);\r
- // Do eight reads if possible else a single read\r
- if (Status & MCI_STATUS_CMD_RXFIFOHALFFULL) {\r
- Buffer[Loop] = MmioRead32(MCI_FIFO_REG);\r
- Loop++;\r
- Buffer[Loop] = MmioRead32(MCI_FIFO_REG);\r
- Loop++;\r
- Buffer[Loop] = MmioRead32(MCI_FIFO_REG);\r
- Loop++;\r
- Buffer[Loop] = MmioRead32(MCI_FIFO_REG);\r
- Loop++;\r
- Buffer[Loop] = MmioRead32(MCI_FIFO_REG);\r
- Loop++;\r
- Buffer[Loop] = MmioRead32(MCI_FIFO_REG);\r
- Loop++;\r
- Buffer[Loop] = MmioRead32(MCI_FIFO_REG);\r
- Loop++;\r
- Buffer[Loop] = MmioRead32(MCI_FIFO_REG);\r
- Loop++;\r
- }\r
- else if (!(Status & MCI_STATUS_CMD_RXFIFOEMPTY)) {\r
- Buffer[Loop] = MmioRead32(MCI_FIFO_REG);\r
- Loop++;\r
- } else\r
- Timer--;\r
- } while ((Loop < Finish) && Timer);\r
-\r
- if (Timer == 0) {\r
- DEBUG ((EFI_D_ERROR, "MciReadBlockData: Timeout Status:0x%X Loop:%d // Finish:%d\n",MmioRead32(MCI_STATUS_REG),Loop,Finish));\r
- return EFI_TIMEOUT;\r
- } else\r
- return EFI_SUCCESS;\r
+Exit:\r
+ //Disable Command Path\r
+ CmdCtrlReg = MmioRead32(MCI_COMMAND_REG);\r
+ MmioWrite32(MCI_COMMAND_REG, (CmdCtrlReg & ~MCI_CPSM_ENABLED));\r
+ return RetVal;\r
}\r
\r
-EFI_STATUS MciWriteBlockData(EFI_LBA Lba, UINTN Length, UINT32* Buffer) {\r
- UINTN Loop;\r
- UINTN Finish;\r
- UINTN Timer;\r
- UINTN Status;\r
-\r
- // Write the data to the TX FIFO\r
- Loop = 0;\r
- Finish = MMCI0_BLOCKLEN / 4;\r
- Timer = MMCI0_TIMEOUT * 100;\r
- do {\r
- // Read the Status flags\r
- Status = MmioRead32(MCI_STATUS_REG);\r
-\r
- // Do eight writes if possible else a single write\r
- if (Status & MCI_STATUS_CMD_TXFIFOHALFEMPTY) {\r
- MmioWrite32(MCI_FIFO_REG, Buffer[Loop]);\r
- Loop++;\r
- MmioWrite32(MCI_FIFO_REG, Buffer[Loop]);\r
- Loop++;\r
- MmioWrite32(MCI_FIFO_REG, Buffer[Loop]);\r
- Loop++;\r
- MmioWrite32(MCI_FIFO_REG, Buffer[Loop]);\r
- Loop++;\r
- MmioWrite32(MCI_FIFO_REG, Buffer[Loop]);\r
- Loop++;\r
- MmioWrite32(MCI_FIFO_REG, Buffer[Loop]);\r
- Loop++;\r
- MmioWrite32(MCI_FIFO_REG, Buffer[Loop]);\r
- Loop++;\r
- MmioWrite32(MCI_FIFO_REG, Buffer[Loop]);\r
- Loop++;\r
- }\r
- else if (!(Status & MCI_STATUS_CMD_TXFIFOFULL)) {\r
- MmioWrite32(MCI_FIFO_REG, Buffer[Loop]);\r
- Loop++;\r
- }\r
- else\r
- Timer--;\r
- } while ((Loop < Finish) && Timer);\r
+EFI_STATUS\r
+MciReceiveResponse (\r
+ IN MMC_RESPONSE_TYPE Type,\r
+ IN UINT32* Buffer\r
+ )\r
+{\r
+ if (Buffer == NULL) {\r
+ return EFI_INVALID_PARAMETER;\r
+ }\r
+\r
+ if ((Type == MMC_RESPONSE_TYPE_R1) || (Type == MMC_RESPONSE_TYPE_R1b) ||\r
+ (Type == MMC_RESPONSE_TYPE_R3) || (Type == MMC_RESPONSE_TYPE_R6) ||\r
+ (Type == MMC_RESPONSE_TYPE_R7))\r
+ {\r
+ Buffer[0] = MmioRead32(MCI_RESPONSE0_REG);\r
+ Buffer[1] = MmioRead32(MCI_RESPONSE1_REG);\r
+ } else if (Type == MMC_RESPONSE_TYPE_R2) {\r
+ Buffer[0] = MmioRead32(MCI_RESPONSE0_REG);\r
+ Buffer[1] = MmioRead32(MCI_RESPONSE1_REG);\r
+ Buffer[2] = MmioRead32(MCI_RESPONSE2_REG);\r
+ Buffer[3] = MmioRead32(MCI_RESPONSE3_REG);\r
+ }\r
\r
- ASSERT(Timer > 0);\r
+ return EFI_SUCCESS;\r
+}\r
\r
- // Wait for FIFO to drain\r
- Timer = MMCI0_TIMEOUT;\r
+EFI_STATUS\r
+MciReadBlockData (\r
+ IN EFI_LBA Lba,\r
+ IN UINTN Length,\r
+ IN UINT32* Buffer\r
+ )\r
+{\r
+ UINTN Loop;\r
+ UINTN Finish;\r
+ UINTN Status;\r
+ EFI_STATUS RetVal;\r
+ UINTN DataCtrlReg;\r
+\r
+ RetVal = EFI_SUCCESS;\r
+\r
+ // Read data from the RX FIFO\r
+ Loop = 0;\r
+ Finish = MMCI0_BLOCKLEN / 4;\r
+ do {\r
+ // Read the Status flags\r
Status = MmioRead32(MCI_STATUS_REG);\r
-/*#ifndef USE_STREAM\r
- // Single block\r
- while (((Status & MCI_STATUS_CMD_TXDONE) != MCI_STATUS_CMD_TXDONE) && Timer) {\r
-#else*/\r
- // Stream\r
- while (((Status & MCI_STATUS_CMD_DATAEND) != MCI_STATUS_CMD_DATAEND) && Timer) {\r
-//#endif\r
- NanoSecondDelay(10);\r
- Status = MmioRead32(MCI_STATUS_REG);\r
- Timer--;\r
+\r
+ // Do eight reads if possible else a single read\r
+ if (Status & MCI_STATUS_CMD_RXFIFOHALFFULL) {\r
+ Buffer[Loop] = MmioRead32(MCI_FIFO_REG);\r
+ Loop++;\r
+ Buffer[Loop] = MmioRead32(MCI_FIFO_REG);\r
+ Loop++;\r
+ Buffer[Loop] = MmioRead32(MCI_FIFO_REG);\r
+ Loop++;\r
+ Buffer[Loop] = MmioRead32(MCI_FIFO_REG);\r
+ Loop++;\r
+ Buffer[Loop] = MmioRead32(MCI_FIFO_REG);\r
+ Loop++;\r
+ Buffer[Loop] = MmioRead32(MCI_FIFO_REG);\r
+ Loop++;\r
+ Buffer[Loop] = MmioRead32(MCI_FIFO_REG);\r
+ Loop++;\r
+ Buffer[Loop] = MmioRead32(MCI_FIFO_REG);\r
+ Loop++;\r
+ } else if (Status & MCI_STATUS_CMD_RXDATAAVAILBL) {\r
+ Buffer[Loop] = MmioRead32(MCI_FIFO_REG);\r
+ Loop++;\r
+ } else {\r
+ //Check for error conditions and timeouts\r
+ if(Status & MCI_STATUS_CMD_DATATIMEOUT) {\r
+ DEBUG ((EFI_D_ERROR, "MciReadBlockData(): TIMEOUT! Response:0x%X Status:0x%x\n",MmioRead32(MCI_RESPONSE0_REG),Status));\r
+ RetVal = EFI_TIMEOUT;\r
+ break;\r
+ } else if(Status & MCI_STATUS_CMD_DATACRCFAIL) {\r
+ DEBUG ((EFI_D_ERROR, "MciReadBlockData(): CRC Error! Response:0x%X Status:0x%x\n",MmioRead32(MCI_RESPONSE0_REG),Status));\r
+ RetVal = EFI_CRC_ERROR;\r
+ break;\r
+ } else if(Status & MCI_STATUS_CMD_START_BIT_ERROR) {\r
+ DEBUG ((EFI_D_ERROR, "MciReadBlockData(): Start-bit Error! Response:0x%X Status:0x%x\n",MmioRead32(MCI_RESPONSE0_REG),Status));\r
+ RetVal = EFI_NO_RESPONSE;\r
+ break;\r
+ }\r
}\r
+ //clear RX over run flag\r
+ if(Status & MCI_STATUS_CMD_RXOVERRUN) {\r
+ MmioWrite32(MCI_CLEAR_STATUS_REG, MCI_STATUS_CMD_RXOVERRUN);\r
+ }\r
+ } while ((Loop < Finish));\r
\r
- ASSERT(Timer > 0);\r
+ //Clear Status flags\r
+ MmioWrite32(MCI_CLEAR_STATUS_REG, 0x7FF);\r
+\r
+ //Disable Data path\r
+ DataCtrlReg = MmioRead32(MCI_DATA_CTL_REG);\r
+ MmioWrite32(MCI_DATA_CTL_REG, (DataCtrlReg & 0xFE));\r
\r
- if (Timer == 0)\r
- return EFI_TIMEOUT;\r
- else\r
- return EFI_SUCCESS;\r
+ return RetVal;\r
}\r
\r
-EFI_STATUS MciNotifyState(MMC_STATE State) {\r
- UINT32 Data32;\r
+EFI_STATUS\r
+MciWriteBlockData (\r
+ IN EFI_LBA Lba,\r
+ IN UINTN Length,\r
+ IN UINT32* Buffer\r
+ )\r
+{\r
+ UINTN Loop;\r
+ UINTN Finish;\r
+ UINTN Timer;\r
+ UINTN Status;\r
+ EFI_STATUS RetVal;\r
+ UINTN DataCtrlReg;\r
+\r
+ RetVal = EFI_SUCCESS;\r
+\r
+ // Write the data to the TX FIFO\r
+ Loop = 0;\r
+ Finish = MMCI0_BLOCKLEN / 4;\r
+ Timer = MMCI0_TIMEOUT * 100;\r
+ do {\r
+ // Read the Status flags\r
+ Status = MmioRead32(MCI_STATUS_REG);\r
\r
- switch(State) {\r
- case MmcInvalidState:\r
- ASSERT(0);\r
- break;\r
- case MmcHwInitializationState:\r
- // If device already turn on then restart it\r
- Data32 = MmioRead32(MCI_POWER_CONTROL_REG);\r
- if ((Data32 & 0x2) == MCI_POWER_UP) {\r
- MCI_TRACE("MciNotifyState(MmcHwInitializationState): TurnOff MCI");\r
-\r
- // Turn off\r
- MmioWrite32(MCI_CLOCK_CONTROL_REG, 0);\r
- MmioWrite32(MCI_POWER_CONTROL_REG, 0);\r
- MicroSecondDelay(100);\r
- }\r
- \r
- MCI_TRACE("MciNotifyState(MmcHwInitializationState): TurnOn MCI");\r
- // Setup clock\r
- // - 0x1D = 29 => should be the clock divider to be less than 400kHz at MCLK = 24Mhz\r
- MmioWrite32(MCI_CLOCK_CONTROL_REG,0x1D | MCI_CLOCK_ENABLE | MCI_CLOCK_POWERSAVE);\r
- //MmioWrite32(MCI_CLOCK_CONTROL_REG,0x1D | MCI_CLOCK_ENABLE);\r
-\r
- // Set the voltage\r
- MmioWrite32(MCI_POWER_CONTROL_REG,MCI_POWER_OPENDRAIN | (15<<2));\r
- MmioWrite32(MCI_POWER_CONTROL_REG,MCI_POWER_ROD | MCI_POWER_OPENDRAIN | (15<<2) | MCI_POWER_UP);\r
- MicroSecondDelay(10);\r
- MmioWrite32(MCI_POWER_CONTROL_REG,MCI_POWER_ROD | MCI_POWER_OPENDRAIN | (15<<2) | MCI_POWER_ON);\r
- MicroSecondDelay(100);\r
-\r
- // Set Data Length & Data Timer\r
- MmioWrite32(MCI_DATA_TIMER_REG,0xFFFFF);\r
- MmioWrite32(MCI_DATA_LENGTH_REG,8);\r
-\r
- ASSERT((MmioRead32(MCI_POWER_CONTROL_REG) & 0x3) == MCI_POWER_ON);\r
- break;\r
- case MmcIdleState:\r
- MCI_TRACE("MciNotifyState(MmcIdleState)");\r
- break;\r
- case MmcReadyState:\r
- MCI_TRACE("MciNotifyState(MmcReadyState)");\r
- break;\r
- case MmcIdentificationState:\r
- MCI_TRACE("MciNotifyState(MmcIdentificationState)");\r
- break;\r
- case MmcStandByState:\r
- MCI_TRACE("MciNotifyState(MmcStandByState)");\r
- \r
- // Enable MCICMD push-pull drive\r
- MmioWrite32(MCI_POWER_CONTROL_REG,MCI_POWER_ROD | (15<<2) | MCI_POWER_ON);\r
-\r
- /*// Set MMCI0 clock to 4MHz (24MHz may be possible with cache enabled)\r
- MmioWrite32(MCI_CLOCK_CONTROL_REG,0x02 | MCI_CLOCK_ENABLE | MCI_CLOCK_POWERSAVE);*/\r
- // Set MMCI0 clock to 24MHz (by bypassing the divider)\r
- MmioWrite32(MCI_CLOCK_CONTROL_REG,MCI_CLOCK_BYPASS | MCI_CLOCK_ENABLE);\r
- break;\r
- case MmcTransferState:\r
- //MCI_TRACE("MciNotifyState(MmcTransferState)");\r
- break;\r
- case MmcSendingDataState:\r
- MCI_TRACE("MciNotifyState(MmcSendingDataState)");\r
- break;\r
- case MmcReceiveDataState:\r
- MCI_TRACE("MciNotifyState(MmcReceiveDataState)");\r
- break;\r
- case MmcProgrammingState:\r
- MCI_TRACE("MciNotifyState(MmcProgrammingState)");\r
- break;\r
- case MmcDisconnectState:\r
- MCI_TRACE("MciNotifyState(MmcDisconnectState)");\r
- break;\r
- default:\r
+ // Do eight writes if possible else a single write\r
+ if (Status & MCI_STATUS_CMD_TXFIFOHALFEMPTY) {\r
+ MmioWrite32(MCI_FIFO_REG, Buffer[Loop]);\r
+ Loop++;\r
+ MmioWrite32(MCI_FIFO_REG, Buffer[Loop]);\r
+ Loop++;\r
+ MmioWrite32(MCI_FIFO_REG, Buffer[Loop]);\r
+ Loop++;\r
+ MmioWrite32(MCI_FIFO_REG, Buffer[Loop]);\r
+ Loop++;\r
+ MmioWrite32(MCI_FIFO_REG, Buffer[Loop]);\r
+ Loop++;\r
+ MmioWrite32(MCI_FIFO_REG, Buffer[Loop]);\r
+ Loop++;\r
+ MmioWrite32(MCI_FIFO_REG, Buffer[Loop]);\r
+ Loop++;\r
+ MmioWrite32(MCI_FIFO_REG, Buffer[Loop]);\r
+ Loop++;\r
+ } else if ((Status & MCI_STATUS_CMD_TXFIFOEMPTY)) {\r
+ MmioWrite32(MCI_FIFO_REG, Buffer[Loop]);\r
+ Loop++;\r
+ } else {\r
+ //Check for error conditions and timeouts\r
+ if(Status & MCI_STATUS_CMD_DATATIMEOUT) {\r
+ DEBUG ((EFI_D_ERROR, "MciWriteBlockData(): TIMEOUT! Response:0x%X Status:0x%x\n",MmioRead32(MCI_RESPONSE0_REG),Status));\r
+ RetVal = EFI_TIMEOUT;\r
+ goto Exit;\r
+ } else if(Status & MCI_STATUS_CMD_DATACRCFAIL) {\r
+ DEBUG ((EFI_D_ERROR, "MciWriteBlockData(): CRC Error! Response:0x%X Status:0x%x\n",MmioRead32(MCI_RESPONSE0_REG),Status));\r
+ RetVal = EFI_CRC_ERROR;\r
+ goto Exit;\r
+ } else if(Status & MCI_STATUS_CMD_TX_UNDERRUN) {\r
+ DEBUG ((EFI_D_ERROR, "MciWriteBlockData(): TX buffer Underrun! Response:0x%X Status:0x%x, Number of bytes written 0x%x\n",MmioRead32(MCI_RESPONSE0_REG),Status, Loop));\r
+ RetVal = EFI_BUFFER_TOO_SMALL;\r
ASSERT(0);\r
+ goto Exit;\r
+ }\r
}\r
- return EFI_SUCCESS;\r
+ } while (Loop < Finish);\r
+\r
+ // Wait for FIFO to drain\r
+ Timer = MMCI0_TIMEOUT * 60;\r
+ Status = MmioRead32(MCI_STATUS_REG);\r
+#ifndef USE_STREAM\r
+ // Single block\r
+ while (((Status & MCI_STATUS_CMD_TXDONE) != MCI_STATUS_CMD_TXDONE) && Timer) {\r
+#else\r
+ // Stream\r
+ while (((Status & MCI_STATUS_CMD_DATAEND) != MCI_STATUS_CMD_DATAEND) && Timer) {\r
+#endif\r
+ NanoSecondDelay(10);\r
+ Status = MmioRead32(MCI_STATUS_REG);\r
+ Timer--;\r
+ }\r
+\r
+ if(Timer == 0) {\r
+ DEBUG ((EFI_D_ERROR, "MciWriteBlockData(): Data End timeout Number of bytes written 0x%x\n",Loop));\r
+ ASSERT(Timer > 0);\r
+ return EFI_TIMEOUT;\r
+ }\r
+\r
+ //Clear Status flags\r
+ MmioWrite32(MCI_CLEAR_STATUS_REG, 0x7FF);\r
+ if (Timer == 0) {\r
+ RetVal = EFI_TIMEOUT;\r
+ }\r
+\r
+Exit:\r
+ //Disable Data path\r
+ DataCtrlReg = MmioRead32(MCI_DATA_CTL_REG);\r
+ MmioWrite32(MCI_DATA_CTL_REG, (DataCtrlReg & 0xFE));\r
+ return RetVal;\r
+}\r
+\r
+EFI_STATUS\r
+MciNotifyState (\r
+ IN MMC_STATE State\r
+ )\r
+{\r
+ UINT32 Data32;\r
+\r
+ switch(State) {\r
+ case MmcInvalidState:\r
+ ASSERT(0);\r
+ break;\r
+ case MmcHwInitializationState:\r
+ // If device already turn on then restart it\r
+ Data32 = MmioRead32(MCI_POWER_CONTROL_REG);\r
+ if ((Data32 & 0x2) == MCI_POWER_UP) {\r
+ MCI_TRACE("MciNotifyState(MmcHwInitializationState): TurnOff MCI");\r
+\r
+ // Turn off\r
+ MmioWrite32(MCI_CLOCK_CONTROL_REG, 0);\r
+ MmioWrite32(MCI_POWER_CONTROL_REG, 0);\r
+ MicroSecondDelay(100);\r
+ }\r
+\r
+ MCI_TRACE("MciNotifyState(MmcHwInitializationState): TurnOn MCI");\r
+ // Setup clock\r
+ // - 0x1D = 29 => should be the clock divider to be less than 400kHz at MCLK = 24Mhz\r
+ MmioWrite32(MCI_CLOCK_CONTROL_REG,0x1D | MCI_CLOCK_ENABLE | MCI_CLOCK_POWERSAVE);\r
+ //MmioWrite32(MCI_CLOCK_CONTROL_REG,0x1D | MCI_CLOCK_ENABLE);\r
+\r
+ // Set the voltage\r
+ MmioWrite32(MCI_POWER_CONTROL_REG,MCI_POWER_OPENDRAIN | (15<<2));\r
+ MmioWrite32(MCI_POWER_CONTROL_REG,MCI_POWER_ROD | MCI_POWER_OPENDRAIN | (15<<2) | MCI_POWER_UP);\r
+ MicroSecondDelay(10);\r
+ MmioWrite32(MCI_POWER_CONTROL_REG,MCI_POWER_ROD | MCI_POWER_OPENDRAIN | (15<<2) | MCI_POWER_ON);\r
+ MicroSecondDelay(100);\r
+\r
+ // Set Data Length & Data Timer\r
+ MmioWrite32(MCI_DATA_TIMER_REG,0xFFFFF);\r
+ MmioWrite32(MCI_DATA_LENGTH_REG,8);\r
+\r
+ ASSERT((MmioRead32(MCI_POWER_CONTROL_REG) & 0x3) == MCI_POWER_ON);\r
+ break;\r
+ case MmcIdleState:\r
+ MCI_TRACE("MciNotifyState(MmcIdleState)");\r
+ break;\r
+ case MmcReadyState:\r
+ MCI_TRACE("MciNotifyState(MmcReadyState)");\r
+ break;\r
+ case MmcIdentificationState:\r
+ MCI_TRACE("MciNotifyState(MmcIdentificationState)");\r
+ break;\r
+ case MmcStandByState:{\r
+ volatile UINT32 PwrCtrlReg;\r
+ MCI_TRACE("MciNotifyState(MmcStandByState)");\r
+\r
+ // Enable MCICMD push-pull drive\r
+ PwrCtrlReg = MmioRead32(MCI_POWER_CONTROL_REG);\r
+ //Disable Open Drain output\r
+ PwrCtrlReg &=~(MCI_POWER_OPENDRAIN);\r
+ MmioWrite32(MCI_POWER_CONTROL_REG,PwrCtrlReg);\r
+\r
+ // Set MMCI0 clock to 4MHz (24MHz may be possible with cache enabled)\r
+ //\r
+ // Note: Increasing clock speed causes TX FIFO under-run errors.\r
+ // So careful when optimising this driver for higher performance.\r
+ //\r
+ MmioWrite32(MCI_CLOCK_CONTROL_REG,0x02 | MCI_CLOCK_ENABLE | MCI_CLOCK_POWERSAVE);\r
+ // Set MMCI0 clock to 24MHz (by bypassing the divider)\r
+ //MmioWrite32(MCI_CLOCK_CONTROL_REG,MCI_CLOCK_BYPASS | MCI_CLOCK_ENABLE);\r
+ break;\r
+ }\r
+ case MmcTransferState:\r
+ //MCI_TRACE("MciNotifyState(MmcTransferState)");\r
+ break;\r
+ case MmcSendingDataState:\r
+ MCI_TRACE("MciNotifyState(MmcSendingDataState)");\r
+ break;\r
+ case MmcReceiveDataState:\r
+ MCI_TRACE("MciNotifyState(MmcReceiveDataState)");\r
+ break;\r
+ case MmcProgrammingState:\r
+ MCI_TRACE("MciNotifyState(MmcProgrammingState)");\r
+ break;\r
+ case MmcDisconnectState:\r
+ MCI_TRACE("MciNotifyState(MmcDisconnectState)");\r
+ break;\r
+ default:\r
+ ASSERT(0);\r
+ }\r
+ return EFI_SUCCESS;\r
}\r
\r
EFI_GUID mPL180MciDevicePathGuid = { 0x621b6fa5, 0x4dc1, 0x476f, 0xb9, 0xd8, 0x52, 0xc5, 0x57, 0xd8, 0x10, 0x70 };\r
\r
-EFI_STATUS MciBuildDevicePath(EFI_DEVICE_PATH_PROTOCOL **DevicePath) {\r
- EFI_DEVICE_PATH_PROTOCOL *NewDevicePathNode;\r
+EFI_STATUS\r
+MciBuildDevicePath (\r
+ IN EFI_DEVICE_PATH_PROTOCOL **DevicePath\r
+ )\r
+{\r
+ EFI_DEVICE_PATH_PROTOCOL *NewDevicePathNode;\r
\r
- NewDevicePathNode = CreateDeviceNode(HARDWARE_DEVICE_PATH,HW_VENDOR_DP,sizeof(VENDOR_DEVICE_PATH));\r
- CopyGuid(&((VENDOR_DEVICE_PATH*)NewDevicePathNode)->Guid,&mPL180MciDevicePathGuid);\r
- \r
- *DevicePath = NewDevicePathNode;\r
- return EFI_SUCCESS;\r
+ NewDevicePathNode = CreateDeviceNode(HARDWARE_DEVICE_PATH,HW_VENDOR_DP,sizeof(VENDOR_DEVICE_PATH));\r
+ CopyGuid(&((VENDOR_DEVICE_PATH*)NewDevicePathNode)->Guid,&mPL180MciDevicePathGuid);\r
+\r
+ *DevicePath = NewDevicePathNode;\r
+ return EFI_SUCCESS;\r
}\r
\r
EFI_MMC_HOST_PROTOCOL gMciHost = {\r
- MciIsCardPresent,\r
- MciIsReadOnly,\r
- MciBuildDevicePath,\r
- MciNotifyState,\r
- MciSendCommand,\r
- MciReceiveResponse,\r
- MciReadBlockData,\r
- MciWriteBlockData\r
+ MciIsCardPresent,\r
+ MciIsReadOnly,\r
+ MciBuildDevicePath,\r
+ MciNotifyState,\r
+ MciSendCommand,\r
+ MciReceiveResponse,\r
+ MciReadBlockData,\r
+ MciWriteBlockData\r
};\r
\r
EFI_STATUS\r
projects / mirror_edk2.git / commitdiff