Main file for Mm shell Debug1 function.\r
\r
(C) Copyright 2015 Hewlett-Packard Development Company, L.P.<BR>\r
- Copyright (c) 2005 - 2014, Intel Corporation. All rights reserved.<BR>\r
+ Copyright (c) 2005 - 2015, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
\r
#include "UefiShellDebug1CommandsLib.h"\r
#include <Library/ShellLib.h>\r
+#include <Library/IoLib.h>\r
#include <Protocol/PciRootBridgeIo.h>\r
#include <Protocol/DeviceIo.h>\r
\r
typedef enum {\r
- EfiMemory,\r
- EFIMemoryMappedIo,\r
- EfiIo,\r
- EfiPciConfig,\r
- EfiPciEConfig\r
-} EFI_ACCESS_TYPE;\r
+ ShellMmMemory,\r
+ ShellMmMemoryMappedIo,\r
+ ShellMmIo,\r
+ ShellMmPci,\r
+ ShellMmPciExpress\r
+} SHELL_MM_ACCESS_TYPE;\r
+\r
+CONST UINT16 mShellMmAccessTypeStr[] = {\r
+ STRING_TOKEN (STR_MM_MEM),\r
+ STRING_TOKEN (STR_MM_MMIO),\r
+ STRING_TOKEN (STR_MM_IO),\r
+ STRING_TOKEN (STR_MM_PCI),\r
+ STRING_TOKEN (STR_MM_PCIE)\r
+};\r
\r
STATIC CONST SHELL_PARAM_ITEM ParamList[] = {\r
{L"-mmio", TypeFlag},\r
{NULL, TypeMax}\r
};\r
\r
-STATIC CONST UINT64 MaxNum[9] = { 0xff, 0xffff, 0xffffffff, 0xffffffffffffffffULL };\r
+CONST UINT64 mShellMmMaxNumber[] = {\r
+ 0, MAX_UINT8, MAX_UINT16, 0, MAX_UINT32, 0, 0, 0, MAX_UINT64\r
+};\r
+CONST EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH mShellMmRootBridgeIoWidth[] = {\r
+ 0, EfiPciWidthUint8, EfiPciWidthUint16, 0, EfiPciWidthUint32, 0, 0, 0, EfiPciWidthUint64\r
+};\r
+CONST EFI_CPU_IO_PROTOCOL_WIDTH mShellMmCpuIoWidth[] = {\r
+ 0, EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, 0, EfiCpuIoWidthUint32, 0, 0, 0, EfiCpuIoWidthUint64\r
+};\r
\r
/**\r
- Read some data into a buffer from memory.\r
-\r
- @param[in] Width The width of each read.\r
- @param[in] Addresss The memory location to start reading at.\r
- @param[in] Size The size of Buffer in Width sized units.\r
- @param[out] Buffer The buffer to read into.\r
+ Extract the PCI segment, bus, device, function, register from\r
+ from a SHELL_MM_PCI or SHELL_MM_PCIE format of address..\r
+\r
+ @param[in] PciFormat Whether the address is of PCI format of PCIE format.\r
+ @param[in] Address SHELL_MM_PCI or SHELL_MM_PCIE address.\r
+ @param[out] Segment PCI segment number.\r
+ @param[out] Bus PCI bus number.\r
+ @param[out] Device PCI device number.\r
+ @param[out] Function PCI function number.\r
+ @param[out] Register PCI register offset.\r
**/\r
VOID\r
EFIAPI\r
-ReadMem (\r
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,\r
- IN UINT64 Address,\r
- IN UINTN Size,\r
- OUT VOID *Buffer\r
+ShellMmDecodePciAddress (\r
+ IN BOOLEAN PciFormat,\r
+ IN UINT64 Address,\r
+ OUT UINT32 *Segment,\r
+ OUT UINT8 *Bus,\r
+ OUT UINT8 *Device, OPTIONAL\r
+ OUT UINT8 *Function, OPTIONAL\r
+ OUT UINT32 *Register OPTIONAL\r
)\r
{\r
- //\r
- // This function is defective. This ASSERT prevents the defect from affecting anything.\r
- //\r
- ASSERT(Size == 1);\r
- do {\r
- if (Width == EfiPciWidthUint8) {\r
- *(UINT8 *) Buffer = *(UINT8 *) (UINTN) Address;\r
- Address -= 1;\r
- } else if (Width == EfiPciWidthUint16) {\r
- *(UINT16 *) Buffer = *(UINT16 *) (UINTN) Address;\r
- Address -= 2;\r
- } else if (Width == EfiPciWidthUint32) {\r
- *(UINT32 *) Buffer = *(UINT32 *) (UINTN) Address;\r
- Address -= 4;\r
- } else if (Width == EfiPciWidthUint64) {\r
- *(UINT64 *) Buffer = *(UINT64 *) (UINTN) Address;\r
- Address -= 8;\r
- } else {\r
- ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN (STR_MM_READ_ERROR), gShellDebug1HiiHandle, L"mm"); \r
- break;\r
+ if (PciFormat) {\r
+ //\r
+ // PCI Configuration Space.The address will have the format 0x000000ssbbddffrr,\r
+ // where ss = Segment, bb = Bus, dd = Device, ff = Function and rr = Register.\r
+ //\r
+ *Segment = (UINT32) (RShiftU64 (Address, 32) & 0xFF);\r
+ *Bus = (UINT8) (((UINT32) Address) >> 24);\r
+\r
+ if (Device != NULL) {\r
+ *Device = (UINT8) (((UINT32) Address) >> 16);\r
+ }\r
+ if (Function != NULL) {\r
+ *Function = (UINT8) (((UINT32) Address) >> 8);\r
}\r
- Size--;\r
- } while (Size > 0);\r
+ if (Register != NULL) {\r
+ *Register = (UINT8) Address;\r
+ }\r
+ } else {\r
+ //\r
+ // PCI Express Configuration Space.The address will have the format 0x0000000ssbbddffrrr,\r
+ // where ss = Segment, bb = Bus, dd = Device, ff = Function and rrr = Register.\r
+ //\r
+ *Segment = (UINT32) (RShiftU64 (Address, 36) & 0xFF);\r
+ *Bus = (UINT8) RShiftU64 (Address, 28);\r
+ if (Device != NULL) {\r
+ *Device = (UINT8) (((UINT32) Address) >> 20);\r
+ }\r
+ if (Function != NULL) {\r
+ *Function = (UINT8) (((UINT32) Address) >> 12);\r
+ }\r
+ if (Register != NULL) {\r
+ *Register = (UINT32) (Address & 0xFFF);\r
+ }\r
+ }\r
}\r
\r
/**\r
- Write some data to memory.\r
-\r
- @param[in] Width The width of each write.\r
- @param[in] Addresss The memory location to start writing at.\r
- @param[in] Size The size of Buffer in Width sized units.\r
- @param[in] Buffer The buffer to write from.\r
+ Read or write some data from or into the Address.\r
+\r
+ @param[in] AccessType Access type.\r
+ @param[in] PciRootBridgeIo PciRootBridgeIo instance.\r
+ @param[in] CpuIo CpuIo instance.\r
+ @param[in] Read TRUE for read, FALSE for write.\r
+ @param[in] Addresss The memory location to access.\r
+ @param[in] Size The size of Buffer in Width sized units.\r
+ @param[in, out] Buffer The buffer to read into or write from.\r
**/\r
VOID\r
-EFIAPI\r
-WriteMem (\r
- IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,\r
- IN UINT64 Address,\r
- IN UINTN Size,\r
- IN VOID *Buffer\r
+ShellMmAccess (\r
+ IN SHELL_MM_ACCESS_TYPE AccessType,\r
+ IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo,\r
+ IN EFI_CPU_IO2_PROTOCOL *CpuIo,\r
+ IN BOOLEAN Read,\r
+ IN UINT64 Address,\r
+ IN UINTN Size,\r
+ IN OUT VOID *Buffer\r
)\r
{\r
- //\r
- // This function is defective. This ASSERT prevents the defect from affecting anything.\r
- //\r
- ASSERT(Size == 1);\r
- do {\r
- if (Width == EfiPciWidthUint8) {\r
- *(UINT8 *) (UINTN) Address = *(UINT8 *) Buffer;\r
- Address += 1;\r
- } else if (Width == EfiPciWidthUint16) {\r
- *(UINT16 *) (UINTN) Address = *(UINT16 *) Buffer;\r
- Address += 2;\r
- } else if (Width == EfiPciWidthUint32) {\r
- *(UINT32 *) (UINTN) Address = *(UINT32 *) Buffer;\r
- Address += 4;\r
- } else if (Width == EfiPciWidthUint64) {\r
- *(UINT64 *) (UINTN) Address = *(UINT64 *) Buffer;\r
- Address += 8;\r
+ EFI_STATUS Status;\r
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM RootBridgeIoMem;\r
+ EFI_CPU_IO_PROTOCOL_IO_MEM CpuIoMem;\r
+ UINT32 Segment;\r
+ UINT8 Bus;\r
+ UINT8 Device;\r
+ UINT8 Function;\r
+ UINT32 Register;\r
+\r
+ if (AccessType == ShellMmMemory) {\r
+ if (Read) {\r
+ CopyMem (Buffer, (VOID *) (UINTN) Address, Size);\r
} else {\r
+ CopyMem ((VOID *) (UINTN) Address, Buffer, Size);\r
+ }\r
+ } else {\r
+ RootBridgeIoMem = NULL;\r
+ CpuIoMem = NULL;\r
+ switch (AccessType) {\r
+ case ShellMmPci:\r
+ case ShellMmPciExpress:\r
+ ASSERT (PciRootBridgeIo != NULL);\r
+ ShellMmDecodePciAddress ((BOOLEAN) (AccessType == ShellMmPci), Address, &Segment, &Bus, &Device, &Function, &Register);\r
+ if (Read) {\r
+ Status = PciRootBridgeIo->Pci.Read (\r
+ PciRootBridgeIo, mShellMmRootBridgeIoWidth[Size],\r
+ EFI_PCI_ADDRESS (Bus, Device, Function, Register),\r
+ 1, Buffer\r
+ );\r
+ } else {\r
+ Status = PciRootBridgeIo->Pci.Write (\r
+ PciRootBridgeIo, mShellMmRootBridgeIoWidth[Size],\r
+ EFI_PCI_ADDRESS (Bus, Device, Function, Register),\r
+ 1, Buffer\r
+ );\r
+ }\r
+ ASSERT_EFI_ERROR (Status);\r
+ return;\r
+\r
+ case ShellMmMemoryMappedIo:\r
+ if (PciRootBridgeIo != NULL) {\r
+ RootBridgeIoMem = Read ? PciRootBridgeIo->Mem.Read : PciRootBridgeIo->Mem.Write;\r
+ }\r
+ if (CpuIo != NULL) {\r
+ CpuIoMem = Read ? CpuIo->Mem.Read : CpuIo->Mem.Write;\r
+ }\r
+ break;\r
+\r
+ case ShellMmIo:\r
+ if (PciRootBridgeIo != NULL) {\r
+ RootBridgeIoMem = Read ? PciRootBridgeIo->Io.Read : PciRootBridgeIo->Io.Write;\r
+ }\r
+ if (CpuIo != NULL) {\r
+ CpuIoMem = Read ? CpuIo->Io.Read : CpuIo->Io.Write;\r
+ }\r
+ break;\r
+ default:\r
ASSERT (FALSE);\r
+ break;\r
}\r
- //\r
- //\r
- //\r
- Size--;\r
- } while (Size > 0);\r
+\r
+ Status = EFI_UNSUPPORTED;\r
+ if (RootBridgeIoMem != NULL) {\r
+ Status = RootBridgeIoMem (PciRootBridgeIo, mShellMmRootBridgeIoWidth[Size], Address, 1, Buffer);\r
+ }\r
+ if (EFI_ERROR (Status) && (CpuIoMem != NULL)) {\r
+ Status = CpuIoMem (CpuIo, mShellMmCpuIoWidth[Size], Address, 1, Buffer);\r
+ }\r
+\r
+ if (EFI_ERROR (Status)) {\r
+ if (AccessType == ShellMmIo) {\r
+ switch (Size) {\r
+ case 1:\r
+ if (Read) {\r
+ *(UINT8 *) Buffer = IoRead8 ((UINTN) Address);\r
+ } else {\r
+ IoWrite8 ((UINTN) Address, *(UINT8 *) Buffer);\r
+ }\r
+ break;\r
+ case 2:\r
+ if (Read) {\r
+ *(UINT16 *) Buffer = IoRead16 ((UINTN) Address);\r
+ } else {\r
+ IoWrite16 ((UINTN) Address, *(UINT16 *) Buffer);\r
+ }\r
+ break;\r
+ case 4:\r
+ if (Read) {\r
+ *(UINT32 *) Buffer = IoRead32 ((UINTN) Address);\r
+ } else {\r
+ IoWrite32 ((UINTN) Address, *(UINT32 *) Buffer);\r
+ }\r
+ break;\r
+ case 8:\r
+ if (Read) {\r
+ *(UINT64 *) Buffer = IoRead64 ((UINTN) Address);\r
+ } else {\r
+ IoWrite64 ((UINTN) Address, *(UINT64 *) Buffer);\r
+ }\r
+ break;\r
+ default:\r
+ ASSERT (FALSE);\r
+ break;\r
+ }\r
+ } else {\r
+ switch (Size) {\r
+ case 1:\r
+ if (Read) {\r
+ *(UINT8 *) Buffer = MmioRead8 ((UINTN) Address);\r
+ } else {\r
+ MmioWrite8 ((UINTN) Address, *(UINT8 *) Buffer);\r
+ }\r
+ break;\r
+ case 2:\r
+ if (Read) {\r
+ *(UINT16 *) Buffer = MmioRead16 ((UINTN) Address);\r
+ } else {\r
+ MmioWrite16 ((UINTN) Address, *(UINT16 *) Buffer);\r
+ }\r
+ break;\r
+ case 4:\r
+ if (Read) {\r
+ *(UINT32 *) Buffer = MmioRead32 ((UINTN) Address);\r
+ } else {\r
+ MmioWrite32 ((UINTN) Address, *(UINT32 *) Buffer);\r
+ }\r
+ break;\r
+ case 8:\r
+ if (Read) {\r
+ *(UINT64 *) Buffer = MmioRead64 ((UINTN) Address);\r
+ } else {\r
+ MmioWrite64 ((UINTN) Address, *(UINT64 *) Buffer);\r
+ }\r
+ break;\r
+ default:\r
+ ASSERT (FALSE);\r
+ break;\r
+ }\r
+ }\r
+ }\r
+ }\r
}\r
\r
/**\r
- Convert a string to it's hex data.\r
+ Find the CpuIo instance and PciRootBridgeIo instance in the platform.\r
+ If there are multiple PciRootBridgeIo instances, the instance which manages\r
+ the Address is returned.\r
\r
- @param[in] str The pointer to the string of hex data.\r
- @param[out] data The pointer to the buffer to fill. Valid upon a TRUE return.\r
+ @param[in] AccessType Access type.\r
+ @param[in] Address Address to access.\r
+ @param[out] CpuIo Return the CpuIo instance.\r
+ @param[out] PciRootBridgeIo Return the proper PciRootBridgeIo instance.\r
\r
- @retval TRUE The conversion was successful.\r
- @retval FALSE The conversion failed.\r
+ @retval TRUE There are PciRootBridgeIo instances in the platform.\r
+ @retval FALSE There isn't PciRootBridgeIo instance in the platform.\r
**/\r
BOOLEAN\r
-EFIAPI\r
-GetHex (\r
- IN UINT16 *str,\r
- OUT UINT64 *data\r
+ShellMmLocateIoProtocol (\r
+ IN SHELL_MM_ACCESS_TYPE AccessType,\r
+ IN UINT64 Address,\r
+ OUT EFI_CPU_IO2_PROTOCOL **CpuIo,\r
+ OUT EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL **PciRootBridgeIo\r
)\r
{\r
- UINTN TempUint;\r
- CHAR16 TempChar;\r
- BOOLEAN Find;\r
+ EFI_STATUS Status;\r
+ UINTN Index;\r
+ UINTN HandleCount;\r
+ EFI_HANDLE *HandleBuffer;\r
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *Io;\r
+ UINT32 Segment;\r
+ UINT8 Bus;\r
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptors;\r
+\r
+ Status = gBS->LocateProtocol (&gEfiCpuIo2ProtocolGuid, NULL, (VOID **) CpuIo);\r
+ if (EFI_ERROR (Status)) {\r
+ *CpuIo = NULL;\r
+ }\r
+\r
+ *PciRootBridgeIo = NULL;\r
+ Status = gBS->LocateHandleBuffer (\r
+ ByProtocol,\r
+ &gEfiPciRootBridgeIoProtocolGuid,\r
+ NULL,\r
+ &HandleCount,\r
+ &HandleBuffer\r
+ );\r
+ if (EFI_ERROR (Status) || (HandleCount == 0)) {\r
+ return FALSE;\r
+ }\r
+\r
+ if ((AccessType == ShellMmPci) || (AccessType == ShellMmPciExpress)) {\r
+ ShellMmDecodePciAddress ((BOOLEAN) (AccessType == ShellMmPci), Address, &Segment, &Bus, NULL, NULL, NULL);\r
+ }\r
\r
- Find = FALSE;\r
//\r
- // convert hex digits\r
+ // Find the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL of the specified segment & bus number\r
//\r
- TempUint = 0;\r
- TempChar = *(str++);\r
- while (TempChar != CHAR_NULL) {\r
- if (TempChar >= 'a' && TempChar <= 'f') {\r
- TempChar -= 'a' - 'A';\r
- }\r
-\r
- if (TempChar == ' ') {\r
- break;\r
+ for (Index = 0; (Index < HandleCount) && (*PciRootBridgeIo == NULL); Index++) {\r
+ Status = gBS->HandleProtocol (\r
+ HandleBuffer[Index],\r
+ &gEfiPciRootBridgeIoProtocolGuid,\r
+ (VOID *) &Io\r
+ );\r
+ if (EFI_ERROR (Status)) {\r
+ continue;\r
}\r
\r
- if ((TempChar >= '0' && TempChar <= '9') || (TempChar >= 'A' && TempChar <= 'F')) {\r
- TempUint = (TempUint << 4) | (TempChar - (TempChar >= 'A' ? 'A' - 10 : '0'));\r
-\r
- Find = TRUE;\r
- } else {\r
- return FALSE;\r
+ if ((((AccessType == ShellMmPci) || (AccessType == ShellMmPciExpress)) && (Io->SegmentNumber == Segment)) ||\r
+ ((AccessType == ShellMmIo) || (AccessType == ShellMmMemoryMappedIo))\r
+ ) {\r
+ Status = Io->Configuration (Io, (VOID **) &Descriptors);\r
+ if (!EFI_ERROR (Status)) {\r
+ while (Descriptors->Desc != ACPI_END_TAG_DESCRIPTOR) {\r
+ //\r
+ // Compare the segment and bus range for PCI/PCIE access\r
+ //\r
+ if ((Descriptors->ResType == ACPI_ADDRESS_SPACE_TYPE_BUS) &&\r
+ ((AccessType == ShellMmPci) || (AccessType == ShellMmPciExpress)) &&\r
+ ((Bus >= Descriptors->AddrRangeMin) && (Bus <= Descriptors->AddrRangeMax))\r
+ ) {\r
+ *PciRootBridgeIo = Io;\r
+ break;\r
+\r
+ //\r
+ // Compare the address range for MMIO/IO access\r
+ //\r
+ } else if ((((Descriptors->ResType == ACPI_ADDRESS_SPACE_TYPE_IO) && (AccessType == ShellMmIo)) ||\r
+ ((Descriptors->ResType == ACPI_ADDRESS_SPACE_TYPE_MEM) && (AccessType == ShellMmMemoryMappedIo))\r
+ ) && ((Address >= Descriptors->AddrRangeMin) && (Address <= Descriptors->AddrRangeMax))\r
+ ) {\r
+ *PciRootBridgeIo = Io;\r
+ break;\r
+ }\r
+ Descriptors++;\r
+ }\r
+ }\r
}\r
-\r
- TempChar = *(str++);\r
+ }\r
+ if (HandleBuffer != NULL) {\r
+ FreePool (HandleBuffer);\r
}\r
\r
- *data = TempUint;\r
- return Find;\r
-}\r
-\r
-/**\r
- Get the PCI-E Address from a PCI address format 0x0000ssbbddffrrr\r
- where ss is SEGMENT, bb is BUS, dd is DEVICE, ff is FUNCTION\r
- and rrr is REGISTER (extension format for PCI-E).\r
-\r
- @param[in] InputAddress PCI address format on input.\r
- @param[out]PciEAddress PCI-E address extention format.\r
-**/\r
-VOID\r
-EFIAPI\r
-GetPciEAddressFromInputAddress (\r
- IN UINT64 InputAddress,\r
- OUT UINT64 *PciEAddress\r
- )\r
-{\r
- *PciEAddress = RShiftU64(InputAddress & ~(UINT64) 0xFFF, 4);\r
- *PciEAddress += LShiftU64((UINT16) InputAddress & 0x0FFF, 32);\r
+ return TRUE;\r
}\r
\r
/**\r
IN EFI_SYSTEM_TABLE *SystemTable\r
)\r
{\r
- EFI_STATUS Status;\r
- EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *IoDev;\r
- UINT64 Address;\r
- UINT64 PciEAddress;\r
- UINT64 Value;\r
- UINT32 SegmentNumber;\r
- EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width;\r
- EFI_ACCESS_TYPE AccessType;\r
- UINT64 Buffer;\r
- UINTN Index;\r
- UINTN Size;\r
-// CHAR16 *ValueStr;\r
- BOOLEAN Complete;\r
- CHAR16 *InputStr;\r
- BOOLEAN Interactive;\r
- EFI_HANDLE *HandleBuffer;\r
- UINTN BufferSize;\r
- UINTN ItemValue;\r
- LIST_ENTRY *Package;\r
- CHAR16 *ProblemParam;\r
- SHELL_STATUS ShellStatus;\r
- CONST CHAR16 *Temp;\r
-\r
- Value = 0;\r
- Address = 0;\r
- PciEAddress = 0;\r
- IoDev = NULL;\r
- HandleBuffer = NULL;\r
- BufferSize = 0;\r
- SegmentNumber = 0;\r
- ShellStatus = SHELL_SUCCESS;\r
- InputStr = NULL;\r
+ EFI_STATUS Status;\r
+ EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;\r
+ EFI_CPU_IO2_PROTOCOL *CpuIo;\r
+ UINT64 Address;\r
+ UINT64 Value;\r
+ SHELL_MM_ACCESS_TYPE AccessType;\r
+ UINT64 Buffer;\r
+ UINTN Index;\r
+ UINTN Size;\r
+ BOOLEAN Complete;\r
+ CHAR16 *InputStr;\r
+ BOOLEAN Interactive;\r
+ LIST_ENTRY *Package;\r
+ CHAR16 *ProblemParam;\r
+ SHELL_STATUS ShellStatus;\r
+ CONST CHAR16 *Temp;\r
+ BOOLEAN HasPciRootBridgeIo;\r
+\r
+ Value = 0;\r
+ Address = 0;\r
+ ShellStatus = SHELL_SUCCESS;\r
+ InputStr = NULL;\r
+ Size = 1;\r
+ AccessType = ShellMmMemory;\r
\r
//\r
// Parse arguments\r
//\r
- Width = EfiPciWidthUint8;\r
- Size = 1;\r
- AccessType = EfiMemory;\r
-// ValueStr = NULL;\r
- Interactive = TRUE;\r
- Package = NULL;\r
-\r
Status = ShellCommandLineParse (ParamList, &Package, &ProblemParam, TRUE);\r
- if (EFI_ERROR(Status)) {\r
+ if (EFI_ERROR (Status)) {\r
if (Status == EFI_VOLUME_CORRUPTED && ProblemParam != NULL) {\r
- ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN (STR_GEN_PROBLEM), gShellDebug1HiiHandle, L"mm", ProblemParam); \r
- FreePool(ProblemParam);\r
+ ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_GEN_PROBLEM), gShellDebug1HiiHandle, L"mm", ProblemParam);\r
+ FreePool (ProblemParam);\r
ShellStatus = SHELL_INVALID_PARAMETER;\r
goto Done;\r
} else {\r
- ASSERT(FALSE);\r
+ ASSERT (FALSE);\r
}\r
} else {\r
- if (ShellCommandLineGetCount(Package) < 2) {\r
- ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN (STR_GEN_TOO_FEW), gShellDebug1HiiHandle, L"mm"); \r
+ if (ShellCommandLineGetCount (Package) < 2) {\r
+ ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_GEN_TOO_FEW), gShellDebug1HiiHandle, L"mm");\r
ShellStatus = SHELL_INVALID_PARAMETER;\r
goto Done;\r
- } else if (ShellCommandLineGetCount(Package) > 3) {\r
- ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN (STR_GEN_TOO_MANY), gShellDebug1HiiHandle, L"mm"); \r
+ } else if (ShellCommandLineGetCount (Package) > 3) {\r
+ ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_GEN_TOO_MANY), gShellDebug1HiiHandle, L"mm");\r
ShellStatus = SHELL_INVALID_PARAMETER;\r
goto Done;\r
- } else if (ShellCommandLineGetFlag(Package, L"-w") && ShellCommandLineGetValue(Package, L"-w") == NULL) {\r
- ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN (STR_GEN_NO_VALUE), gShellDebug1HiiHandle, L"mm", L"-w"); \r
+ } else if (ShellCommandLineGetFlag (Package, L"-w") && ShellCommandLineGetValue (Package, L"-w") == NULL) {\r
+ ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_GEN_NO_VALUE), gShellDebug1HiiHandle, L"mm", L"-w");\r
ShellStatus = SHELL_INVALID_PARAMETER;\r
goto Done;\r
} else {\r
- if (ShellCommandLineGetFlag(Package, L"-mmio")) {\r
- AccessType = EFIMemoryMappedIo;\r
- if (ShellCommandLineGetFlag(Package, L"-mem")\r
- ||ShellCommandLineGetFlag(Package, L"-io")\r
- ||ShellCommandLineGetFlag(Package, L"-pci")\r
- ||ShellCommandLineGetFlag(Package, L"-pcie")\r
- ){\r
- ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN (STR_GEN_TOO_MANY), gShellDebug1HiiHandle, L"mm"); \r
+ if (ShellCommandLineGetFlag (Package, L"-mmio")) {\r
+ AccessType = ShellMmMemoryMappedIo;\r
+ if (ShellCommandLineGetFlag (Package, L"-mem")\r
+ || ShellCommandLineGetFlag (Package, L"-io")\r
+ || ShellCommandLineGetFlag (Package, L"-pci")\r
+ || ShellCommandLineGetFlag (Package, L"-pcie")\r
+ ) {\r
+ ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_GEN_TOO_MANY), gShellDebug1HiiHandle, L"mm");\r
ShellStatus = SHELL_INVALID_PARAMETER;\r
goto Done;\r
}\r
- } else if (ShellCommandLineGetFlag(Package, L"-mem")) {\r
- AccessType = EfiMemory;\r
- if (ShellCommandLineGetFlag(Package, L"-io")\r
- ||ShellCommandLineGetFlag(Package, L"-pci")\r
- ||ShellCommandLineGetFlag(Package, L"-pcie")\r
- ){\r
- ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN (STR_GEN_TOO_MANY), gShellDebug1HiiHandle, L"mm"); \r
+ } else if (ShellCommandLineGetFlag (Package, L"-mem")) {\r
+ AccessType = ShellMmMemory;\r
+ if (ShellCommandLineGetFlag (Package, L"-io")\r
+ || ShellCommandLineGetFlag (Package, L"-pci")\r
+ || ShellCommandLineGetFlag (Package, L"-pcie")\r
+ ) {\r
+ ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_GEN_TOO_MANY), gShellDebug1HiiHandle, L"mm");\r
ShellStatus = SHELL_INVALID_PARAMETER;\r
goto Done;\r
}\r
- } else if (ShellCommandLineGetFlag(Package, L"-io")) {\r
- AccessType = EfiIo;\r
- if (ShellCommandLineGetFlag(Package, L"-pci")\r
- ||ShellCommandLineGetFlag(Package, L"-pcie")\r
- ){\r
- ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN (STR_GEN_TOO_MANY), gShellDebug1HiiHandle, L"mm"); \r
+ } else if (ShellCommandLineGetFlag (Package, L"-io")) {\r
+ AccessType = ShellMmIo;\r
+ if (ShellCommandLineGetFlag (Package, L"-pci")\r
+ || ShellCommandLineGetFlag (Package, L"-pcie")\r
+ ) {\r
+ ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_GEN_TOO_MANY), gShellDebug1HiiHandle, L"mm");\r
ShellStatus = SHELL_INVALID_PARAMETER;\r
goto Done;\r
}\r
- } else if (ShellCommandLineGetFlag(Package, L"-pci")) {\r
- AccessType = EfiPciConfig;\r
- if (ShellCommandLineGetFlag(Package, L"-pcie")\r
- ){\r
- ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN (STR_GEN_TOO_MANY), gShellDebug1HiiHandle, L"mm"); \r
+ } else if (ShellCommandLineGetFlag (Package, L"-pci")) {\r
+ AccessType = ShellMmPci;\r
+ if (ShellCommandLineGetFlag (Package, L"-pcie")\r
+ ) {\r
+ ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_GEN_TOO_MANY), gShellDebug1HiiHandle, L"mm");\r
ShellStatus = SHELL_INVALID_PARAMETER;\r
goto Done;\r
}\r
- } else if (ShellCommandLineGetFlag(Package, L"-pcie")) {\r
- AccessType = EfiPciEConfig;\r
+ } else if (ShellCommandLineGetFlag (Package, L"-pcie")) {\r
+ AccessType = ShellMmPciExpress;\r
}\r
}\r
\r
//\r
// Non interactive for a script file or for the specific parameter\r
//\r
- if (gEfiShellProtocol->BatchIsActive() || ShellCommandLineGetFlag (Package, L"-n")) {\r
+ Interactive = TRUE;\r
+ if (gEfiShellProtocol->BatchIsActive () || ShellCommandLineGetFlag (Package, L"-n")) {\r
Interactive = FALSE;\r
}\r
\r
- Temp = ShellCommandLineGetValue(Package, L"-w");\r
+ Temp = ShellCommandLineGetValue (Package, L"-w");\r
if (Temp != NULL) {\r
- ItemValue = ShellStrToUintn (Temp);\r
-\r
- switch (ItemValue) {\r
- case 1:\r
- Width = EfiPciWidthUint8;\r
- Size = 1;\r
- break;\r
-\r
- case 2:\r
- Width = EfiPciWidthUint16;\r
- Size = 2;\r
- break;\r
-\r
- case 4:\r
- Width = EfiPciWidthUint32;\r
- Size = 4;\r
- break;\r
-\r
- case 8:\r
- Width = EfiPciWidthUint64;\r
- Size = 8;\r
- break;\r
-\r
- default:\r
- ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN (STR_GEN_PROBLEM_VAL), gShellDebug1HiiHandle, L"mm", Temp, L"-w"); \r
- ShellStatus = SHELL_INVALID_PARAMETER;\r
- goto Done;\r
- }\r
+ Size = ShellStrToUintn (Temp);\r
}\r
-\r
- Temp = ShellCommandLineGetRawValue(Package, 1);\r
- if (!ShellIsHexOrDecimalNumber(Temp, TRUE, FALSE) || EFI_ERROR(ShellConvertStringToUint64(Temp, (UINT64*)&Address, TRUE, FALSE))) {\r
- ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN (STR_GEN_PARAM_INV), gShellDebug1HiiHandle, L"mm", Temp); \r
+ if ((Size != 1) && (Size != 2) && (Size != 4) && (Size != 8)) {\r
+ ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_GEN_PROBLEM_VAL), gShellDebug1HiiHandle, L"mm", Temp, L"-w");\r
ShellStatus = SHELL_INVALID_PARAMETER;\r
goto Done;\r
}\r
\r
- Temp = ShellCommandLineGetRawValue(Package, 2);\r
- if (Temp != NULL) {\r
- //\r
- // Per spec if value is specified, then -n is assumed.\r
- //\r
- Interactive = FALSE;\r
-\r
- if (!ShellIsHexOrDecimalNumber(Temp, TRUE, FALSE) || EFI_ERROR(ShellConvertStringToUint64(Temp, &Value, TRUE, FALSE))) {\r
- ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN (STR_GEN_PARAM_INV), gShellDebug1HiiHandle, L"mm", Temp); \r
- ShellStatus = SHELL_INVALID_PARAMETER;\r
- goto Done;\r
- }\r
- switch (Size) {\r
- case 1:\r
- if (Value > 0xFF) {\r
- ShellStatus = SHELL_INVALID_PARAMETER;\r
- }\r
- break;\r
-\r
- case 2:\r
- if (Value > 0xFFFF) {\r
- ShellStatus = SHELL_INVALID_PARAMETER;\r
- }\r
- break;\r
-\r
- case 4:\r
- if (Value > 0xFFFFFFFF) {\r
- ShellStatus = SHELL_INVALID_PARAMETER;\r
- }\r
- break;\r
-\r
- default:\r
- break;\r
- }\r
-\r
- if (ShellStatus != SHELL_SUCCESS) {\r
- ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN (STR_GEN_PARAM_INV), gShellDebug1HiiHandle, L"mm", Temp); \r
- ShellStatus = SHELL_INVALID_PARAMETER;\r
- goto Done;\r
- }\r
+ Temp = ShellCommandLineGetRawValue (Package, 1);\r
+ Status = ShellConvertStringToUint64 (Temp, &Address, TRUE, FALSE);\r
+ if (EFI_ERROR (Status)) {\r
+ ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_GEN_PARAM_INV), gShellDebug1HiiHandle, L"mm", Temp);\r
+ ShellStatus = SHELL_INVALID_PARAMETER;\r
+ goto Done;\r
}\r
\r
if ((Address & (Size - 1)) != 0) {\r
- ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN (STR_MM_NOT_ALIGNED), gShellDebug1HiiHandle, L"mm", Address); \r
+ ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_MM_NOT_ALIGNED), gShellDebug1HiiHandle, L"mm", Address);\r
+ ShellStatus = SHELL_INVALID_PARAMETER;\r
+ goto Done;\r
+ }\r
+\r
+ if ((AccessType == ShellMmIo) && (Address + Size > MAX_UINT16 + 1)) {\r
+ ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_MM_IO_ADDRESS_RANGE), gShellDebug1HiiHandle, L"mm");\r
ShellStatus = SHELL_INVALID_PARAMETER;\r
goto Done;\r
}\r
+\r
//\r
- // locate DeviceIO protocol interface\r
+ // locate IO protocol interface\r
//\r
- if (AccessType != EfiMemory) {\r
- Status = gBS->LocateHandleBuffer (\r
- ByProtocol,\r
- &gEfiPciRootBridgeIoProtocolGuid,\r
- NULL,\r
- &BufferSize,\r
- &HandleBuffer\r
- );\r
- if (EFI_ERROR (Status)) {\r
- ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN (STR_GEN_PCIRBIO_NF), gShellDebug1HiiHandle, L"mm"); \r
+ HasPciRootBridgeIo = ShellMmLocateIoProtocol (AccessType, Address, &CpuIo, &PciRootBridgeIo);\r
+ if ((AccessType == ShellMmPci) || (AccessType == ShellMmPciExpress)) {\r
+ if (!HasPciRootBridgeIo) {\r
+ ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_GEN_PCIRBIO_NF), gShellDebug1HiiHandle, L"mm");\r
ShellStatus = SHELL_NOT_FOUND;\r
goto Done;\r
}\r
- //\r
- // In the case of PCI or PCIE\r
- // Get segment number and mask the segment bits in Address\r
- //\r
- if (AccessType == EfiPciEConfig) {\r
- SegmentNumber = (UINT32) RShiftU64 (Address, 36) & 0xff;\r
- Address &= 0xfffffffffULL;\r
- } else {\r
- if (AccessType == EfiPciConfig) {\r
- SegmentNumber = (UINT32) RShiftU64 (Address, 32) & 0xff;\r
- Address &= 0xffffffff;\r
- }\r
- }\r
- //\r
- // Find the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL of the specified segment number\r
- //\r
- for (Index = 0; Index < BufferSize; Index++) {\r
- Status = gBS->HandleProtocol (\r
- HandleBuffer[Index],\r
- &gEfiPciRootBridgeIoProtocolGuid,\r
- (VOID *) &IoDev\r
- );\r
- if (EFI_ERROR (Status)) {\r
- continue;\r
- }\r
- if (IoDev->SegmentNumber != SegmentNumber) {\r
- IoDev = NULL;\r
- }\r
- }\r
- if (IoDev == NULL) {\r
- ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN (STR_MM_SEGMENT_NOT_FOUND), gShellDebug1HiiHandle, L"mm", SegmentNumber); \r
+ if (PciRootBridgeIo == NULL) {\r
+ ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_MM_PCIE_ADDRESS_RANGE), gShellDebug1HiiHandle, L"mm", Address);\r
ShellStatus = SHELL_INVALID_PARAMETER;\r
goto Done;\r
}\r
}\r
\r
- if (AccessType == EfiIo && Address + Size > 0x10000) {\r
- ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN (STR_MM_ADDRESS_RANGE), gShellDebug1HiiHandle, L"mm"); \r
- ShellStatus = SHELL_INVALID_PARAMETER;\r
- goto Done;\r
- }\r
-\r
- if (AccessType == EfiPciEConfig) {\r
- GetPciEAddressFromInputAddress (Address, &PciEAddress);\r
- }\r
-\r
//\r
- // Set value\r
+ // Mode 1: Directly set a value\r
//\r
- if (ShellCommandLineGetRawValue(Package, 2) != NULL) {\r
- if (AccessType == EFIMemoryMappedIo) {\r
- IoDev->Mem.Write (IoDev, Width, Address, 1, &Value);\r
- } else if (AccessType == EfiIo) {\r
- IoDev->Io.Write (IoDev, Width, Address, 1, &Value);\r
- } else if (AccessType == EfiPciConfig) {\r
- IoDev->Pci.Write (IoDev, Width, Address, 1, &Value);\r
- } else if (AccessType == EfiPciEConfig) {\r
- IoDev->Pci.Write (IoDev, Width, PciEAddress, 1, &Value);\r
- } else {\r
- WriteMem (Width, Address, 1, &Value);\r
+ Temp = ShellCommandLineGetRawValue (Package, 2);\r
+ if (Temp != NULL) {\r
+ Status = ShellConvertStringToUint64 (Temp, &Value, TRUE, FALSE);\r
+ if (EFI_ERROR (Status)) {\r
+ ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_GEN_PARAM_INV), gShellDebug1HiiHandle, L"mm", Temp);\r
+ ShellStatus = SHELL_INVALID_PARAMETER;\r
+ goto Done;\r
+ }\r
+\r
+ if (Value > mShellMmMaxNumber[Size]) {\r
+ ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_GEN_PARAM_INV), gShellDebug1HiiHandle, L"mm", Temp);\r
+ ShellStatus = SHELL_INVALID_PARAMETER;\r
+ goto Done;\r
}\r
\r
- ASSERT(ShellStatus == SHELL_SUCCESS);\r
+ ShellMmAccess (AccessType, PciRootBridgeIo, CpuIo, FALSE, Address, Size, &Value);\r
goto Done;\r
}\r
\r
-\r
//\r
- // non-interactive mode\r
+ // Mode 2: Directly show a value\r
//\r
if (!Interactive) {\r
- Buffer = 0;\r
- if (AccessType == EFIMemoryMappedIo) {\r
- if (!gEfiShellProtocol->BatchIsActive()) {\r
- ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN (STR_MM_MMIO), gShellDebug1HiiHandle);\r
- }\r
- IoDev->Mem.Read (IoDev, Width, Address, 1, &Buffer);\r
- } else if (AccessType == EfiIo) {\r
- if (!gEfiShellProtocol->BatchIsActive()) {\r
- ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN (STR_MM_IO), gShellDebug1HiiHandle);\r
- }\r
- IoDev->Io.Read (IoDev, Width, Address, 1, &Buffer);\r
- } else if (AccessType == EfiPciConfig) {\r
- if (!gEfiShellProtocol->BatchIsActive()) {\r
- ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN (STR_MM_PCI), gShellDebug1HiiHandle);\r
- }\r
- IoDev->Pci.Read (IoDev, Width, Address, 1, &Buffer);\r
- } else if (AccessType == EfiPciEConfig) {\r
- if (!gEfiShellProtocol->BatchIsActive()) {\r
- ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN (STR_MM_PCIE), gShellDebug1HiiHandle);\r
- }\r
- IoDev->Pci.Read (IoDev, Width, PciEAddress, 1, &Buffer);\r
- } else {\r
- if (!gEfiShellProtocol->BatchIsActive()) {\r
- ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN (STR_MM_MEM), gShellDebug1HiiHandle);\r
- }\r
- ReadMem (Width, Address, 1, &Buffer);\r
- }\r
- if (!gEfiShellProtocol->BatchIsActive()) {\r
- ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN (STR_MM_ADDRESS), gShellDebug1HiiHandle, Address);\r
- }\r
- if (Size == 1) {\r
- ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN (STR_MM_BUF2), gShellDebug1HiiHandle, (UINTN)Buffer);\r
- } else if (Size == 2) {\r
- ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN (STR_MM_BUF4), gShellDebug1HiiHandle, (UINTN)Buffer);\r
- } else if (Size == 4) {\r
- ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN (STR_MM_BUF8), gShellDebug1HiiHandle, (UINTN)Buffer);\r
- } else if (Size == 8) {\r
- ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN (STR_MM_BUF16), gShellDebug1HiiHandle, Buffer);\r
+ if (!gEfiShellProtocol->BatchIsActive ()) {\r
+ ShellPrintHiiEx (-1, -1, NULL, mShellMmAccessTypeStr[AccessType], gShellDebug1HiiHandle);\r
}\r
+ ShellMmAccess (AccessType, PciRootBridgeIo, CpuIo, TRUE, Address, Size, &Buffer);\r
\r
- ShellPrintEx(-1, -1, L"\r\n");\r
-\r
- ASSERT(ShellStatus == SHELL_SUCCESS);\r
+ if (!gEfiShellProtocol->BatchIsActive ()) {\r
+ ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_MM_ADDRESS), gShellDebug1HiiHandle, Address);\r
+ }\r
+ ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_MM_BUF), gShellDebug1HiiHandle, Size * 2, Buffer & mShellMmMaxNumber[Size]);\r
+ ShellPrintEx (-1, -1, L"\r\n");\r
goto Done;\r
}\r
+\r
//\r
- // interactive mode\r
+ // Mode 3: Show or set values in interactive mode\r
//\r
Complete = FALSE;\r
do {\r
- if (AccessType == EfiIo && Address + Size > 0x10000) {\r
- ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN (STR_MM_ADDRESS_RANGE2), gShellDebug1HiiHandle, L"mm"); \r
+ if ((AccessType == ShellMmIo) && (Address + Size > MAX_UINT16 + 1)) {\r
+ ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_MM_ADDRESS_RANGE2), gShellDebug1HiiHandle, L"mm");\r
break;\r
}\r
\r
- Buffer = 0;\r
- if (AccessType == EFIMemoryMappedIo) {\r
- ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN (STR_MM_MMIO), gShellDebug1HiiHandle);\r
- IoDev->Mem.Read (IoDev, Width, Address, 1, &Buffer);\r
- } else if (AccessType == EfiIo) {\r
- ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN (STR_MM_IO), gShellDebug1HiiHandle);\r
- IoDev->Io.Read (IoDev, Width, Address, 1, &Buffer);\r
- } else if (AccessType == EfiPciConfig) {\r
- ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN (STR_MM_PCI), gShellDebug1HiiHandle);\r
- IoDev->Pci.Read (IoDev, Width, Address, 1, &Buffer);\r
- } else if (AccessType == EfiPciEConfig) {\r
- ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN (STR_MM_PCIE), gShellDebug1HiiHandle);\r
- IoDev->Pci.Read (IoDev, Width, PciEAddress, 1, &Buffer);\r
- } else {\r
- ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN (STR_MM_MEM), gShellDebug1HiiHandle);\r
- ReadMem (Width, Address, 1, &Buffer);\r
- }\r
-\r
- ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN (STR_MM_ADDRESS), gShellDebug1HiiHandle, Address);\r
-\r
- if (Size == 1) {\r
- ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN (STR_MM_BUF2), gShellDebug1HiiHandle, (UINTN)Buffer);\r
- } else if (Size == 2) {\r
- ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN (STR_MM_BUF4), gShellDebug1HiiHandle, (UINTN)Buffer);\r
- } else if (Size == 4) {\r
- ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN (STR_MM_BUF8), gShellDebug1HiiHandle, (UINTN)Buffer);\r
- } else if (Size == 8) {\r
- ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN (STR_MM_BUF16), gShellDebug1HiiHandle, Buffer);\r
- }\r
- ShellPrintEx(-1, -1, L" > ");\r
+ ShellMmAccess (AccessType, PciRootBridgeIo, CpuIo, TRUE, Address, Size, &Buffer);\r
+ ShellPrintHiiEx (-1, -1, NULL, mShellMmAccessTypeStr[AccessType], gShellDebug1HiiHandle);\r
+ ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_MM_ADDRESS), gShellDebug1HiiHandle, Address);\r
+ ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_MM_BUF), gShellDebug1HiiHandle, Size * 2, Buffer & mShellMmMaxNumber[Size]);\r
+ ShellPrintEx (-1, -1, L" > ");\r
//\r
// wait user input to modify\r
//\r
if (InputStr != NULL) {\r
- FreePool(InputStr);\r
+ FreePool (InputStr);\r
InputStr = NULL;\r
}\r
- ShellPromptForResponse(ShellPromptResponseTypeFreeform, NULL, (VOID**)&InputStr);\r
+ ShellPromptForResponse (ShellPromptResponseTypeFreeform, NULL, (VOID**) &InputStr);\r
\r
- //\r
- // skip space characters\r
- //\r
- for (Index = 0; InputStr != NULL && InputStr[Index] == ' '; Index++);\r
-\r
- //\r
- // parse input string\r
- //\r
- if (InputStr != NULL && (InputStr[Index] == '.' || InputStr[Index] == 'q' || InputStr[Index] == 'Q')) {\r
- Complete = TRUE;\r
- } else if (InputStr == NULL || InputStr[Index] == CHAR_NULL) {\r
+ if (InputStr != NULL) {\r
//\r
- // Continue to next address\r
+ // skip space characters\r
//\r
- } else if (GetHex (InputStr + Index, &Buffer) && Buffer <= MaxNum[Width]) {\r
- if (AccessType == EFIMemoryMappedIo) {\r
- IoDev->Mem.Write (IoDev, Width, Address, 1, &Buffer);\r
- } else if (AccessType == EfiIo) {\r
- IoDev->Io.Write (IoDev, Width, Address, 1, &Buffer);\r
- } else if (AccessType == EfiPciConfig) {\r
- IoDev->Pci.Write (IoDev, Width, Address, 1, &Buffer);\r
- } else if (AccessType == EfiPciEConfig) {\r
- IoDev->Pci.Write (IoDev, Width, PciEAddress, 1, &Buffer);\r
+ for (Index = 0; InputStr[Index] == ' '; Index++);\r
+ }\r
+\r
+ if ((InputStr != NULL) && (InputStr[Index] != CHAR_NULL)) {\r
+ if ((InputStr[Index] == '.') || (InputStr[Index] == 'q') || (InputStr[Index] == 'Q')) {\r
+ Complete = TRUE;\r
+ } else if (!EFI_ERROR (ShellConvertStringToUint64 (InputStr + Index, &Buffer, TRUE, TRUE)) &&\r
+ (Buffer <= mShellMmMaxNumber[Size])\r
+ ) {\r
+ ShellMmAccess (AccessType, PciRootBridgeIo, CpuIo, FALSE, Address, Size, &Buffer);\r
} else {\r
- WriteMem (Width, Address, 1, &Buffer);\r
+ ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_MM_ERROR), gShellDebug1HiiHandle, L"mm");\r
+ continue;\r
}\r
- } else {\r
- ShellPrintHiiEx(-1, -1, NULL, STRING_TOKEN (STR_MM_ERROR), gShellDebug1HiiHandle, L"mm"); \r
- continue;\r
- // PrintToken (STRING_TOKEN (STR_IOMOD_ERROR), HiiHandle);\r
}\r
\r
Address += Size;\r
- if (AccessType == EfiPciEConfig) {\r
- GetPciEAddressFromInputAddress (Address, &PciEAddress);\r
- }\r
- ShellPrintEx(-1, -1, L"\r\n");\r
- // Print (L"\n");\r
+ ShellPrintEx (-1, -1, L"\r\n");\r
} while (!Complete);\r
}\r
- ASSERT(ShellStatus == SHELL_SUCCESS);\r
-Done:\r
+ ASSERT (ShellStatus == SHELL_SUCCESS);\r
\r
+Done:\r
if (InputStr != NULL) {\r
- FreePool(InputStr);\r
- }\r
- if (HandleBuffer != NULL) {\r
- FreePool (HandleBuffer);\r
+ FreePool (InputStr);\r
}\r
if (Package != NULL) {\r
ShellCommandLineFreeVarList (Package);\r
projects / mirror_edk2.git / commitdiff