MdeModulePkg PciBusDxe: The PCI Bus Driver is updated to support multiple PCI bus...

Signed-off-by: rsun3
Reviewed-by: vanjeff
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12600 6f19259b-4bc3-4df7-8a09-765794883524

diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h
index 239835eab75fc3a7cd67a5d32e9b2b930fa1d5e4..d591f0a2c1632daccf0938895a929f8a4a0143db 100644 (file)
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciBus.h
@@ -268,6 +268,11 @@ struct _PCI_IO_DEVICE {
   EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR         *ResourcePaddingDescriptors;\r
   EFI_HPC_PADDING_ATTRIBUTES                PaddingAttributes;\r
 \r
+  //\r
+  // Bus number ranges for a PCI Root Bridge device\r
+  //\r
+  EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR         *BusNumberRanges;\r
+\r
   BOOLEAN                                   IsPciExp;\r
   //\r
   // For SR-IOV\r

diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c
index 189ce1360f37d03375f381f1699c0078ef970c13..42065738ed6194a17b19db597b51ab203f56b620 100644 (file)
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciEnumerator.c
@@ -158,10 +158,16 @@ PciRootBridgeEnumerator (
 {\r
   EFI_STATUS                        Status;\r
   EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Configuration;\r
+  EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Configuration1;\r
+  EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Configuration2;\r
+  EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Configuration3;\r
   UINT8                             SubBusNumber;\r
   UINT8                             StartBusNumber;\r
   UINT8                             PaddedBusRange;\r
   EFI_HANDLE                        RootBridgeHandle;\r
+  UINT8                             Desc;\r
+  UINT64                            AddrLen;\r
+  UINT64                            AddrRangeMin;\r
 \r
   SubBusNumber    = 0;\r
   StartBusNumber  = 0;\r
@@ -191,11 +197,40 @@ PciRootBridgeEnumerator (
     return Status;\r
   }\r
 \r
+  if (Configuration == NULL || Configuration->Desc == ACPI_END_TAG_DESCRIPTOR) {\r
+    return EFI_INVALID_PARAMETER;\r
+  }\r
+  RootBridgeDev->BusNumberRanges = Configuration;\r
+\r
+  //\r
+  // Sort the descriptors in ascending order\r
+  //\r
+  for (Configuration1 = Configuration; Configuration1->Desc != ACPI_END_TAG_DESCRIPTOR; Configuration1++) {\r
+    Configuration2 = Configuration1;\r
+    for (Configuration3 = Configuration1 + 1; Configuration3->Desc != ACPI_END_TAG_DESCRIPTOR; Configuration3++) {\r
+      if (Configuration2->AddrRangeMin > Configuration3->AddrRangeMin) {\r
+        Configuration2 = Configuration3;\r
+      }\r
+    }\r
+    //\r
+    // All other fields other than AddrRangeMin and AddrLen are ignored in a descriptor,\r
+    // so only need to swap these two fields.\r
+    //\r
+    if (Configuration2 != Configuration1) {\r
+      AddrRangeMin = Configuration1->AddrRangeMin;\r
+      Configuration1->AddrRangeMin = Configuration2->AddrRangeMin;\r
+      Configuration2->AddrRangeMin = AddrRangeMin;\r
+      \r
+      AddrLen = Configuration1->AddrLen;\r
+      Configuration1->AddrLen = Configuration2->AddrLen;\r
+      Configuration2->AddrLen = AddrLen;\r
+    }\r
+  }\r
+\r
   //\r
   // Get the bus number to start with\r
   //\r
   StartBusNumber = (UINT8) (Configuration->AddrRangeMin);\r
-  PaddedBusRange  = (UINT8) (Configuration->AddrRangeMax);\r
 \r
   //\r
   // Initialize the subordinate bus number\r
@@ -215,7 +250,7 @@ PciRootBridgeEnumerator (
   //\r
   Status = PciScanBus (\r
             RootBridgeDev,\r
-            (UINT8) (Configuration->AddrRangeMin),\r
+            StartBusNumber,\r
             &SubBusNumber,\r
             &PaddedBusRange\r
             );\r
@@ -228,24 +263,45 @@ PciRootBridgeEnumerator (
   //\r
   // Assign max bus number scanned\r
   //\r
-  Configuration->AddrLen = SubBusNumber - StartBusNumber + 1 + PaddedBusRange;\r
 \r
+  Status = PciAllocateBusNumber (RootBridgeDev, SubBusNumber, PaddedBusRange, &SubBusNumber);\r
+  if (EFI_ERROR (Status)) {\r
+    return Status;\r
+  }  \r
+\r
+  //\r
+  // Find the bus range which contains the higest bus number, then returns the number of buses\r
+  // that should be decoded.\r
+  //\r
+  while (Configuration->AddrRangeMin + Configuration->AddrLen - 1 < SubBusNumber) {\r
+    Configuration++;\r
+  }\r
+  AddrLen = Configuration->AddrLen;\r
+  Configuration->AddrLen = SubBusNumber - Configuration->AddrRangeMin + 1;\r
+\r
+  //\r
+  // Save the Desc field of the next descriptor. Mark the next descriptor as an END descriptor.\r
+  //\r
+  Configuration++;\r
+  Desc = Configuration->Desc;\r
+  Configuration->Desc = ACPI_END_TAG_DESCRIPTOR;\r
+  \r
   //\r
   // Set bus number\r
   //\r
   Status = PciResAlloc->SetBusNumbers (\r
                           PciResAlloc,\r
                           RootBridgeHandle,\r
-                          Configuration\r
+                          RootBridgeDev->BusNumberRanges\r
                           );\r
 \r
-  FreePool (Configuration);\r
-\r
-  if (EFI_ERROR (Status)) {\r
-    return Status;\r
-  }\r
-\r
-  return EFI_SUCCESS;\r
+  //\r
+  // Restore changed fields\r
+  //\r
+  Configuration->Desc = Desc;\r
+  (Configuration - 1)->AddrLen = AddrLen;\r
+  \r
+  return Status;\r
 }\r
 \r
 /**\r
@@ -351,7 +407,11 @@ PciAssignBusNumber (
         //\r
         // Reserved one bus for cardbus bridge\r
         //\r
-        SecondBus = ++(*SubBusNumber);\r
+        Status = PciAllocateBusNumber (Bridge, *SubBusNumber, 1, SubBusNumber);\r
+        if (EFI_ERROR (Status)) {\r
+          return Status;\r
+        }\r
+        SecondBus = *SubBusNumber;\r
 \r
         Register  = (UINT16) ((SecondBus << 8) | (UINT16) StartBusNumber);\r
 \r

diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c b/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c
index eba5efdce215fed643dcef540c946b7fba940462..87ee61956ac92f501c181294b7cde4534fe1ab71 100644 (file)
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.c
@@ -896,6 +896,64 @@ PciHostBridgeResourceAllocator (
   return EFI_SUCCESS;\r
 }\r
 \r
+/**\r
+  Allocate NumberOfBuses buses and return the next available PCI bus number.\r
+\r
+  @param  Bridge           Bridge device instance.\r
+  @param  StartBusNumber   Current available PCI bus number.\r
+  @param  NumberOfBuses    Number of buses enumerated below the StartBusNumber.\r
+  @param  NextBusNumber    Next available PCI bus number.\r
+\r
+  @retval EFI_SUCCESS           Available bus number resource is enough. Next available PCI bus number\r
+                                is returned in NextBusNumber.\r
+  @retval EFI_OUT_OF_RESOURCES  Available bus number resource is not enough for allocation.\r
+\r
+**/\r
+EFI_STATUS\r
+PciAllocateBusNumber (\r
+  IN PCI_IO_DEVICE                      *Bridge,\r
+  IN UINT8                              StartBusNumber,\r
+  IN UINT8                              NumberOfBuses,\r
+  OUT UINT8                             *NextBusNumber\r
+  )\r
+{\r
+  PCI_IO_DEVICE                      *RootBridge;\r
+  EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR  *BusNumberRanges;\r
+  UINT8                              NextNumber;\r
+  UINT64                             MaxNumberInRange;\r
+\r
+  //\r
+  // Get PCI Root Bridge device\r
+  //\r
+  RootBridge = Bridge;\r
+  while (RootBridge->Parent != NULL) {\r
+    RootBridge = RootBridge->Parent;\r
+  }\r
+\r
+  //\r
+  // Get next available PCI bus number\r
+  //\r
+  BusNumberRanges = RootBridge->BusNumberRanges;\r
+  while (BusNumberRanges->Desc != ACPI_END_TAG_DESCRIPTOR) {\r
+    MaxNumberInRange = BusNumberRanges->AddrRangeMin + BusNumberRanges->AddrLen - 1;\r
+    if (StartBusNumber >= BusNumberRanges->AddrRangeMin && StartBusNumber <=  MaxNumberInRange) {\r
+      NextNumber = StartBusNumber + NumberOfBuses;\r
+      while (NextNumber > MaxNumberInRange) {\r
+        ++BusNumberRanges;\r
+        if (BusNumberRanges->Desc == ACPI_END_TAG_DESCRIPTOR) {\r
+          return EFI_OUT_OF_RESOURCES;\r
+        }\r
+        NextNumber += (UINT8)(BusNumberRanges->AddrRangeMin - (MaxNumberInRange + 1));\r
+        MaxNumberInRange = BusNumberRanges->AddrRangeMin + BusNumberRanges->AddrLen - 1;\r
+      }\r
+      *NextBusNumber = NextNumber;\r
+      return EFI_SUCCESS;\r
+    }\r
+    BusNumberRanges++;\r
+  }\r
+  return EFI_OUT_OF_RESOURCES;\r
+}\r
+\r
 /**\r
   Scan pci bus and assign bus number to the given PCI bus system.\r
 \r
@@ -1100,15 +1158,10 @@ PciScanBus (
           }\r
         }\r
 \r
-        //\r
-        // Add feature to support customized secondary bus number\r
-        //\r
-        if (*SubBusNumber == 0) {\r
-          *SubBusNumber   = *PaddedBusRange;\r
-          *PaddedBusRange = 0;\r
+        Status = PciAllocateBusNumber (Bridge, *SubBusNumber, 1, SubBusNumber);\r
+        if (EFI_ERROR (Status)) {\r
+          return Status;\r
         }\r
-\r
-        (*SubBusNumber)++;\r
         SecondBus = *SubBusNumber;\r
 \r
         Register  = (UINT16) ((SecondBus << 8) | (UINT16) StartBusNumber);\r
@@ -1173,7 +1226,10 @@ PciScanBus (
               (State & EFI_HPC_STATE_INITIALIZED) != 0) {\r
             *PaddedBusRange = (UINT8) ((UINT8) (BusRange) +*PaddedBusRange);\r
           } else {\r
-            *SubBusNumber = (UINT8) ((UINT8) (BusRange) +*SubBusNumber);\r
+            Status = PciAllocateBusNumber (PciDevice, *SubBusNumber, (UINT8) (BusRange), SubBusNumber);\r
+            if (EFI_ERROR (Status)) {\r
+              return Status;\r
+            }\r
           }\r
         }\r
 \r
@@ -1197,7 +1253,10 @@ PciScanBus (
         if (PcdGetBool (PcdSrIovSupport) && PciDevice->SrIovCapabilityOffset != 0) {\r
           if (TempReservedBusNum < PciDevice->ReservedBusNum) {\r
 \r
-            (*SubBusNumber) = (UINT8)((*SubBusNumber) + PciDevice->ReservedBusNum - TempReservedBusNum);\r
+            Status = PciAllocateBusNumber (PciDevice, *SubBusNumber, (UINT8) (PciDevice->ReservedBusNum - TempReservedBusNum), SubBusNumber);\r
+            if (EFI_ERROR (Status)) {\r
+              return Status;\r
+            }\r
             TempReservedBusNum = PciDevice->ReservedBusNum;\r
 \r
             if (Func == 0) {\r

diff --git a/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.h b/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.h
index 87a846376f30be1a7f478b8843f811a6b2fcde27..6c2ade3f36719aa89fcdd281f0c86f78dd76eb87 100644 (file)
--- a/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.h
+++ b/MdeModulePkg/Bus/Pci/PciBusDxe/PciLib.h
@@ -1,7 +1,7 @@
 /** @file\r
   Internal library declaration for PCI Bus module.\r
 \r
-Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>\r
 This program and the accompanying materials\r
 are licensed and made available under the terms and conditions of the BSD License\r
 which accompanies this distribution.  The full text of the license may be found at\r
@@ -74,6 +74,27 @@ PciHostBridgeResourceAllocator (
   IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc\r
   );\r
 \r
+/**\r
+  Allocate NumberOfBuses buses and return the next available PCI bus number.\r
+\r
+  @param  Bridge           Bridge device instance.\r
+  @param  StartBusNumber   Current available PCI bus number.\r
+  @param  NumberOfBuses    Number of buses enumerated below the StartBusNumber.\r
+  @param  NextBusNumber    Next available PCI bus number.\r
+\r
+  @retval EFI_SUCCESS           Available bus number resource is enough. Next available PCI bus number\r
+                                is returned in NextBusNumber.\r
+  @retval EFI_OUT_OF_RESOURCES  Available bus number resource is not enough for allocation.\r
+\r
+**/\r
+EFI_STATUS\r
+PciAllocateBusNumber (\r
+  IN PCI_IO_DEVICE                      *Bridge,\r
+  IN UINT8                              StartBusNumber,\r
+  IN UINT8                              NumberOfBuses,\r
+  OUT UINT8                             *NextBusNumber\r
+  );\r
+\r
 /**\r
   Scan pci bus and assign bus number to the given PCI bus system.\r
 \r