]> git.proxmox.com Git - mirror_edk2.git/commitdiff
MdePkg/Library/BaseLib: Enable VS2017/ARM builds
authorPete Batard <pete@akeo.ie>
Fri, 12 Jan 2018 13:33:28 +0000 (21:33 +0800)
committerLiming Gao <liming.gao@intel.com>
Wed, 7 Feb 2018 01:49:21 +0000 (09:49 +0800)
Most of the RVCT assembly can be reused as is for MSFT except
for CpuBreakpoint.asm, which we need to force to Arm mode.

Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Pete Batard <pete@akeo.ie>
Reviewed-by: Liming Gao <liming.gao@intel.com>
MdePkg/Library/BaseLib/Arm/CpuBreakpoint.asm
MdePkg/Library/BaseLib/BaseLib.inf

index 8a8065159bf27a1fc8a44d9bdeafe077a9500bed..e7490b09d3dc657e378920053cb17959e0d3d590 100644 (file)
 \r
     EXPORT CpuBreakpoint\r
 \r
-  AREA Cpu_Breakpoint, CODE, READONLY\r
+; Force ARM mode for this section, as MSFT assembler defaults to THUMB\r
+  AREA Cpu_Breakpoint, CODE, READONLY, ARM\r
+\r
+  ARM\r
 \r
 ;/**\r
 ;  Generates a breakpoint on the CPU.\r
index fbfb0063b75f6b7fc37b20fe256437778fc5c3d5..3c07e6bad977b7a1530051247a26d6b05274977e 100644 (file)
 [Sources.ARM]\r
   Arm/InternalSwitchStack.c\r
   Arm/Unaligned.c\r
-  Math64.c                   | RVCT \r
-    \r
+  Math64.c                   | RVCT\r
+  Math64.c                   | MSFT\r
+\r
   Arm/SwitchStack.asm        | RVCT\r
   Arm/SetJumpLongJump.asm    | RVCT\r
   Arm/DisableInterrupts.asm  | RVCT\r
   Arm/CpuPause.asm           | RVCT\r
   Arm/CpuBreakpoint.asm      | RVCT\r
   Arm/MemoryFence.asm        | RVCT\r
\r
+\r
+  Arm/SwitchStack.asm        | MSFT\r
+  Arm/SetJumpLongJump.asm    | MSFT\r
+  Arm/DisableInterrupts.asm  | MSFT\r
+  Arm/EnableInterrupts.asm   | MSFT\r
+  Arm/GetInterruptsState.asm | MSFT\r
+  Arm/CpuPause.asm           | MSFT\r
+  Arm/CpuBreakpoint.asm      | MSFT\r
+  Arm/MemoryFence.asm        | MSFT\r
+\r
   Arm/Math64.S                  | GCC\r
   Arm/SwitchStack.S             | GCC\r
   Arm/EnableInterrupts.S        | GCC\r