\r
EXPORT CpuBreakpoint\r
\r
- AREA Cpu_Breakpoint, CODE, READONLY\r
+; Force ARM mode for this section, as MSFT assembler defaults to THUMB\r
+ AREA Cpu_Breakpoint, CODE, READONLY, ARM\r
+\r
+ ARM\r
\r
;/**\r
; Generates a breakpoint on the CPU.\r
[Sources.ARM]\r
Arm/InternalSwitchStack.c\r
Arm/Unaligned.c\r
- Math64.c | RVCT \r
- \r
+ Math64.c | RVCT\r
+ Math64.c | MSFT\r
+\r
Arm/SwitchStack.asm | RVCT\r
Arm/SetJumpLongJump.asm | RVCT\r
Arm/DisableInterrupts.asm | RVCT\r
Arm/CpuPause.asm | RVCT\r
Arm/CpuBreakpoint.asm | RVCT\r
Arm/MemoryFence.asm | RVCT\r
- \r
+\r
+ Arm/SwitchStack.asm | MSFT\r
+ Arm/SetJumpLongJump.asm | MSFT\r
+ Arm/DisableInterrupts.asm | MSFT\r
+ Arm/EnableInterrupts.asm | MSFT\r
+ Arm/GetInterruptsState.asm | MSFT\r
+ Arm/CpuPause.asm | MSFT\r
+ Arm/CpuBreakpoint.asm | MSFT\r
+ Arm/MemoryFence.asm | MSFT\r
+\r
Arm/Math64.S | GCC\r
Arm/SwitchStack.S | GCC\r
Arm/EnableInterrupts.S | GCC\r