Clean up hard-coded offsets and other utter bogosity in Thunk16.S

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15028 6f19259b-4bc3-4df7-8a09-765794883524

diff --git a/MdePkg/Library/BaseLib/Ia32/Thunk16.S b/MdePkg/Library/BaseLib/Ia32/Thunk16.S
index 8356c5a1c7d3bad02b3910555fbf5472eca58d7e..331ea1634e9fd7c14a7197815e612fc60738ed3b 100644 (file)
--- a/MdePkg/Library/BaseLib/Ia32/Thunk16.S
+++ b/MdePkg/Library/BaseLib/Ia32/Thunk16.S
@@ -24,6 +24,28 @@
 ASM_GLOBAL ASM_PFX(m16Start), ASM_PFX(m16Size), ASM_PFX(mThunk16Attr), ASM_PFX(m16Gdt), ASM_PFX(m16GdtrBase), ASM_PFX(mTransition)\r
 ASM_GLOBAL ASM_PFX(InternalAsmThunk16)\r
 \r
+# define the structure of IA32_REGS\r
+.set  _EDI, 0       #size 4\r
+.set  _ESI, 4       #size 4\r
+.set  _EBP, 8       #size 4\r
+.set  _ESP, 12      #size 4\r
+.set  _EBX, 16      #size 4\r
+.set  _EDX, 20      #size 4\r
+.set  _ECX, 24      #size 4\r
+.set  _EAX, 28      #size 4\r
+.set  _DS,  32      #size 2\r
+.set  _ES,  34      #size 2\r
+.set  _FS,  36      #size 2\r
+.set  _GS,  38      #size 2\r
+.set  _EFLAGS, 40   #size 4\r
+.set  _EIP, 44      #size 4\r
+.set  _CS, 48       #size 2\r
+.set  _SS, 50       #size 2\r
+.set  IA32_REGS_SIZE, 52\r
+\r
+    .text\r
+    .code16\r
+\r
 ASM_PFX(m16Start):\r
 \r
 SavedGdt:     .space  6\r
@@ -31,21 +53,22 @@ SavedGdt:     .space  6
 ASM_PFX(BackFromUserCode):\r
     push    %ss\r
     push    %cs\r
-    .byte   0x66\r
-    call    L_Base1                     # push eip\r
+\r
+    calll   L_Base1                     # push eip\r
 L_Base1:\r
-    pushfw                              # pushfd actually\r
+    pushfl\r
     cli                                 # disable interrupts\r
     push    %gs\r
     push    %fs\r
     push    %es\r
     push    %ds\r
-    pushaw                              # pushad actually\r
+    pushal\r
     .byte   0x66, 0xba                  # mov edx, imm32\r
 ASM_PFX(ThunkAttr): .space  4\r
     testb   $THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15, %dl\r
     jz      1f\r
-    movl    $0x15cd2401, %eax           # mov ax, 2401h & int 15h\r
+    movw    $0x2401, %ax\r
+    int     $0x15\r
     cli                                 # disable interrupts\r
     jnc     2f\r
 1:\r
@@ -55,27 +78,26 @@ ASM_PFX(ThunkAttr): .space  4
     orb     $2, %al\r
     outb    %al, $0x92                  # deactivate A20M#\r
 2:\r
-    xorw    %ax, %ax                    # xor eax, eax\r
-    movl    %ss, %eax                   # mov ax, ss\r
-    .byte   0x67, 0x66, 0x8d, 0x6c, 0x24, 0x34, 0x66\r
-    mov     %ebp, 0xffffffd8(%esi)\r
-    mov     0xfffffff8(%esi), %ebx\r
-    shlw    $4, %ax                     # shl eax, 4\r
-    addw    %ax, %bp                    # add ebp, eax\r
-    .byte   0x66, 0xb8                   # mov eax, imm32\r
+    xorl    %eax, %eax\r
+    movw    %ss, %ax\r
+    leal    IA32_REGS_SIZE(%esp), %ebp\r
+    mov     %ebp, (_ESP - IA32_REGS_SIZE)(%bp)\r
+    mov     (_EIP - IA32_REGS_SIZE)(%bp), %bx\r
+    shll    $4, %eax\r
+    addl    %eax, %ebp\r
+    .byte   0x66, 0xb8                  # mov eax, imm32\r
 SavedCr4:   .space  4\r
     movl    %eax, %cr4\r
-    lgdtw   %cs:0xfffffff2(%edi)\r
-    .byte   0x66, 0xb8                   # mov eax, imm32\r
+    lgdtl   %cs:(SavedGdt - L_Base1)(%bx)\r
+    .byte   0x66, 0xb8                  # mov eax, imm32\r
 SavedCr0:   .space  4\r
     movl    %eax, %cr0\r
     .byte   0xb8                        # mov ax, imm16\r
 SavedSs:    .space  2\r
     movl    %eax, %ss\r
-    .byte   0x66, 0xbc                   # mov esp, imm32\r
+    .byte   0x66, 0xbc                  # mov esp, imm32\r
 SavedEsp:   .space  4\r
-    .byte   0x66\r
-    lret                                # return to protected mode\r
+    lretl                               # return to protected mode\r
 \r
 _EntryPoint:    .long      ASM_PFX(ToUserCode) - ASM_PFX(m16Start)\r
                 .word      0x8\r
@@ -85,37 +107,35 @@ _16Gdtr:        .word      GdtEnd - _NullSegDesc - 1
 _16GdtrBase:    .long      _NullSegDesc\r
 \r
 ASM_PFX(ToUserCode):\r
-    movl    %ss, %edx\r
-    movl    %ecx, %ss                   # set new segment selectors\r
-    movl    %ecx, %ds\r
-    movl    %ecx, %es\r
-    movl    %ecx, %fs\r
-    movl    %ecx, %gs\r
+    movw    %ss, %dx\r
+    movw    %cx, %ss                    # set new segment selectors\r
+    movw    %cx, %ds\r
+    movw    %cx, %es\r
+    movw    %cx, %fs\r
+    movw    %cx, %gs\r
     movl    %eax, %cr0\r
     movl    %ebp, %cr4                  # real mode starts at next instruction\r
-    movl    %esi, %ss                   # set up 16-bit stack segment\r
-    xchgw   %bx, %sp                    # set up 16-bit stack pointer\r
-    .byte   0x66\r
-    call    L_Base                      # push eip\r
+    movw    %si, %ss                    # set up 16-bit stack segment\r
+    xchgl   %ebx, %esp                  # set up 16-bit stack pointer\r
+    calll   L_Base                      # push eip\r
 L_Base:\r
-    popw    %bp                         # ebp <- offset L_Base\r
-    .byte   0x67;                       # address size override\r
-    push    54(%esp)\r
-    lea     0xc(%esi), %eax\r
-    push    %eax\r
+    popl    %ebp                        # ebp <- offset L_Base\r
+    push    (IA32_REGS_SIZE + 2)(%esp)\r
+    lea (L_RealMode - L_Base)(%bp), %ax\r
+    push    %ax\r
     lret\r
 \r
 L_RealMode:\r
-    mov     %edx, %cs:0xffffffc5(%esi)\r
-    mov     %bx, %cs:0xffffffcb(%esi)\r
-    lidtw   %cs:0xffffffd7(%esi)\r
-    popaw                               # popad actually\r
+    mov     %dx, %cs:(SavedSs - L_Base)(%bp)\r
+    mov     %ebx, %cs:(SavedEsp - L_Base)(%bp)\r
+    lidtl   %cs:(_16Idtr - L_Base)(%bp)\r
+    popal\r
     pop     %ds\r
     pop     %es\r
     pop     %fs\r
     pop     %gs\r
-    popfw                               # popfd\r
-    lretw                               # transfer control to user code\r
+    popfl\r
+    lretl                               # transfer control to user code\r
 \r
 _NullSegDesc:   .quad   0\r
 _16CsDesc:\r
@@ -134,6 +154,7 @@ _16DsDesc:
                 .byte   0\r
 GdtEnd:\r
 \r
+    .code32\r
 #\r
 #   @param  RegSet  The pointer to a IA32_DWORD_REGS structure\r
 #   @param  Transition  The pointer to the transition code\r
@@ -149,41 +170,41 @@ ASM_PFX(InternalAsmThunk16):
     push    %fs\r
     push    %gs\r
     movl    36(%esp), %esi              # esi <- RegSet\r
-    movzwl  0x32(%esi), %edx\r
-    mov     0xc(%esi), %edi\r
-    add     $0xffffffc8, %edi\r
+    movzwl  _SS(%esi), %edx\r
+    mov     _ESP(%esi), %edi\r
+    add     $(-(IA32_REGS_SIZE + 4)), %edi\r
     movl    %edi, %ebx                  # ebx <- stack offset\r
     imul    $0x10, %edx, %eax\r
-    push    $0xd\r
+    push    $(IA32_REGS_SIZE / 4)\r
     addl    %eax, %edi                  # edi <- linear address of 16-bit stack\r
     pop     %ecx\r
     rep\r
     movsl                               # copy RegSet\r
     movl    40(%esp), %eax              # eax <- address of transition code\r
     movl    %edx, %esi                  # esi <- 16-bit stack segment\r
-    lea     0x61(%eax), %edx\r
+    lea     (SavedCr0 - ASM_PFX(m16Start))(%eax), %edx\r
     movl    %eax, %ecx\r
     andl    $0xf, %ecx\r
     shll    $12, %eax\r
-    lea     0x6(%ecx), %ecx\r
+    lea     (ASM_PFX(BackFromUserCode) - ASM_PFX(m16Start))(%ecx), %ecx\r
     movw    %cx, %ax\r
     stosl                               # [edi] <- return address of user code\r
-    sgdtl   0xffffff9f(%edx)\r
+    sgdtl   (SavedGdt - SavedCr0)(%edx)\r
     sidtl   0x24(%esp)\r
     movl    %cr0, %eax\r
     movl    %eax, (%edx)                # save CR0 in SavedCr0\r
     andl    $0x7ffffffe, %eax           # clear PE, PG bits\r
     movl    %cr4, %ebp\r
-    mov     %ebp, 0xfffffff1(%edx)\r
+    mov     %ebp, (SavedCr4 - SavedCr0)(%edx)\r
     andl    $0xffffffcf, %ebp           # clear PAE, PSE bits\r
     pushl   $0x10\r
     pop     %ecx                        # ecx <- selector for data segments\r
-    lgdtl   0x20(%edx)\r
+    lgdtl   (_16Gdtr - SavedCr0)(%edx)\r
     pushfl\r
-    lcall   *0x14(%edx)\r
+    lcall   *(_EntryPoint - SavedCr0)(%edx)\r
     popfl\r
     lidtl   0x24(%esp)\r
-    lea     0xffffffcc(%ebp), %eax\r
+    lea     -IA32_REGS_SIZE(%ebp), %eax\r
     pop     %gs\r
     pop     %fs\r
     pop     %es\r