]> git.proxmox.com Git - mirror_edk2.git/commitdiff
OvmfPkg/PciHostBridgeLibScan: remove QEMU (fw_cfg) support
authorLaszlo Ersek <lersek@redhat.com>
Wed, 26 May 2021 20:14:36 +0000 (22:14 +0200)
committermergify[bot] <37929162+mergify[bot]@users.noreply.github.com>
Fri, 4 Jun 2021 16:01:50 +0000 (16:01 +0000)
The "OvmfPkg/Library/PciHostBridgeLibScan/PciHostBridgeLibScan.inf"
instance is used in the following platforms in edk2:

  OvmfPkg/Bhyve/BhyveX64.dsc
  OvmfPkg/OvmfXen.dsc

Both platforms define "PcdPciDisableBusEnumeration" with Fixed-at-Build
access method, and TRUE value. Remove the PCD from the
PciHostBridgeLibScan instance, and everything else that is useful only
when the PCD is FALSE.

In practice, this removes the PciHostBridgeUtilityGetRootBridges()
function call, which is based on fw-cfg; see
"OvmfPkg/Library/PciHostBridgeUtilityLib/PciHostBridgeUtilityLib.c".

(Note that the dependency on PciHostBridgeUtilityLib remains in place,
given that the PciHostBridgeLibScan instance continues using lower-level
functions from the library that do not depend on fw-cfg.)

Cc: Anthony Perard <anthony.perard@citrix.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Julien Grall <julien@xen.org>
Cc: Peter Grehan <grehan@freebsd.org>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Cc: Rebecca Cran <rebecca@bsdio.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=2122
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20210526201446.12554-34-lersek@redhat.com>
Reviewed-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
OvmfPkg/Library/PciHostBridgeLibScan/PciHostBridgeLib.c
OvmfPkg/Library/PciHostBridgeLibScan/PciHostBridgeLibScan.inf

index 6c2acc9f99bce75d04e9926dad38d6b6bcce6fd0..f0166e0f72794a2cb69c7914f770c5195b767d7a 100644 (file)
@@ -7,20 +7,11 @@
   SPDX-License-Identifier: BSD-2-Clause-Patent\r
 \r
 **/\r
-#include <IndustryStandard/Pci.h>                     // PCI_MAX_BUS\r
-#include <IndustryStandard/Q35MchIch9.h>              // INTEL_Q35_MCH_DEVIC...\r
-#include <Library/BaseMemoryLib.h>                    // ZeroMem()\r
-#include <Library/PcdLib.h>                           // PcdGet64()\r
-#include <Library/PciHostBridgeLib.h>                 // PCI_ROOT_BRIDGE_APE...\r
+#include <Library/PciHostBridgeLib.h>                 // PCI_ROOT_BRIDGE\r
 #include <Library/PciHostBridgeUtilityLib.h>          // PciHostBridgeUtilit...\r
-#include <Protocol/PciHostBridgeResourceAllocation.h> // EFI_PCI_HOST_BRIDGE...\r
-#include <Protocol/PciRootBridgeIo.h>                 // EFI_PCI_ATTRIBUTE_I...\r
 \r
 #include "PciHostBridge.h"\r
 \r
-STATIC PCI_ROOT_BRIDGE_APERTURE mNonExistAperture = { MAX_UINT64, 0 };\r
-\r
-\r
 /**\r
   Return all the root bridge instances in an array.\r
 \r
@@ -36,57 +27,7 @@ PciHostBridgeGetRootBridges (
   UINTN *Count\r
   )\r
 {\r
-  UINT64               Attributes;\r
-  UINT64               AllocationAttributes;\r
-  PCI_ROOT_BRIDGE_APERTURE Io;\r
-  PCI_ROOT_BRIDGE_APERTURE Mem;\r
-  PCI_ROOT_BRIDGE_APERTURE MemAbove4G;\r
-\r
-  if (PcdGetBool (PcdPciDisableBusEnumeration)) {\r
-    return ScanForRootBridges (Count);\r
-  }\r
-\r
-  ZeroMem (&Io, sizeof (Io));\r
-  ZeroMem (&Mem, sizeof (Mem));\r
-  ZeroMem (&MemAbove4G, sizeof (MemAbove4G));\r
-\r
-  Attributes = EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO |\r
-    EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO |\r
-    EFI_PCI_ATTRIBUTE_ISA_IO_16 |\r
-    EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO |\r
-    EFI_PCI_ATTRIBUTE_VGA_MEMORY |\r
-    EFI_PCI_ATTRIBUTE_VGA_IO_16 |\r
-    EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO_16;\r
-\r
-  AllocationAttributes = EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM;\r
-  if (PcdGet64 (PcdPciMmio64Size) > 0) {\r
-    AllocationAttributes |= EFI_PCI_HOST_BRIDGE_MEM64_DECODE;\r
-    MemAbove4G.Base = PcdGet64 (PcdPciMmio64Base);\r
-    MemAbove4G.Limit = PcdGet64 (PcdPciMmio64Base) +\r
-                       PcdGet64 (PcdPciMmio64Size) - 1;\r
-  } else {\r
-    CopyMem (&MemAbove4G, &mNonExistAperture, sizeof (mNonExistAperture));\r
-  }\r
-\r
-  Io.Base = PcdGet64 (PcdPciIoBase);\r
-  Io.Limit = PcdGet64 (PcdPciIoBase) + (PcdGet64 (PcdPciIoSize) - 1);\r
-  Mem.Base = PcdGet64 (PcdPciMmio32Base);\r
-  Mem.Limit = PcdGet64 (PcdPciMmio32Base) + (PcdGet64 (PcdPciMmio32Size) - 1);\r
-\r
-  return PciHostBridgeUtilityGetRootBridges (\r
-    Count,\r
-    Attributes,\r
-    AllocationAttributes,\r
-    FALSE,\r
-    PcdGet16 (PcdOvmfHostBridgePciDevId) != INTEL_Q35_MCH_DEVICE_ID,\r
-    0,\r
-    PCI_MAX_BUS,\r
-    &Io,\r
-    &Mem,\r
-    &MemAbove4G,\r
-    &mNonExistAperture,\r
-    &mNonExistAperture\r
-    );\r
+  return ScanForRootBridges (Count);\r
 }\r
 \r
 \r
index 46859388870fb4acb4dc942121825ed414bf9996..1ba880be67820e5650d03665c9c5dd640f127f81 100644 (file)
   PciLib\r
 \r
 [Pcd]\r
-  gEfiMdeModulePkgTokenSpaceGuid.PcdPciDisableBusEnumeration\r
   gUefiOvmfPkgTokenSpaceGuid.PcdOvmfHostBridgePciDevId\r
-  gUefiOvmfPkgTokenSpaceGuid.PcdPciIoBase\r
-  gUefiOvmfPkgTokenSpaceGuid.PcdPciIoSize\r
-  gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Base\r
-  gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Size\r
-  gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Base\r
-  gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Size\r