]> git.proxmox.com Git - mirror_edk2.git/commitdiff
Update SMBIOS.h to SMBIOS 2.6.1 version.
authorli-elvin <li-elvin@6f19259b-4bc3-4df7-8a09-765794883524>
Mon, 1 Feb 2010 02:52:45 +0000 (02:52 +0000)
committerli-elvin <li-elvin@6f19259b-4bc3-4df7-8a09-765794883524>
Mon, 1 Feb 2010 02:52:45 +0000 (02:52 +0000)
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@9892 6f19259b-4bc3-4df7-8a09-765794883524

MdePkg/Include/IndustryStandard/SmBios.h

index 79ed6962bc6fe72b4bfa296c04b19ef4cc40617e..3799492368cfaf0a9a16bbd616c3d83445d768af 100644 (file)
@@ -1,7 +1,7 @@
 /** @file\r
-  Industry Standard Definitions of SMBIOS Table Specification v2.6\r
+  Industry Standard Definitions of SMBIOS Table Specification v2.6.1\r
 \r
-  Copyright (c) 2006 - 2009, Intel Corporation All rights\r
+  Copyright (c) 2006 - 2010, Intel Corporation All rights\r
   reserved. This program and the accompanying materials are\r
   licensed and made available under the terms and conditions of the BSD License\r
   which accompanies this distribution.  The full text of the license may be found at        \r
@@ -409,6 +409,10 @@ typedef enum {
   ProcessorFamilyPowerPC620             = 0x25,\r
   ProcessorFamilyPowerPCx704            = 0x26,\r
   ProcessorFamilyPowerPC750             = 0x27,\r
+  ProcessorFamilyIntelCoreDuo           = 0x28,\r
+  ProcessorFamilyIntelCoreDuoMobile     = 0x29,\r
+  ProcessorFamilyIntelCoreSoloMobile    = 0x2A,\r
+  ProcessorFamilyIntelAtom              = 0x2B,\r
   ProcessorFamilyAlpha3                 = 0x30,\r
   ProcessorFamilyAlpha21064             = 0x31,\r
   ProcessorFamilyAlpha21066             = 0x32,\r
@@ -451,6 +455,12 @@ typedef enum {
   ProcessorFamilyDualCoreAmdOpteron     = 0x87,\r
   ProcessorFamilyAmdAthlon64X2DualCore  = 0x88,\r
   ProcessorFamilyAmdTurion64X2Mobile    = 0x89,\r
+  ProcessorFamilyQuadCoreAmdOpteron     = 0x8A,\r
+  ProcessorFamilyThirdGenerationAmdOpteron = 0x8B,\r
+  ProcessorFamilyAmdPhenomFxQuadCore    = 0x8C,\r
+  ProcessorFamilyAmdPhenomX4QuadCore    = 0x8D,\r
+  ProcessorFamilyAmdPhenomX2DualCore    = 0x8E,\r
+  ProcessorFamilyAmdAthlonX2DualCore    = 0x8F,  \r
   ProcessorFamilyPARISC                 = 0x90,\r
   ProcessorFamilyPaRisc8500             = 0x91,\r
   ProcessorFamilyPaRisc8000             = 0x92,\r
@@ -459,6 +469,21 @@ typedef enum {
   ProcessorFamilyPaRisc7100LC           = 0x95,\r
   ProcessorFamilyPaRisc7100             = 0x96,\r
   ProcessorFamilyV30                    = 0xA0,\r
+  ProcessorFamilyQuadCoreIntelXeon3200Series  = 0xA1,\r
+  ProcessorFamilyDualCoreIntelXeon3000Series  = 0xA2,\r
+  ProcessorFamilyQuadCoreIntelXeon5300Series  = 0xA3,\r
+  ProcessorFamilyDualCoreIntelXeon5100Series  = 0xA4,\r
+  ProcessorFamilyDualCoreIntelXeon5000Series  = 0xA5,\r
+  ProcessorFamilyDualCoreIntelXeonLV          = 0xA6,\r
+  ProcessorFamilyDualCoreIntelXeonULV         = 0xA7,\r
+  ProcessorFamilyDualCoreIntelXeon7100Series  = 0xA8,\r
+  ProcessorFamilyQuadCoreIntelXeon5400Series  = 0xA9,\r
+  ProcessorFamilyQuadCoreIntelXeon            = 0xAA,\r
+  ProcessorFamilyDualCoreIntelXeon5200Series  = 0xAB,\r
+  ProcessorFamilyDualCoreIntelXeon7200Series  = 0xAC,\r
+  ProcessorFamilyQuadCoreIntelXeon7300Series  = 0xAD,\r
+  ProcessorFamilyQuadCoreIntelXeon7400Series  = 0xAE,\r
+  ProcessorFamilyMultiCoreIntelXeon7400Series = 0xAF,\r
   ProcessorFamilyPentiumIIIXeon         = 0xB0,\r
   ProcessorFamilyPentiumIIISpeedStep    = 0xB1,\r
   ProcessorFamilyPentium4               = 0xB2,\r
@@ -475,6 +500,14 @@ typedef enum {
   ProcessorFamilyIntelCoreSolo          = 0xBD,  ///< SMBIOS spec 2.6 correct this value\r
   ProcessorFamilyReserved               = 0xBE,\r
   ProcessorFamilyIntelCore2             = 0xBF,\r
+  ProcessorFamilyIntelCore2Solo         = 0xC0,\r
+  ProcessorFamilyIntelCore2Extreme      = 0xC1,\r
+  ProcessorFamilyIntelCore2Quad         = 0xC2,\r
+  ProcessorFamilyIntelCore2ExtremeMobile = 0xC3,\r
+  ProcessorFamilyIntelCore2DuoMobile    = 0xC4,\r
+  ProcessorFamilyIntelCore2SoloMobile   = 0xC5,\r
+  ProcessorFamilyIntelCoreI7            = 0xC6,\r
+  ProcessorFamilyDualCoreIntelCeleron   = 0xC7,  \r
   ProcessorFamilyIBM390                 = 0xC8,\r
   ProcessorFamilyG4                     = 0xC9,\r
   ProcessorFamilyG5                     = 0xCA,\r
@@ -484,6 +517,20 @@ typedef enum {
   ProcessorFamilyViaC7D                 = 0xD3,\r
   ProcessorFamilyViaC7                  = 0xD4,\r
   ProcessorFamilyViaEden                = 0xD5,\r
+  ProcessorFamilyMultiCoreIntelXeon           = 0xD6,\r
+  ProcessorFamilyDualCoreIntelXeon3Series     = 0xD7,\r
+  ProcessorFamilyQuadCoreIntelXeon3Series     = 0xD8,\r
+  ProcessorFamilyDualCoreIntelXeon5Series     = 0xDA,\r
+  ProcessorFamilyQuadCoreIntelXeon5Series     = 0xDB,\r
+  ProcessorFamilyDualCoreIntelXeon7Series     = 0xDD,\r
+  ProcessorFamilyQuadCoreIntelXeon7Series     = 0xDE,\r
+  ProcessorFamilyMultiCoreIntelXeon7Series    = 0xDF,\r
+  ProcessorFamilyEmbeddedAmdOpteronQuadCore   = 0xE6,\r
+  ProcessorFamilyAmdPhenomTripleCore          = 0xE7,\r
+  ProcessorFamilyAmdTurionUltraDualCoreMobile = 0xE8,\r
+  ProcessorFamilyAmdTurionDualCoreMobile      = 0xE9,\r
+  ProcessorFamilyAmdAthlonDualCore            = 0xEA,\r
+  ProcessorFamilyAmdSempronSI                 = 0xEB,\r
   ProcessorFamilyi860                   = 0xFA,\r
   ProcessorFamilyi960                   = 0xFB,\r
   ProcessorFamilyIndicatorFamily2       = 0xFE,\r
@@ -529,7 +576,8 @@ typedef enum {
   ProcessorUpgradeSocketLGA775  = 0x15,\r
   ProcessorUpgradeSocketS1      = 0x16,\r
   ProcessorUpgradeAM2           = 0x17,\r
-  ProcessorUpgradeF1207         = 0x18\r
+  ProcessorUpgradeF1207         = 0x18,\r
+  ProcessorSocketLGA1366        = 0x19\r
 } PROCESSOR_UPGRADE;\r
 \r
 ///\r
@@ -802,7 +850,11 @@ typedef enum {
   CacheAssociativityFully        = 0x06,\r
   CacheAssociativity8Way         = 0x07,\r
   CacheAssociativity16Way        = 0x08,\r
-  CacheAssociativity24Way        = 0x09\r
+  CacheAssociativity12Way        = 0x09,\r
+  CacheAssociativity24Way        = 0x0A,\r
+  CacheAssociativity32Way        = 0x0B,\r
+  CacheAssociativity48Way        = 0x0C,\r
+  CacheAssociativity64Way        = 0x0D\r
 } CACHE_ASSOCIATIVITY_DATA;\r
 \r
 ///\r
@@ -963,7 +1015,13 @@ typedef enum {
   SlotTypePciExpressX2                 = 0xA7,\r
   SlotTypePciExpressX4                 = 0xA8,\r
   SlotTypePciExpressX8                 = 0xA9,\r
-  SlotTypePciExpressX16                = 0xAA\r
+  SlotTypePciExpressX16                = 0xAA,\r
+  SlotTypePciExpressGen2               = 0xAB,\r
+  SlotTypePciExpressGen2X1             = 0xAC,\r
+  SlotTypePciExpressGen2X2             = 0xAD,\r
+  SlotTypePciExpressGen2X4             = 0xAE,\r
+  SlotTypePciExpressGen2X8             = 0xAF,\r
+  SlotTypePciExpressGen2X16            = 0xB0\r
 } MISC_SLOT_TYPE;\r
 \r
 ///\r
@@ -1330,7 +1388,9 @@ typedef enum {
   MemoryTypeRdram                          = 0x11,\r
   MemoryTypeDdr                            = 0x12,\r
   MemoryTypeDdr2                           = 0x13,\r
-  MemoryTypeDdr2FbDimm                     = 0x14\r
+  MemoryTypeDdr2FbDimm                     = 0x14,\r
+  MemoryTypeDdr3                           = 0x18,\r
+  MemoryTypeFbd2                           = 0x19\r
 } MEMORY_DEVICE_TYPE;\r
 \r
 typedef struct {\r