\r
return ;\r
}\r
+\r
+/**\r
+ This function returns with no action for 32 bit.\r
+\r
+ @param[out] *Cr2 Pointer to variable to hold CR2 register value.\r
+**/\r
+VOID\r
+SaveCr2 (\r
+ OUT UINTN *Cr2\r
+ )\r
+{\r
+ return ;\r
+}\r
+\r
+/**\r
+ This function returns with no action for 32 bit.\r
+\r
+ @param[in] Cr2 Value to write into CR2 register.\r
+**/\r
+VOID\r
+RestoreCr2 (\r
+ IN UINTN Cr2\r
+ )\r
+{\r
+ return ;\r
+}\r
ASSERT(CpuIndex < mMaxNumberOfCpus);\r
\r
//\r
- // Save Cr2 because Page Fault exception in SMM may override its value\r
+ // Save Cr2 because Page Fault exception in SMM may override its value,\r
+ // when using on-demand paging for above 4G memory.\r
//\r
- Cr2 = AsmReadCr2 ();\r
+ Cr2 = 0;\r
+ SaveCr2 (&Cr2);\r
\r
//\r
// Perform CPU specific entry hooks\r
\r
Exit:\r
SmmCpuFeaturesRendezvousExit (CpuIndex);\r
+\r
//\r
// Restore Cr2\r
//\r
- AsmWriteCr2 (Cr2);\r
+ RestoreCr2 (Cr2);\r
}\r
\r
/**\r
PiSmmCpuSmiEntryFixupAddress (\r
);\r
\r
+/**\r
+ This function reads CR2 register when on-demand paging is enabled\r
+ for 64 bit and no action for 32 bit.\r
+\r
+ @param[out] *Cr2 Pointer to variable to hold CR2 register value.\r
+**/\r
+VOID\r
+SaveCr2 (\r
+ OUT UINTN *Cr2\r
+ );\r
+\r
+/**\r
+ This function writes into CR2 register when on-demand paging is enabled\r
+ for 64 bit and no action for 32 bit.\r
+\r
+ @param[in] Cr2 Value to write into CR2 register.\r
+**/\r
+VOID\r
+RestoreCr2 (\r
+ IN UINTN Cr2\r
+ );\r
+\r
#endif\r
\r
return ;\r
}\r
+\r
+/**\r
+ This function reads CR2 register when on-demand paging is enabled.\r
+\r
+ @param[out] *Cr2 Pointer to variable to hold CR2 register value.\r
+**/\r
+VOID\r
+SaveCr2 (\r
+ OUT UINTN *Cr2\r
+ )\r
+{\r
+ if (!mCpuSmmStaticPageTable) {\r
+ *Cr2 = AsmReadCr2 ();\r
+ }\r
+}\r
+\r
+/**\r
+ This function restores CR2 register when on-demand paging is enabled.\r
+\r
+ @param[in] Cr2 Value to write into CR2 register.\r
+**/\r
+VOID\r
+RestoreCr2 (\r
+ IN UINTN Cr2\r
+ )\r
+{\r
+ if (!mCpuSmmStaticPageTable) {\r
+ AsmWriteCr2 (Cr2);\r
+ }\r
+}\r