UefiCpuPkg/MpInitLib: Fix X64 XCODE5/NASM compatibility issues

https://bugzilla.tianocore.org/show_bug.cgi?id=565

Fix NASM compatibility issues with XCODE5 tool chain.
The XCODE5 tool chain for X64 builds using PIE (Position
Independent Executable).  For most assembly sources using
PIE mode does not cause any issues.

However, if assembly code is copied to a different address
(such as AP startup code in the MpInitLib), then the
X64 assembly source must be implemented to be compatible
with PIE mode that uses RIP relative addressing.

The specific changes in this patch are:

* Use LEA instruction instead of MOV instruction to lookup
  the addresses of functions.

* The assembly function RendezvousFunnelProc() is copied
  below 1MB so it can be executed as part of the MpInitLib
  AP startup sequence.  RendezvousFunnelProc() calls the
  external function InitializeFloatingPointUnits().  The
  absolute address of InitializeFloatingPointUnits() is
  added to the MP_CPU_EXCHANGE_INFO structure that is passed
  to RendezvousFunnelProc().

Cc: Andrew Fish <afish@apple.com>
Cc: Jeff Fan <jeff.fan@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com>
Reviewed-by: Jeff Fan <jeff.fan@intel.com>
Reviewed-by: Andrew Fish <afish@apple.com>

diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c b/UefiCpuPkg/Library/MpInitLib/MpLib.c
index 407c44c95e623a5befdaf309dd17e2bdf54b7426..735e099b32f28e934ca20603679574bf82a02a30 100644 (file)
--- a/UefiCpuPkg/Library/MpInitLib/MpLib.c
+++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c
@@ -751,6 +751,8 @@ FillExchangeInfoData (
 \r
   ExchangeInfo->EnableExecuteDisable = IsBspExecuteDisableEnabled ();\r
 \r
+  ExchangeInfo->InitializeFloatingPointUnitsAddress = (UINTN)InitializeFloatingPointUnits;\r
+\r
   //\r
   // Get the BSP's data of GDT and IDT\r
   //\r

diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.h b/UefiCpuPkg/Library/MpInitLib/MpLib.h
index 989b3f809076ee44b6a9c1d629b7386a382eb6b9..ea56412cbce04adb575786e214165032f4ddbf67 100644 (file)
--- a/UefiCpuPkg/Library/MpInitLib/MpLib.h
+++ b/UefiCpuPkg/Library/MpInitLib/MpLib.h
@@ -177,6 +177,7 @@ typedef struct {
   UINTN                 InitFlag;\r
   CPU_INFO_IN_HOB       *CpuInfo;\r
   CPU_MP_DATA           *CpuMpData;\r
+  UINTN                 InitializeFloatingPointUnitsAddress;\r
 } MP_CPU_EXCHANGE_INFO;\r
 \r
 #pragma pack()\r

diff --git a/UefiCpuPkg/Library/MpInitLib/X64/MpEqu.inc b/UefiCpuPkg/Library/MpInitLib/X64/MpEqu.inc
index a63cd23a400666ae66317f593f1d9a3faf2d8a95..5b2529b5cbbebc22dd8a38c17476a539268aa909 100644 (file)
--- a/UefiCpuPkg/Library/MpInitLib/X64/MpEqu.inc
+++ b/UefiCpuPkg/Library/MpInitLib/X64/MpEqu.inc
@@ -1,5 +1,5 @@
 ;------------------------------------------------------------------------------ ;\r
-; Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>\r
+; Copyright (c) 2015 - 2017, Intel Corporation. All rights reserved.<BR>\r
 ; This program and the accompanying materials\r
 ; are licensed and made available under the terms and conditions of the BSD License\r
 ; which accompanies this distribution.  The full text of the license may be found at\r
@@ -40,4 +40,5 @@ EnableExecuteDisableLocation  equ        LockLocation + 5Ch
 Cr3Location                   equ        LockLocation + 64h\r
 InitFlagLocation              equ        LockLocation + 6Ch\r
 CpuInfoLocation               equ        LockLocation + 74h\r
+InitializeFloatingPointUnitsAddress equ  LockLocation + 84h\r
 \r

diff --git a/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm b/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm
index fa54d01542899bf4e79a2dc6245459ae00049a23..0b14a534668bb03557164ae90ec8b9e20d6bb758 100644 (file)
--- a/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm
+++ b/UefiCpuPkg/Library/MpInitLib/X64/MpFuncs.nasm
@@ -1,5 +1,5 @@
 ;------------------------------------------------------------------------------ ;\r
-; Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>\r
+; Copyright (c) 2015 - 2017, Intel Corporation. All rights reserved.<BR>\r
 ; This program and the accompanying materials\r
 ; are licensed and made available under the terms and conditions of the BSD License\r
 ; which accompanies this distribution.  The full text of the license may be found at\r
@@ -201,7 +201,7 @@ CProcedureInvoke:
     push       rbp\r
     mov        rbp, rsp\r
 \r
-    mov        rax, ASM_PFX(InitializeFloatingPointUnits)\r
+    mov        rax, qword [esi + InitializeFloatingPointUnitsAddress]\r
     sub        rsp, 20h\r
     call       rax               ; Call assembly function to initialize FPU per UEFI spec\r
     add        rsp, 20h\r
@@ -282,11 +282,11 @@ AsmRelocateApLoopEnd:
 ;-------------------------------------------------------------------------------------\r
 global ASM_PFX(AsmGetAddressMap)\r
 ASM_PFX(AsmGetAddressMap):\r
-    mov        rax, ASM_PFX(RendezvousFunnelProc)\r
+    lea        rax, [ASM_PFX(RendezvousFunnelProc)]\r
     mov        qword [rcx], rax\r
     mov        qword [rcx +  8h], LongModeStart - RendezvousFunnelProcStart\r
     mov        qword [rcx + 10h], RendezvousFunnelProcEnd - RendezvousFunnelProcStart\r
-    mov        rax, ASM_PFX(AsmRelocateApLoop)\r
+    lea        rax, [ASM_PFX(AsmRelocateApLoop)]\r
     mov        qword [rcx + 18h], rax\r
     mov        qword [rcx + 20h], AsmRelocateApLoopEnd - AsmRelocateApLoopStart\r
     ret\r