Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com>
Reviewed-by: Liming Gao <liming.gao@intel.com>
git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15535
6f19259b-4bc3-4df7-8a09-
765794883524
/** @file\r
EFI PCI IO protocol functions implementation for PCI Bus module.\r
\r
/** @file\r
EFI PCI IO protocol functions implementation for PCI Bus module.\r
\r
-Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2006 - 2014, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
OUT VOID **Resources OPTIONAL\r
)\r
{\r
OUT VOID **Resources OPTIONAL\r
)\r
{\r
PCI_IO_DEVICE *PciIoDevice;\r
PCI_IO_DEVICE *PciIoDevice;\r
- EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Ptr;\r
- EFI_ACPI_END_TAG_DESCRIPTOR *PtrEnd;\r
-\r
- NumConfig = 0;\r
+ EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *AddressSpace;\r
+ EFI_ACPI_END_TAG_DESCRIPTOR *End;\r
\r
PciIoDevice = PCI_IO_DEVICE_FROM_PCI_IO_THIS (This);\r
\r
\r
PciIoDevice = PCI_IO_DEVICE_FROM_PCI_IO_THIS (This);\r
\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
return EFI_INVALID_PARAMETER;\r
}\r
\r
- if (BarIndex >= PCI_MAX_BAR) {\r
+ if ((BarIndex >= PCI_MAX_BAR) || (PciIoDevice->PciBar[BarIndex].BarType == PciBarTypeUnknown)) {\r
return EFI_UNSUPPORTED;\r
}\r
\r
return EFI_UNSUPPORTED;\r
}\r
\r
}\r
\r
if (Resources != NULL) {\r
}\r
\r
if (Resources != NULL) {\r
-\r
- if (PciIoDevice->PciBar[BarIndex].BarType != PciBarTypeUnknown) {\r
- NumConfig = 1;\r
- }\r
-\r
- Configuration = AllocateZeroPool (sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) * NumConfig + sizeof (EFI_ACPI_END_TAG_DESCRIPTOR));\r
+ Configuration = AllocateZeroPool (sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) + sizeof (EFI_ACPI_END_TAG_DESCRIPTOR));\r
if (Configuration == NULL) {\r
return EFI_OUT_OF_RESOURCES;\r
}\r
\r
if (Configuration == NULL) {\r
return EFI_OUT_OF_RESOURCES;\r
}\r
\r
- Ptr = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Configuration;\r
+ AddressSpace = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Configuration;\r
- if (NumConfig == 1) {\r
- Ptr->Desc = ACPI_ADDRESS_SPACE_DESCRIPTOR;\r
- Ptr->Len = (UINT16) (sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) - 3);\r
+ AddressSpace->Desc = ACPI_ADDRESS_SPACE_DESCRIPTOR;\r
+ AddressSpace->Len = (UINT16) (sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) - 3);\r
- Ptr->AddrRangeMin = PciIoDevice->PciBar[BarIndex].BaseAddress;\r
- Ptr->AddrLen = PciIoDevice->PciBar[BarIndex].Length;\r
- Ptr->AddrRangeMax = PciIoDevice->PciBar[BarIndex].Alignment;\r
+ AddressSpace->AddrRangeMin = PciIoDevice->PciBar[BarIndex].BaseAddress;\r
+ AddressSpace->AddrLen = PciIoDevice->PciBar[BarIndex].Length;\r
+ AddressSpace->AddrRangeMax = PciIoDevice->PciBar[BarIndex].Alignment;\r
- switch (PciIoDevice->PciBar[BarIndex].BarType) {\r
- case PciBarTypeIo16:\r
- case PciBarTypeIo32:\r
- //\r
- // Io\r
- //\r
- Ptr->ResType = ACPI_ADDRESS_SPACE_TYPE_IO;\r
- break;\r
-\r
- case PciBarTypeMem32:\r
- //\r
- // Mem\r
- //\r
- Ptr->ResType = ACPI_ADDRESS_SPACE_TYPE_MEM;\r
- //\r
- // 32 bit\r
- //\r
- Ptr->AddrSpaceGranularity = 32;\r
- break;\r
+ switch (PciIoDevice->PciBar[BarIndex].BarType) {\r
+ case PciBarTypeIo16:\r
+ case PciBarTypeIo32:\r
+ //\r
+ // Io\r
+ //\r
+ AddressSpace->ResType = ACPI_ADDRESS_SPACE_TYPE_IO;\r
+ break;\r
- case PciBarTypePMem32:\r
- //\r
- // Mem\r
- //\r
- Ptr->ResType = ACPI_ADDRESS_SPACE_TYPE_MEM;\r
- //\r
- // prefechable\r
- //\r
- Ptr->SpecificFlag = 0x6;\r
- //\r
- // 32 bit\r
- //\r
- Ptr->AddrSpaceGranularity = 32;\r
- break;\r
+ case PciBarTypeMem32:\r
+ //\r
+ // Mem\r
+ //\r
+ AddressSpace->ResType = ACPI_ADDRESS_SPACE_TYPE_MEM;\r
+ //\r
+ // 32 bit\r
+ //\r
+ AddressSpace->AddrSpaceGranularity = 32;\r
+ break;\r
- case PciBarTypeMem64:\r
- //\r
- // Mem\r
- //\r
- Ptr->ResType = ACPI_ADDRESS_SPACE_TYPE_MEM;\r
- //\r
- // 64 bit\r
- //\r
- Ptr->AddrSpaceGranularity = 64;\r
- break;\r
+ case PciBarTypePMem32:\r
+ //\r
+ // Mem\r
+ //\r
+ AddressSpace->ResType = ACPI_ADDRESS_SPACE_TYPE_MEM;\r
+ //\r
+ // prefechable\r
+ //\r
+ AddressSpace->SpecificFlag = 0x6;\r
+ //\r
+ // 32 bit\r
+ //\r
+ AddressSpace->AddrSpaceGranularity = 32;\r
+ break;\r
- case PciBarTypePMem64:\r
- //\r
- // Mem\r
- //\r
- Ptr->ResType = ACPI_ADDRESS_SPACE_TYPE_MEM;\r
- //\r
- // prefechable\r
- //\r
- Ptr->SpecificFlag = 0x6;\r
- //\r
- // 64 bit\r
- //\r
- Ptr->AddrSpaceGranularity = 64;\r
- break;\r
+ case PciBarTypeMem64:\r
+ //\r
+ // Mem\r
+ //\r
+ AddressSpace->ResType = ACPI_ADDRESS_SPACE_TYPE_MEM;\r
+ //\r
+ // 64 bit\r
+ //\r
+ AddressSpace->AddrSpaceGranularity = 64;\r
+ break;\r
- default:\r
- break;\r
- }\r
+ case PciBarTypePMem64:\r
+ //\r
+ // Mem\r
+ //\r
+ AddressSpace->ResType = ACPI_ADDRESS_SPACE_TYPE_MEM;\r
+ //\r
+ // prefechable\r
+ //\r
+ AddressSpace->SpecificFlag = 0x6;\r
+ //\r
+ // 64 bit\r
+ //\r
+ AddressSpace->AddrSpaceGranularity = 64;\r
+ break;\r
- Ptr = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) ((UINT8 *) Ptr + sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR));\r
}\r
\r
//\r
// put the checksum\r
//\r
}\r
\r
//\r
// put the checksum\r
//\r
- PtrEnd = (EFI_ACPI_END_TAG_DESCRIPTOR *) ((UINT8 *) Ptr);\r
- PtrEnd->Desc = ACPI_END_TAG_DESCRIPTOR;\r
- PtrEnd->Checksum = 0;\r
+ End = (EFI_ACPI_END_TAG_DESCRIPTOR *) (AddressSpace + 1);\r
+ End->Desc = ACPI_END_TAG_DESCRIPTOR;\r
+ End->Checksum = 0;\r
- *Resources = Configuration;\r
+ *Resources = Configuration;\r
}\r
\r
return EFI_SUCCESS;\r
}\r
\r
return EFI_SUCCESS;\r