]> git.proxmox.com Git - mirror_edk2.git/commitdiff
MdeModulePkg: Add SmmControl PPI definition
authorjljusten <jljusten@6f19259b-4bc3-4df7-8a09-765794883524>
Tue, 19 Jul 2011 20:48:48 +0000 (20:48 +0000)
committerjljusten <jljusten@6f19259b-4bc3-4df7-8a09-765794883524>
Tue, 19 Jul 2011 20:48:48 +0000 (20:48 +0000)
Signed-off-by: jljusten
Reviewed-by: mdkinney
Reviewed-by: geekboy15a
Reviewed-by: jyao1
Reviewed-by: lgao4
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12033 6f19259b-4bc3-4df7-8a09-765794883524

MdeModulePkg/Include/Ppi/SmmControl.h [new file with mode: 0644]
MdeModulePkg/MdeModulePkg.dec

diff --git a/MdeModulePkg/Include/Ppi/SmmControl.h b/MdeModulePkg/Include/Ppi/SmmControl.h
new file mode 100644 (file)
index 0000000..341a29b
--- /dev/null
@@ -0,0 +1,96 @@
+/** @file\r
+  EFI SMM Control PPI definition.\r
+\r
+  This PPI is used to initiate SMI/PMI activations. This protocol could be published by either:\r
+  - A processor driver to abstract the SMI/PMI IPI\r
+  - The driver that abstracts the ASIC that is supporting the APM port, such as the ICH in an\r
+  Intel chipset\r
+  Because of the possibility of performing SMI or PMI IPI transactions, the ability to generate this\r
+  event from a platform chipset agent is an optional capability for both IA-32 and Itanium-based\r
+  systems.\r
+\r
+  Copyright (c) 2010, Intel Corporation. All rights reserved.<BR>\r
+\r
+  This program and the accompanying materials\r
+  are licensed and made available under the terms and conditions\r
+  of the BSD License which accompanies this distribution.  The\r
+  full text of the license may be found at\r
+  http://opensource.org/licenses/bsd-license.php\r
+\r
+  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+\r
+#ifndef _SMM_CONTROL_PPI_H_\r
+#define _SMM_CONTROL_PPI_H_\r
+\r
+#define PEI_SMM_CONTROL_PPI_GUID \\r
+  { 0x61c68702, 0x4d7e, 0x4f43, 0x8d, 0xef, 0xa7, 0x43, 0x5, 0xce, 0x74, 0xc5 }\r
+\r
+typedef struct _PEI_SMM_CONTROL_PPI  PEI_SMM_CONTROL_PPI;\r
+\r
+/**\r
+  Invokes SMI activation from either the preboot or runtime environment.\r
+\r
+  @param  PeiServices           General purpose services available to every PEIM.\r
+  @param  This                  The PEI_SMM_CONTROL_PPI instance.\r
+  @param  ArgumentBuffer        The optional sized data to pass into the protocol activation.\r
+  @param  ArgumentBufferSize    The optional size of the data.\r
+  @param  Periodic              An optional mechanism to periodically repeat activation.\r
+  @param  ActivationInterval    An optional parameter to repeat at this period one\r
+                                time or, if the Periodic Boolean is set, periodically.\r
+\r
+  @retval EFI_SUCCESS           The SMI/PMI has been engendered.\r
+  @retval EFI_DEVICE_ERROR      The timing is unsupported.\r
+  @retval EFI_INVALID_PARAMETER The activation period is unsupported.\r
+  @retval EFI_NOT_STARTED       The SMM base service has not been initialized.\r
+\r
+**/\r
+typedef\r
+EFI_STATUS\r
+(EFIAPI *PEI_SMM_ACTIVATE) (\r
+  IN EFI_PEI_SERVICES                                **PeiServices,\r
+  IN PEI_SMM_CONTROL_PPI                             * This,\r
+  IN OUT INT8                                        *ArgumentBuffer OPTIONAL,\r
+  IN OUT UINTN                                       *ArgumentBufferSize OPTIONAL,\r
+  IN BOOLEAN                                         Periodic OPTIONAL,\r
+  IN UINTN                                           ActivationInterval OPTIONAL\r
+  );\r
+\r
+/**\r
+  Clears any system state that was created in response to the Active call.\r
+\r
+  @param  PeiServices           General purpose services available to every PEIM.\r
+  @param  This                  The PEI_SMM_CONTROL_PPI instance.\r
+  @param  Periodic              Optional parameter to repeat at this period one \r
+                                time or, if the Periodic Boolean is set, periodically.\r
+\r
+  @retval EFI_SUCCESS           The SMI/PMI has been engendered.\r
+  @retval EFI_DEVICE_ERROR      The source could not be cleared.\r
+  @retval EFI_INVALID_PARAMETER The service did not support the Periodic input argument.\r
+\r
+**/\r
+typedef\r
+EFI_STATUS\r
+(EFIAPI *PEI_SMM_DEACTIVATE) (\r
+  IN EFI_PEI_SERVICES                      **PeiServices,\r
+  IN PEI_SMM_CONTROL_PPI                   * This,\r
+  IN BOOLEAN                               Periodic OPTIONAL\r
+  );\r
+\r
+///\r
+///  PEI SMM Control PPI is used to initiate SMI/PMI activations. This protocol could be published by either:\r
+///  - A processor driver to abstract the SMI/PMI IPI\r
+///  - The driver that abstracts the ASIC that is supporting the APM port, such as the ICH in an\r
+///  Intel chipset\r
+/// \r
+struct _PEI_SMM_CONTROL_PPI {\r
+  PEI_SMM_ACTIVATE    Trigger;\r
+  PEI_SMM_DEACTIVATE  Clear;\r
+};\r
+\r
+extern EFI_GUID gPeiSmmControlPpiGuid;\r
+\r
+#endif\r
index 0ebf033f3074988276746289f65810b692ae5d7e..3c588982336f0c4fb6052acb8cecbe9f8f4f77ad 100644 (file)
   ## Include/Ppi/SmmAccess.h\r
   gPeiSmmAccessPpiGuid          =  { 0x268f33a9, 0xcccd, 0x48be, { 0x88, 0x17, 0x86, 0x5, 0x3a, 0xc3, 0x2e, 0xd6 }}\r
 \r
+  ## Include/Ppi/SmmControl.h\r
+  gPeiSmmControlPpiGuid         =  { 0x61c68702, 0x4d7e, 0x4f43, { 0x8d, 0xef, 0xa7, 0x43, 0x5, 0xce, 0x74, 0xc5 }}\r
+\r
 [Protocols]\r
   ## Load File protocol provides capability to load and unload EFI image into memory and execute it.\r
   #  Include/Protocol/LoadPe32Image.h\r