LEGACY_BIOS_INSTANCE *Private;\r
EFI_TO_COMPATIBILITY16_INIT_TABLE *EfiToLegacy16InitTable;\r
EFI_PHYSICAL_ADDRESS MemoryAddress;\r
+ EFI_PHYSICAL_ADDRESS EbdaReservedBaseAddress;\r
VOID *MemoryPtr;\r
EFI_PHYSICAL_ADDRESS MemoryAddressUnder1MB;\r
UINTN Index;\r
//\r
// Allocate all 32k chunks from 0x60000 ~ 0x88000 for Legacy OPROMs that\r
// don't use PMM but look for zeroed memory. Note that various non-BBS\r
- // SCSIs expect different areas to be free\r
+ // OpROMs expect different areas to be free\r
//\r
- for (MemStart = 0x60000; MemStart < 0x88000; MemStart += 0x1000) {\r
+ EbdaReservedBaseAddress = MemoryAddress;\r
+ MemoryAddress = PcdGet32 (PcdOpromReservedMemoryBase);\r
+ MemorySize = PcdGet32 (PcdOpromReservedMemorySize);\r
+ //\r
+ // Check if base address and size for reserved memory are 4KB aligned.\r
+ //\r
+ ASSERT ((MemoryAddress & 0xFFF) == 0);\r
+ ASSERT ((MemorySize & 0xFFF) == 0);\r
+ //\r
+ // Check if the reserved memory is below EBDA reserved range.\r
+ //\r
+ ASSERT ((MemoryAddress < EbdaReservedBaseAddress) && ((MemoryAddress + MemorySize - 1) < EbdaReservedBaseAddress));\r
+ for (MemStart = MemoryAddress; MemStart < MemoryAddress + MemorySize; MemStart += 0x1000) {\r
Status = AllocateLegacyMemory (\r
AllocateAddress,\r
MemStart,\r
gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdEndOpromShadowAddress\r
gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdLowPmmMemorySize\r
gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdHighPmmMemorySize\r
+ gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdOpromReservedMemoryBase\r
+ gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdOpromReservedMemorySize\r
\r
[Depex]\r
gEfiLegacyRegion2ProtocolGuid AND gEfiLegacyInterruptProtocolGuid AND gEfiLegacyBiosPlatformProtocolGuid AND gEfiLegacy8259ProtocolGuid AND gEfiGenericMemTestProtocolGuid AND gEfiCpuArchProtocolGuid AND gEfiTimerArchProtocolGuid AND gEfiVariableWriteArchProtocolGuid\r
## The value should be a multiple of 4KB.\r
gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdEbdaReservedMemorySize|0x8000|UINT32|0x30000005\r
\r
+ ## The PCD is used to specify memory base address for OPROM to find free memory.\r
+ # Some OPROMs do not use EBDA or PMM to allocate memory for its usage, \r
+ # instead they find the memory filled with zero from 0x20000.\r
+ # The range should be below the EBDA reserved range from \r
+ # (CONVENTIONAL_MEMORY_TOP - PcdEbdaReservedMemorySize) to CONVENTIONAL_MEMORY_TOP.\r
+ gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdOpromReservedMemoryBase|0x60000|UINT32|0x3000000c\r
+ \r
+ ## The PCD is used to specify memory size with bytes for OPROM to find free memory.\r
+ ## The value should be a multiple of 4KB. And the range should be below the EBDA reserved range from \r
+ # (CONVENTIONAL_MEMORY_TOP - PcdEbdaReservedMemorySize) to CONVENTIONAL_MEMORY_TOP.\r
+ gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdOpromReservedMemorySize|0x28000|UINT32|0x3000000d\r
+\r
## The PCD is used to specify memory size with page number for a pre-allocated reserved memory to be used\r
# by PEI in S3 phase. The default size 32K. When changing the value of this PCD, the platform\r
# developer should make sure the memory size is large enough to meet PEI requiremnt in S3 phase.\r