+/** @file Lcd.c\r
+\r
+ Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>\r
+\r
+ This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions of the BSD License\r
+ which accompanies this distribution. The full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+#include <Library/DebugLib.h>\r
+#include <Library/IoLib.h>\r
+#include <Library/LcdHwLib.h>\r
+#include <Library/LcdPlatformLib.h>\r
+#include <Library/MemoryAllocationLib.h>\r
+#include <Library/PcdLib.h>\r
+\r
+#include "HdLcd.h"\r
+\r
+/**********************************************************************\r
+ *\r
+ * This file contains all the bits of the Lcd that are\r
+ * platform independent.\r
+ *\r
+ **********************************************************************/\r
+\r
+STATIC\r
+UINTN\r
+GetBytesPerPixel (\r
+ IN LCD_BPP Bpp\r
+ )\r
+{\r
+ switch(Bpp) {\r
+ case LCD_BITS_PER_PIXEL_24:\r
+ return 4;\r
+\r
+ case LCD_BITS_PER_PIXEL_16_565:\r
+ case LCD_BITS_PER_PIXEL_16_555:\r
+ case LCD_BITS_PER_PIXEL_12_444:\r
+ return 2;\r
+\r
+ case LCD_BITS_PER_PIXEL_8:\r
+ case LCD_BITS_PER_PIXEL_4:\r
+ case LCD_BITS_PER_PIXEL_2:\r
+ case LCD_BITS_PER_PIXEL_1:\r
+ return 1;\r
+\r
+ default:\r
+ return 0;\r
+ }\r
+}\r
+\r
+EFI_STATUS\r
+LcdInitialize (\r
+ IN EFI_PHYSICAL_ADDRESS VramBaseAddress\r
+ )\r
+{\r
+ // Disable the controller\r
+ MmioWrite32(HDLCD_REG_COMMAND, HDLCD_DISABLE);\r
+\r
+ // Disable all interrupts\r
+ MmioWrite32(HDLCD_REG_INT_MASK, 0);\r
+\r
+ // Define start of the VRAM. This never changes for any graphics mode\r
+ MmioWrite32(HDLCD_REG_FB_BASE, (UINT32) VramBaseAddress);\r
+\r
+ // Setup various registers that never change\r
+ MmioWrite32(HDLCD_REG_BUS_OPTIONS, (4 << 8) | HDLCD_BURST_8);\r
+ MmioWrite32(HDLCD_REG_POLARITIES, HDLCD_PXCLK_LOW | HDLCD_DATA_HIGH | HDLCD_DATEN_HIGH | HDLCD_HSYNC_LOW | HDLCD_VSYNC_HIGH);\r
+ MmioWrite32(HDLCD_REG_PIXEL_FORMAT, HDLCD_LITTLE_ENDIAN | HDLCD_4BYTES_PER_PIXEL);\r
+ MmioWrite32(HDLCD_REG_RED_SELECT, (0 << 16 | 8 << 8 | 0));\r
+ MmioWrite32(HDLCD_REG_GREEN_SELECT, (0 << 16 | 8 << 8 | 8));\r
+ MmioWrite32(HDLCD_REG_BLUE_SELECT, (0 << 16 | 8 << 8 | 16));\r
+\r
+ return EFI_SUCCESS;\r
+}\r
+\r
+EFI_STATUS\r
+LcdSetMode (\r
+ IN UINT32 ModeNumber\r
+ )\r
+{\r
+ EFI_STATUS Status;\r
+ UINT32 HRes;\r
+ UINT32 HSync;\r
+ UINT32 HBackPorch;\r
+ UINT32 HFrontPorch;\r
+ UINT32 VRes;\r
+ UINT32 VSync;\r
+ UINT32 VBackPorch;\r
+ UINT32 VFrontPorch;\r
+ UINT32 BytesPerPixel;\r
+ LCD_BPP LcdBpp;\r
+\r
+\r
+ // Set the video mode timings and other relevant information\r
+ Status = LcdPlatformGetTimings (ModeNumber,\r
+ &HRes,&HSync,&HBackPorch,&HFrontPorch,\r
+ &VRes,&VSync,&VBackPorch,&VFrontPorch);\r
+ ASSERT_EFI_ERROR (Status);\r
+ if (EFI_ERROR( Status )) {\r
+ return EFI_DEVICE_ERROR;\r
+ }\r
+\r
+ Status = LcdPlatformGetBpp (ModeNumber,&LcdBpp);\r
+ ASSERT_EFI_ERROR (Status);\r
+ if (EFI_ERROR( Status )) {\r
+ return EFI_DEVICE_ERROR;\r
+ }\r
+\r
+ BytesPerPixel = GetBytesPerPixel(LcdBpp);\r
+\r
+ // Disable the controller\r
+ MmioWrite32(HDLCD_REG_COMMAND, HDLCD_DISABLE);\r
+\r
+ // Update the frame buffer information with the new settings\r
+ MmioWrite32(HDLCD_REG_FB_LINE_LENGTH, HRes * BytesPerPixel);\r
+ MmioWrite32(HDLCD_REG_FB_LINE_PITCH, HRes * BytesPerPixel);\r
+ MmioWrite32(HDLCD_REG_FB_LINE_COUNT, VRes - 1);\r
+\r
+ // Set the vertical timing information\r
+ MmioWrite32(HDLCD_REG_V_SYNC, VSync);\r
+ MmioWrite32(HDLCD_REG_V_BACK_PORCH, VBackPorch);\r
+ MmioWrite32(HDLCD_REG_V_DATA, VRes - 1);\r
+ MmioWrite32(HDLCD_REG_V_FRONT_PORCH, VFrontPorch);\r
+\r
+ // Set the horizontal timing information\r
+ MmioWrite32(HDLCD_REG_H_SYNC, HSync);\r
+ MmioWrite32(HDLCD_REG_H_BACK_PORCH, HBackPorch);\r
+ MmioWrite32(HDLCD_REG_H_DATA, HRes - 1);\r
+ MmioWrite32(HDLCD_REG_H_FRONT_PORCH, HFrontPorch);\r
+\r
+ // Enable the controller\r
+ MmioWrite32(HDLCD_REG_COMMAND, HDLCD_ENABLE);\r
+\r
+ return EFI_SUCCESS;\r
+}\r
+\r
+VOID\r
+LcdShutdown (\r
+ VOID\r
+ )\r
+{\r
+ // Disable the controller\r
+ MmioWrite32 (HDLCD_REG_COMMAND, HDLCD_DISABLE);\r
+}\r
+\r
+EFI_STATUS\r
+LcdIdentify (\r
+ VOID\r
+ )\r
+{\r
+ return EFI_SUCCESS;\r
+}\r