ArmPkg RVCT: add ADRL/LDRL macro equivalents

The GCC ARM builds have access to ADRL/LDRL macros that emit relative
symbol references, i.e., references that do not require fixing up at
load time (or FV generation time for XIP modules)

Implement equivalent functionality for RVCT: note that this does not
use movw/movt pairs, but the more compatible add/add/add or add/add/ldr
sequences (which Clang does not support, unfortunately, hence the use
of movw/movt for the GCC toolchain family)

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>

diff --git a/ArmPkg/Include/AsmMacroIoLib.inc b/ArmPkg/Include/AsmMacroIoLib.inc
index c9cad5230c94112c47cdd28c2665bd04c94c618b..4bc3146fb399bbb2d960aa609d9925284c548709 100644 (file)
--- a/ArmPkg/Include/AsmMacroIoLib.inc
+++ b/ArmPkg/Include/AsmMacroIoLib.inc
@@ -26,4 +26,24 @@
   ldr  $Reg, =($Data)\r
   MEND\r
 \r
   ldr  $Reg, =($Data)\r
   MEND\r
 \r

+  MACRO\r
+  adrll   $Reg, $Symbol\r
+  add     $Reg, pc, #-8\r
+  RELOC   R_ARM_ALU_PC_G0_NC, $Symbol\r
+  add     $Reg, $Reg, #-4\r
+  RELOC   R_ARM_ALU_PC_G1_NC, $Symbol\r
+  add     $Reg, $Reg, #0\r
+  RELOC   R_ARM_ALU_PC_G2, $Symbol\r
+  MEND\r
+\r
+  MACRO\r
+  ldrl    $Reg, $Symbol\r
+  add     $Reg, pc, #-8\r
+  RELOC   R_ARM_ALU_PC_G0_NC, $Symbol\r
+  add     $Reg, $Reg, #-4\r
+  RELOC   R_ARM_ALU_PC_G1_NC, $Symbol\r
+  ldr     $Reg, [$Reg, #0]\r
+  RELOC   R_ARM_LDR_PC_G2, $Symbol\r
+  MEND\r
+\r

   END\r
   END\r