--- /dev/null
+/** @file\r
+ The DMA memory help function.\r
+\r
+ Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>\r
+\r
+ This program and the accompanying materials\r
+ are licensed and made available under the terms and conditions\r
+ of the BSD License which accompanies this distribution. The\r
+ full text of the license may be found at\r
+ http://opensource.org/licenses/bsd-license.php\r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
+\r
+**/\r
+\r
+#include "UfsBlockIoPei.h"\r
+\r
+EDKII_IOMMU_PPI *mIoMmu;\r
+\r
+/**\r
+ Provides the controller-specific addresses required to access system memory from a\r
+ DMA bus master.\r
+\r
+ @param Operation Indicates if the bus master is going to read or write to system memory.\r
+ @param HostAddress The system memory address to map to the PCI controller.\r
+ @param NumberOfBytes On input the number of bytes to map. On output the number of bytes\r
+ that were mapped.\r
+ @param DeviceAddress The resulting map address for the bus master PCI controller to use to\r
+ access the hosts HostAddress.\r
+ @param Mapping A resulting value to pass to Unmap().\r
+\r
+ @retval EFI_SUCCESS The range was mapped for the returned NumberOfBytes.\r
+ @retval EFI_UNSUPPORTED The HostAddress cannot be mapped as a common buffer.\r
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.\r
+ @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r
+ @retval EFI_DEVICE_ERROR The system hardware could not map the requested address.\r
+\r
+**/\r
+EFI_STATUS\r
+IoMmuMap (\r
+ IN EDKII_IOMMU_OPERATION Operation,\r
+ IN VOID *HostAddress,\r
+ IN OUT UINTN *NumberOfBytes,\r
+ OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,\r
+ OUT VOID **Mapping\r
+ )\r
+{\r
+ EFI_STATUS Status;\r
+ UINT64 Attribute;\r
+\r
+ if (mIoMmu != NULL) {\r
+ Status = mIoMmu->Map (\r
+ mIoMmu,\r
+ Operation,\r
+ HostAddress,\r
+ NumberOfBytes,\r
+ DeviceAddress,\r
+ Mapping\r
+ );\r
+ if (EFI_ERROR (Status)) {\r
+ return EFI_OUT_OF_RESOURCES;\r
+ }\r
+ switch (Operation) {\r
+ case EdkiiIoMmuOperationBusMasterRead:\r
+ case EdkiiIoMmuOperationBusMasterRead64:\r
+ Attribute = EDKII_IOMMU_ACCESS_READ;\r
+ break;\r
+ case EdkiiIoMmuOperationBusMasterWrite:\r
+ case EdkiiIoMmuOperationBusMasterWrite64:\r
+ Attribute = EDKII_IOMMU_ACCESS_WRITE;\r
+ break;\r
+ case EdkiiIoMmuOperationBusMasterCommonBuffer:\r
+ case EdkiiIoMmuOperationBusMasterCommonBuffer64:\r
+ Attribute = EDKII_IOMMU_ACCESS_READ | EDKII_IOMMU_ACCESS_WRITE;\r
+ break;\r
+ default:\r
+ ASSERT(FALSE);\r
+ return EFI_INVALID_PARAMETER;\r
+ }\r
+ Status = mIoMmu->SetAttribute (\r
+ mIoMmu,\r
+ *Mapping,\r
+ Attribute\r
+ );\r
+ if (EFI_ERROR (Status)) {\r
+ return Status;\r
+ }\r
+ } else {\r
+ *DeviceAddress = (EFI_PHYSICAL_ADDRESS)(UINTN)HostAddress;\r
+ *Mapping = NULL;\r
+ Status = EFI_SUCCESS;\r
+ }\r
+ return Status;\r
+}\r
+\r
+/**\r
+ Completes the Map() operation and releases any corresponding resources.\r
+\r
+ @param Mapping The mapping value returned from Map().\r
+\r
+ @retval EFI_SUCCESS The range was unmapped.\r
+ @retval EFI_INVALID_PARAMETER Mapping is not a value that was returned by Map().\r
+ @retval EFI_DEVICE_ERROR The data was not committed to the target system memory.\r
+**/\r
+EFI_STATUS\r
+IoMmuUnmap (\r
+ IN VOID *Mapping\r
+ )\r
+{\r
+ EFI_STATUS Status;\r
+\r
+ if (mIoMmu != NULL) {\r
+ Status = mIoMmu->SetAttribute (mIoMmu, Mapping, 0);\r
+ Status = mIoMmu->Unmap (mIoMmu, Mapping);\r
+ } else {\r
+ Status = EFI_SUCCESS;\r
+ }\r
+ return Status;\r
+}\r
+\r
+/**\r
+ Allocates pages that are suitable for an OperationBusMasterCommonBuffer or\r
+ OperationBusMasterCommonBuffer64 mapping.\r
+\r
+ @param Pages The number of pages to allocate.\r
+ @param HostAddress A pointer to store the base system memory address of the\r
+ allocated range.\r
+ @param DeviceAddress The resulting map address for the bus master PCI controller to use to\r
+ access the hosts HostAddress.\r
+ @param Mapping A resulting value to pass to Unmap().\r
+\r
+ @retval EFI_SUCCESS The requested memory pages were allocated.\r
+ @retval EFI_UNSUPPORTED Attributes is unsupported. The only legal attribute bits are\r
+ MEMORY_WRITE_COMBINE and MEMORY_CACHED.\r
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.\r
+ @retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated.\r
+\r
+**/\r
+EFI_STATUS\r
+IoMmuAllocateBuffer (\r
+ IN UINTN Pages,\r
+ OUT VOID **HostAddress,\r
+ OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,\r
+ OUT VOID **Mapping\r
+ )\r
+{\r
+ EFI_STATUS Status;\r
+ UINTN NumberOfBytes;\r
+ EFI_PHYSICAL_ADDRESS HostPhyAddress;\r
+\r
+ *HostAddress = NULL;\r
+ *DeviceAddress = 0;\r
+\r
+ if (mIoMmu != NULL) {\r
+ Status = mIoMmu->AllocateBuffer (\r
+ mIoMmu,\r
+ EfiBootServicesData,\r
+ Pages,\r
+ HostAddress,\r
+ 0\r
+ );\r
+ if (EFI_ERROR (Status)) {\r
+ return EFI_OUT_OF_RESOURCES;\r
+ }\r
+\r
+ NumberOfBytes = EFI_PAGES_TO_SIZE(Pages);\r
+ Status = mIoMmu->Map (\r
+ mIoMmu,\r
+ EdkiiIoMmuOperationBusMasterCommonBuffer,\r
+ *HostAddress,\r
+ &NumberOfBytes,\r
+ DeviceAddress,\r
+ Mapping\r
+ );\r
+ if (EFI_ERROR (Status)) {\r
+ return EFI_OUT_OF_RESOURCES;\r
+ }\r
+ Status = mIoMmu->SetAttribute (\r
+ mIoMmu,\r
+ *Mapping,\r
+ EDKII_IOMMU_ACCESS_READ | EDKII_IOMMU_ACCESS_WRITE\r
+ );\r
+ if (EFI_ERROR (Status)) {\r
+ return Status;\r
+ }\r
+ } else {\r
+ Status = PeiServicesAllocatePages (\r
+ EfiBootServicesData,\r
+ Pages,\r
+ &HostPhyAddress\r
+ );\r
+ if (EFI_ERROR (Status)) {\r
+ return EFI_OUT_OF_RESOURCES;\r
+ }\r
+ *HostAddress = (VOID *)(UINTN)HostPhyAddress;\r
+ *DeviceAddress = HostPhyAddress;\r
+ *Mapping = NULL;\r
+ }\r
+ return Status;\r
+}\r
+\r
+/**\r
+ Frees memory that was allocated with AllocateBuffer().\r
+\r
+ @param Pages The number of pages to free.\r
+ @param HostAddress The base system memory address of the allocated range.\r
+ @param Mapping The mapping value returned from Map().\r
+\r
+ @retval EFI_SUCCESS The requested memory pages were freed.\r
+ @retval EFI_INVALID_PARAMETER The memory range specified by HostAddress and Pages\r
+ was not allocated with AllocateBuffer().\r
+\r
+**/\r
+EFI_STATUS\r
+IoMmuFreeBuffer (\r
+ IN UINTN Pages,\r
+ IN VOID *HostAddress,\r
+ IN VOID *Mapping\r
+ )\r
+{\r
+ EFI_STATUS Status;\r
+\r
+ if (mIoMmu != NULL) {\r
+ Status = mIoMmu->SetAttribute (mIoMmu, Mapping, 0);\r
+ Status = mIoMmu->Unmap (mIoMmu, Mapping);\r
+ Status = mIoMmu->FreeBuffer (mIoMmu, Pages, HostAddress);\r
+ } else {\r
+ Status = EFI_SUCCESS;\r
+ }\r
+ return Status;\r
+}\r
+\r
+/**\r
+ Initialize IOMMU.\r
+**/\r
+VOID\r
+IoMmuInit (\r
+ VOID\r
+ )\r
+{\r
+ PeiServicesLocatePpi (\r
+ &gEdkiiIoMmuPpiGuid,\r
+ 0,\r
+ NULL,\r
+ (VOID **)&mIoMmu\r
+ );\r
+}\r
+\r
0\r
}\r
},\r
+ { // EndOfPeiNotifyList\r
+ (EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),\r
+ &gEfiEndOfPeiSignalPpiGuid,\r
+ UfsEndOfPei\r
+ },\r
0, // UfsHcBase\r
0, // Capabilities\r
0, // TaskTag\r
0, // UtpTrlBase\r
0, // Nutrs\r
+ NULL, // TrlMapping\r
0, // UtpTmrlBase\r
0, // Nutmrs\r
+ NULL, // TmrlMapping\r
{ // Luns\r
{\r
UFS_LUN_0, // Ufs Common Lun 0\r
return Status;\r
}\r
\r
+/**\r
+ One notified function to cleanup the allocated DMA buffers at the end of PEI.\r
+\r
+ @param[in] PeiServices Pointer to PEI Services Table.\r
+ @param[in] NotifyDescriptor Pointer to the descriptor for the Notification\r
+ event that caused this function to execute.\r
+ @param[in] Ppi Pointer to the PPI data associated with this function.\r
+\r
+ @retval EFI_SUCCESS The function completes successfully\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+UfsEndOfPei (\r
+ IN EFI_PEI_SERVICES **PeiServices,\r
+ IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor,\r
+ IN VOID *Ppi\r
+ )\r
+{\r
+ UFS_PEIM_HC_PRIVATE_DATA *Private;\r
+\r
+ Private = GET_UFS_PEIM_HC_PRIVATE_DATA_FROM_THIS_NOTIFY (NotifyDescriptor);\r
+\r
+ if ((Private->Pool != NULL) && (Private->Pool->Head != NULL)) {\r
+ UfsPeimFreeMemPool (Private->Pool);\r
+ }\r
+\r
+ if (Private->UtpTmrlBase != NULL) {\r
+ IoMmuFreeBuffer (\r
+ EFI_SIZE_TO_PAGES (Private->Nutmrs * sizeof (UTP_TMRD)),\r
+ Private->UtpTmrlBase,\r
+ Private->TmrlMapping\r
+ );\r
+ }\r
+\r
+ if (Private->UtpTrlBase != NULL) {\r
+ IoMmuFreeBuffer (\r
+ EFI_SIZE_TO_PAGES (Private->Nutrs * sizeof (UTP_TRD)),\r
+ Private->UtpTrlBase,\r
+ Private->TrlMapping\r
+ );\r
+ }\r
+\r
+ UfsControllerStop (Private);\r
+\r
+ return EFI_SUCCESS;\r
+}\r
+\r
/**\r
The user code starts with this function.\r
\r
return EFI_DEVICE_ERROR;\r
}\r
\r
+ IoMmuInit ();\r
+\r
Controller = 0;\r
MmioBase = 0;\r
while (TRUE) {\r
}\r
}\r
\r
- Status = PeiServicesInstallPpi (&Private->BlkIoPpiList);\r
+ PeiServicesInstallPpi (&Private->BlkIoPpiList);\r
+ PeiServicesNotifyPpi (&Private->EndOfPeiNotifyList);\r
Controller++;\r
}\r
\r
/** @file\r
\r
- Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>\r
+ Copyright (c) 2014 - 2017, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution. The full text of the license may be found at\r
#include <Ppi/UfsHostController.h>\r
#include <Ppi/BlockIo.h>\r
#include <Ppi/BlockIo2.h>\r
+#include <Ppi/IoMmu.h>\r
+#include <Ppi/EndOfPeiPhase.h>\r
\r
#include <Library/DebugLib.h>\r
#include <Library/BaseLib.h>\r
EFI_PEI_PPI_DESCRIPTOR BlkIo2PpiList;\r
EFI_PEI_BLOCK_IO2_MEDIA Media[UFS_PEIM_MAX_LUNS];\r
\r
+ //\r
+ // EndOfPei callback is used to stop the UFS DMA operation\r
+ // after exit PEI phase.\r
+ //\r
+ EFI_PEI_NOTIFY_DESCRIPTOR EndOfPeiNotifyList;\r
+\r
UINTN UfsHcBase;\r
UINT32 Capabilities;\r
\r
\r
VOID *UtpTrlBase;\r
UINT8 Nutrs;\r
+ VOID *TrlMapping;\r
VOID *UtpTmrlBase;\r
UINT8 Nutmrs;\r
+ VOID *TmrlMapping;\r
\r
UFS_PEIM_EXPOSED_LUNS Luns;\r
} UFS_PEIM_HC_PRIVATE_DATA;\r
\r
#define GET_UFS_PEIM_HC_PRIVATE_DATA_FROM_THIS(a) CR (a, UFS_PEIM_HC_PRIVATE_DATA, BlkIoPpi, UFS_PEIM_HC_SIG)\r
#define GET_UFS_PEIM_HC_PRIVATE_DATA_FROM_THIS2(a) CR (a, UFS_PEIM_HC_PRIVATE_DATA, BlkIo2Ppi, UFS_PEIM_HC_SIG)\r
+#define GET_UFS_PEIM_HC_PRIVATE_DATA_FROM_THIS_NOTIFY(a) CR (a, UFS_PEIM_HC_PRIVATE_DATA, EndOfPeiNotifyList, UFS_PEIM_HC_SIG)\r
\r
#define UFS_SCSI_OP_LENGTH_SIX 0x6\r
#define UFS_SCSI_OP_LENGTH_TEN 0xa\r
IN UFS_PEIM_HC_PRIVATE_DATA *Private\r
);\r
\r
+/**\r
+ Release the memory management pool.\r
+\r
+ @param Pool The memory pool to free.\r
+\r
+ @retval EFI_DEVICE_ERROR Fail to free the memory pool.\r
+ @retval EFI_SUCCESS The memory pool is freed.\r
+\r
+**/\r
+EFI_STATUS\r
+UfsPeimFreeMemPool (\r
+ IN UFS_PEIM_MEM_POOL *Pool\r
+ );\r
+\r
/**\r
Allocate some memory from the host controller's memory pool\r
which can be used to communicate with host controller.\r
IN UINTN Size\r
);\r
\r
+/**\r
+ Initialize IOMMU.\r
+**/\r
+VOID\r
+IoMmuInit (\r
+ VOID\r
+ );\r
+\r
+/**\r
+ Provides the controller-specific addresses required to access system memory from a\r
+ DMA bus master.\r
+\r
+ @param Operation Indicates if the bus master is going to read or write to system memory.\r
+ @param HostAddress The system memory address to map to the PCI controller.\r
+ @param NumberOfBytes On input the number of bytes to map. On output the number of bytes\r
+ that were mapped.\r
+ @param DeviceAddress The resulting map address for the bus master PCI controller to use to\r
+ access the hosts HostAddress.\r
+ @param Mapping A resulting value to pass to Unmap().\r
+\r
+ @retval EFI_SUCCESS The range was mapped for the returned NumberOfBytes.\r
+ @retval EFI_UNSUPPORTED The HostAddress cannot be mapped as a common buffer.\r
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.\r
+ @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r
+ @retval EFI_DEVICE_ERROR The system hardware could not map the requested address.\r
+\r
+**/\r
+EFI_STATUS\r
+IoMmuMap (\r
+ IN EDKII_IOMMU_OPERATION Operation,\r
+ IN VOID *HostAddress,\r
+ IN OUT UINTN *NumberOfBytes,\r
+ OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,\r
+ OUT VOID **Mapping\r
+ );\r
+\r
+/**\r
+ Completes the Map() operation and releases any corresponding resources.\r
+\r
+ @param Mapping The mapping value returned from Map().\r
+\r
+ @retval EFI_SUCCESS The range was unmapped.\r
+ @retval EFI_INVALID_PARAMETER Mapping is not a value that was returned by Map().\r
+ @retval EFI_DEVICE_ERROR The data was not committed to the target system memory.\r
+**/\r
+EFI_STATUS\r
+IoMmuUnmap (\r
+ IN VOID *Mapping\r
+ );\r
+\r
+/**\r
+ Allocates pages that are suitable for an OperationBusMasterCommonBuffer or\r
+ OperationBusMasterCommonBuffer64 mapping.\r
+\r
+ @param Pages The number of pages to allocate.\r
+ @param HostAddress A pointer to store the base system memory address of the\r
+ allocated range.\r
+ @param DeviceAddress The resulting map address for the bus master PCI controller to use to\r
+ access the hosts HostAddress.\r
+ @param Mapping A resulting value to pass to Unmap().\r
+\r
+ @retval EFI_SUCCESS The requested memory pages were allocated.\r
+ @retval EFI_UNSUPPORTED Attributes is unsupported. The only legal attribute bits are\r
+ MEMORY_WRITE_COMBINE and MEMORY_CACHED.\r
+ @retval EFI_INVALID_PARAMETER One or more parameters are invalid.\r
+ @retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated.\r
+\r
+**/\r
+EFI_STATUS\r
+IoMmuAllocateBuffer (\r
+ IN UINTN Pages,\r
+ OUT VOID **HostAddress,\r
+ OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,\r
+ OUT VOID **Mapping\r
+ );\r
+\r
+/**\r
+ Frees memory that was allocated with AllocateBuffer().\r
+\r
+ @param Pages The number of pages to free.\r
+ @param HostAddress The base system memory address of the allocated range.\r
+ @param Mapping The mapping value returned from Map().\r
+\r
+ @retval EFI_SUCCESS The requested memory pages were freed.\r
+ @retval EFI_INVALID_PARAMETER The memory range specified by HostAddress and Pages\r
+ was not allocated with AllocateBuffer().\r
+\r
+**/\r
+EFI_STATUS\r
+IoMmuFreeBuffer (\r
+ IN UINTN Pages,\r
+ IN VOID *HostAddress,\r
+ IN VOID *Mapping\r
+ );\r
+\r
+/**\r
+ One notified function to cleanup the allocated DMA buffers at the end of PEI.\r
+\r
+ @param[in] PeiServices Pointer to PEI Services Table.\r
+ @param[in] NotifyDescriptor Pointer to the descriptor for the Notification\r
+ event that caused this function to execute.\r
+ @param[in] Ppi Pointer to the PPI data associated with this function.\r
+\r
+ @retval EFI_SUCCESS The function completes successfully\r
+\r
+**/\r
+EFI_STATUS\r
+EFIAPI\r
+UfsEndOfPei (\r
+ IN EFI_PEI_SERVICES **PeiServices,\r
+ IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor,\r
+ IN VOID *Ppi\r
+ );\r
+\r
#endif\r
## @file\r
# Description file for the Universal Flash Storage (UFS) Peim driver.\r
#\r
-# Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>\r
+# Copyright (c) 2014 - 2017, Intel Corporation. All rights reserved.<BR>\r
#\r
# This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
UfsHci.h\r
UfsHcMem.c\r
UfsHcMem.h\r
+ DmaMem.c\r
\r
[Packages]\r
MdePkg/MdePkg.dec\r
gEfiPeiVirtualBlockIoPpiGuid ## PRODUCES\r
gEfiPeiVirtualBlockIo2PpiGuid ## PRODUCES\r
gEdkiiPeiUfsHostControllerPpiGuid ## CONSUMES\r
+ gEdkiiIoMmuPpiGuid ## CONSUMES\r
+ gEfiEndOfPeiSignalPpiGuid ## CONSUMES\r
\r
[Depex]\r
gEfiPeiMemoryDiscoveredPpiGuid AND gEdkiiPeiUfsHostControllerPpiGuid\r
/** @file\r
\r
-Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2014 - 2017, Intel Corporation. All rights reserved.<BR>\r
\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions\r
)\r
{\r
UFS_PEIM_MEM_BLOCK *Block;\r
+ VOID *BufHost;\r
+ VOID *Mapping;\r
+ EFI_PHYSICAL_ADDRESS MappedAddr;\r
EFI_STATUS Status;\r
VOID *TempPtr;\r
- EFI_PHYSICAL_ADDRESS Address;\r
\r
TempPtr = NULL;\r
Block = NULL;\r
\r
Block->Bits = (UINT8*)(UINTN)TempPtr;\r
\r
- Status = PeiServicesAllocatePages (\r
- EfiBootServicesCode,\r
+ Status = IoMmuAllocateBuffer (\r
Pages,\r
- &Address\r
+ &BufHost,\r
+ &MappedAddr,\r
+ &Mapping\r
);\r
if (EFI_ERROR (Status)) {\r
return NULL;\r
}\r
\r
- ZeroMem ((VOID*)(UINTN)Address, EFI_PAGES_TO_SIZE (Pages));\r
+ ZeroMem ((VOID*)(UINTN)BufHost, EFI_PAGES_TO_SIZE (Pages));\r
\r
- Block->Buf = (UINT8*)((UINTN)Address);\r
- Block->Next = NULL;\r
+ Block->BufHost = (UINT8 *) (UINTN) BufHost;\r
+ Block->Buf = (UINT8 *) (UINTN) MappedAddr;\r
+ Block->Mapping = Mapping;\r
+ Block->Next = NULL;\r
\r
return Block;\r
}\r
)\r
{\r
ASSERT ((Pool != NULL) && (Block != NULL));\r
+\r
+ IoMmuFreeBuffer (EFI_SIZE_TO_PAGES (Block->BufLen), Block->BufHost, Block->Mapping);\r
}\r
\r
/**\r
/** @file\r
\r
-Copyright (c) 2014, Intel Corporation. All rights reserved.<BR>\r
+Copyright (c) 2014 - 2017, Intel Corporation. All rights reserved.<BR>\r
\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions\r
UINT8 *Bits; // Bit array to record which unit is allocated\r
UINTN BitsLen; \r
UINT8 *Buf;\r
+ UINT8 *BufHost;\r
UINTN BufLen; // Memory size in bytes\r
+ VOID *Mapping;\r
UFS_PEIM_MEM_BLOCK *Next;\r
};\r
\r
@param[in] Lun The Lun on which the SCSI command is executed.\r
@param[in] Packet The pointer to the UFS_SCSI_REQUEST_PACKET data structure.\r
@param[in] Trd The pointer to the UTP Transfer Request Descriptor.\r
+ @param[out] BufferMap A resulting value, if not NULL, to pass to IoMmuUnmap().\r
\r
@retval EFI_SUCCESS The creation succeed.\r
@retval EFI_DEVICE_ERROR The creation failed.\r
**/\r
EFI_STATUS\r
UfsCreateScsiCommandDesc (\r
- IN UFS_PEIM_HC_PRIVATE_DATA *Private,\r
- IN UINT8 Lun,\r
- IN UFS_SCSI_REQUEST_PACKET *Packet,\r
- IN UTP_TRD *Trd\r
+ IN UFS_PEIM_HC_PRIVATE_DATA *Private,\r
+ IN UINT8 Lun,\r
+ IN UFS_SCSI_REQUEST_PACKET *Packet,\r
+ IN UTP_TRD *Trd,\r
+ OUT VOID **BufferMap\r
)\r
{\r
UINT8 *CommandDesc;\r
UTP_COMMAND_UPIU *CommandUpiu;\r
UTP_TR_PRD *PrdtBase;\r
UFS_DATA_DIRECTION DataDirection;\r
+ EFI_STATUS Status;\r
+ EDKII_IOMMU_OPERATION MapOp;\r
+ UINTN MapLength;\r
+ EFI_PHYSICAL_ADDRESS BufferPhyAddr;\r
\r
ASSERT ((Private != NULL) && (Packet != NULL) && (Trd != NULL));\r
\r
+ BufferPhyAddr = 0;\r
+\r
if (Packet->DataDirection == UfsDataIn) {\r
- Buffer = Packet->InDataBuffer;\r
- Length = Packet->InTransferLength;\r
+ Buffer = Packet->InDataBuffer;\r
+ Length = Packet->InTransferLength;\r
DataDirection = UfsDataIn;\r
+ MapOp = EdkiiIoMmuOperationBusMasterWrite;\r
} else {\r
Buffer = Packet->OutDataBuffer;\r
Length = Packet->OutTransferLength;\r
DataDirection = UfsDataOut;\r
+ MapOp = EdkiiIoMmuOperationBusMasterRead;\r
}\r
\r
if (Length == 0) {\r
DataDirection = UfsNoData;\r
+ } else {\r
+ MapLength = Length;\r
+ Status = IoMmuMap (MapOp, Buffer, &MapLength, &BufferPhyAddr, BufferMap);\r
+\r
+ if (EFI_ERROR (Status) || (MapLength != Length)) {\r
+ DEBUG ((DEBUG_ERROR, "UfsCreateScsiCommandDesc: Fail to map data buffer.\n"));\r
+ return EFI_OUT_OF_RESOURCES;\r
+ }\r
}\r
\r
PrdtNumber = (UINTN)DivU64x32 ((UINT64)Length + UFS_MAX_DATA_LEN_PER_PRD - 1, UFS_MAX_DATA_LEN_PER_PRD);\r
PrdtBase = (UTP_TR_PRD*)(CommandDesc + ROUNDUP8 (sizeof (UTP_COMMAND_UPIU)) + ROUNDUP8 (sizeof (UTP_RESPONSE_UPIU)));\r
\r
UfsInitCommandUpiu (CommandUpiu, Lun, Private->TaskTag++, Packet->Cdb, Packet->CdbLength, DataDirection, Length);\r
- UfsInitUtpPrdt (PrdtBase, Buffer, Length);\r
+ UfsInitUtpPrdt (PrdtBase, (VOID*)(UINTN)BufferPhyAddr, Length);\r
\r
//\r
// Fill UTP_TRD associated fields\r
UTP_RESPONSE_UPIU *Response;\r
UINT16 SenseDataLen;\r
UINT32 ResTranCount;\r
+ VOID *PacketBufferMap;\r
\r
//\r
// Find out which slot of transfer request list is available.\r
}\r
\r
Trd = ((UTP_TRD*)Private->UtpTrlBase) + Slot;\r
+ PacketBufferMap = NULL;\r
\r
//\r
// Fill transfer request descriptor to this slot.\r
//\r
- Status = UfsCreateScsiCommandDesc (Private, Lun, Packet, Trd);\r
+ Status = UfsCreateScsiCommandDesc (Private, Lun, Packet, Trd, &PacketBufferMap);\r
if (EFI_ERROR (Status)) {\r
return Status;\r
}\r
}\r
\r
Exit:\r
+ if (PacketBufferMap != NULL) {\r
+ IoMmuUnmap (PacketBufferMap);\r
+ }\r
UfsStopExecCmd (Private, Slot);\r
UfsPeimFreeMem (Private->Pool, CmdDescBase, CmdDescSize);\r
\r
UINTN Address;\r
UINT32 Data;\r
UINT8 Nutmrs;\r
- EFI_PHYSICAL_ADDRESS Buffer;\r
+ VOID *CmdDescHost;\r
+ EFI_PHYSICAL_ADDRESS CmdDescPhyAddr;\r
+ VOID *CmdDescMapping;\r
EFI_STATUS Status;\r
\r
//\r
// Allocate and initialize UTP Task Management Request List.\r
//\r
Nutmrs = (UINT8) (RShiftU64 ((Private->Capabilities & UFS_HC_CAP_NUTMRS), 16) + 1);\r
- Status = PeiServicesAllocatePages (\r
- EfiBootServicesCode,\r
+ Status = IoMmuAllocateBuffer (\r
EFI_SIZE_TO_PAGES (Nutmrs * sizeof (UTP_TMRD)),\r
- &Buffer\r
+ &CmdDescHost,\r
+ &CmdDescPhyAddr,\r
+ &CmdDescMapping\r
);\r
-\r
if (EFI_ERROR (Status)) {\r
return EFI_DEVICE_ERROR;\r
}\r
\r
- ZeroMem ((VOID*)(UINTN)Buffer, EFI_PAGES_TO_SIZE (EFI_SIZE_TO_PAGES (Nutmrs * sizeof (UTP_TMRD))));\r
+ ZeroMem (CmdDescHost, EFI_PAGES_TO_SIZE (EFI_SIZE_TO_PAGES (Nutmrs * sizeof (UTP_TMRD))));\r
\r
//\r
// Program the UTP Task Management Request List Base Address and UTP Task Management\r
// Request List Base Address with a 64-bit address allocated at step 6.\r
//\r
Address = Private->UfsHcBase + UFS_HC_UTMRLBA_OFFSET; \r
- MmioWrite32 (Address, (UINT32)(UINTN)Buffer);\r
+ MmioWrite32 (Address, (UINT32)(UINTN)CmdDescPhyAddr);\r
Address = Private->UfsHcBase + UFS_HC_UTMRLBAU_OFFSET; \r
- MmioWrite32 (Address, (UINT32)RShiftU64 ((UINT64)Buffer, 32));\r
- Private->UtpTmrlBase = (VOID*)(UINTN)Buffer;\r
+ MmioWrite32 (Address, (UINT32)RShiftU64 ((UINT64)CmdDescPhyAddr, 32));\r
+ Private->UtpTmrlBase = (VOID*)(UINTN)CmdDescHost;\r
Private->Nutmrs = Nutmrs;\r
+ Private->TmrlMapping = CmdDescMapping;\r
\r
//\r
// Enable the UTP Task Management Request List by setting the UTP Task Management\r
UINTN Address;\r
UINT32 Data;\r
UINT8 Nutrs;\r
- EFI_PHYSICAL_ADDRESS Buffer;\r
+ VOID *CmdDescHost;\r
+ EFI_PHYSICAL_ADDRESS CmdDescPhyAddr;\r
+ VOID *CmdDescMapping;\r
EFI_STATUS Status;\r
\r
//\r
// Allocate and initialize UTP Transfer Request List.\r
//\r
Nutrs = (UINT8)((Private->Capabilities & UFS_HC_CAP_NUTRS) + 1);\r
- Status = PeiServicesAllocatePages (\r
- EfiBootServicesCode,\r
+ Status = IoMmuAllocateBuffer (\r
EFI_SIZE_TO_PAGES (Nutrs * sizeof (UTP_TRD)),\r
- &Buffer\r
+ &CmdDescHost,\r
+ &CmdDescPhyAddr,\r
+ &CmdDescMapping\r
);\r
-\r
if (EFI_ERROR (Status)) {\r
return EFI_DEVICE_ERROR;\r
}\r
\r
- ZeroMem ((VOID*)(UINTN)Buffer, EFI_PAGES_TO_SIZE (EFI_SIZE_TO_PAGES (Nutrs * sizeof (UTP_TRD))));\r
+ ZeroMem (CmdDescHost, EFI_PAGES_TO_SIZE (EFI_SIZE_TO_PAGES (Nutrs * sizeof (UTP_TRD))));\r
\r
//\r
// Program the UTP Transfer Request List Base Address and UTP Transfer Request List\r
// Base Address with a 64-bit address allocated at step 8.\r
//\r
Address = Private->UfsHcBase + UFS_HC_UTRLBA_OFFSET; \r
- MmioWrite32 (Address, (UINT32)(UINTN)Buffer);\r
+ MmioWrite32 (Address, (UINT32)(UINTN)CmdDescPhyAddr);\r
Address = Private->UfsHcBase + UFS_HC_UTRLBAU_OFFSET; \r
- MmioWrite32 (Address, (UINT32)RShiftU64 ((UINT64)Buffer, 32));\r
- Private->UtpTrlBase = (VOID*)(UINTN)Buffer;\r
+ MmioWrite32 (Address, (UINT32)RShiftU64 ((UINT64)CmdDescPhyAddr, 32));\r
+ Private->UtpTrlBase = (VOID*)(UINTN)CmdDescHost;\r
Private->Nutrs = Nutrs;\r
+ Private->TrlMapping = CmdDescMapping;\r
\r
//\r
// Enable the UTP Transfer Request List by setting the UTP Transfer Request List\r
Status = UfsInitTransferRequestList (Private);\r
if (EFI_ERROR (Status)) {\r
DEBUG ((EFI_D_ERROR, "UfsDevicePei: Transfer list initialization Fails, Status = %r\n", Status));\r
+\r
+ if (Private->TmrlMapping != NULL) {\r
+ IoMmuFreeBuffer (\r
+ EFI_SIZE_TO_PAGES (Private->Nutmrs * sizeof (UTP_TMRD)),\r
+ Private->UtpTmrlBase,\r
+ Private->TmrlMapping\r
+ );\r
+ Private->TmrlMapping = NULL;\r
+ }\r
+\r
return Status;\r
}\r
\r
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