VOID *Buffer;\r
\r
UINT32 Capability;\r
+ UINT32 PortImplementBitMap;\r
UINT8 MaxPortNumber;\r
UINT8 MaxCommandSlotNumber;\r
BOOLEAN Support64Bit;\r
// Collect AHCI controller information\r
//\r
Capability = AhciReadReg(PciIo, EFI_AHCI_CAPABILITY_OFFSET);\r
- MaxPortNumber = (UINT8) ((Capability & 0x1F) + 1);\r
//\r
// Get the number of command slots per port supported by this HBA.\r
//\r
MaxCommandSlotNumber = (UINT8) (((Capability & 0x1F00) >> 8) + 1);\r
Support64Bit = (BOOLEAN) (((Capability & BIT31) != 0) ? TRUE : FALSE);\r
+ \r
+ PortImplementBitMap = AhciReadReg(PciIo, EFI_AHCI_PI_OFFSET);\r
+ //\r
+ // Get the highest bit of implemented ports which decides how many bytes are allocated for recived FIS.\r
+ //\r
+ MaxPortNumber = (UINT8)(UINTN)(HighBitSet32(PortImplementBitMap) + 1);\r
+ if (MaxPortNumber == 0) {\r
+ return EFI_DEVICE_ERROR;\r
+ }\r
\r
MaxReceiveFisSize = MaxPortNumber * sizeof (EFI_AHCI_RECEIVED_FIS);\r
Status = PciIo->AllocateBuffer (\r