https://bugzilla.tianocore.org/show_bug.cgi?id=3635
Currently, in order to test the supported attributes,
the PciTestSupportedAttribute() will set the command register
to 0x27 (EFI_PCI_COMMAND_IO_SPACE, EFI_PCI_COMMAND_MEMORY_SPACE,
EFI_PCI_COMMAND_BUS_MASTER, EFI_PCI_COMMAND_VGA_PALETTE_SNOOP) firstly,
and then read back to check whether these attributes are
set successfully in the device.
This will cause the other enabled bits
(other than EFI_PCI_COMMAND_IO_SPACE,EFI_PCI_COMMAND_MEMORY_SPACE,
EFI_PCI_COMMAND_BUS_MASTER,EFI_PCI_COMMAND_VGA_PALETTE_SNOOP)
be cleared for a short of time
This patch fixes this issue by keeping the origina
enabled bits when setting 0x27.
Signed-off-by: xueshengfeng <xueshengfeng@byosoft.com.cn>
Reviewed-by: Ray <ray.ni@intel.com>
)\r
{\r
EFI_TPL OldTpl;\r
+ UINT16 CommandValue;\r
\r
//\r
// Preserve the original value\r
// Raise TPL to high level to disable timer interrupt while the BAR is probed\r
//\r
OldTpl = gBS->RaiseTPL (TPL_HIGH_LEVEL);\r
+ CommandValue = *Command | *OldCommand;\r
\r
- PCI_SET_COMMAND_REGISTER (PciIoDevice, *Command);\r
- PCI_READ_COMMAND_REGISTER (PciIoDevice, Command);\r
+ PCI_SET_COMMAND_REGISTER (PciIoDevice, CommandValue);\r
+ PCI_READ_COMMAND_REGISTER (PciIoDevice, &CommandValue);\r
\r
+ *Command = *Command & CommandValue;\r
//\r
// Write back the original value\r
//\r