1. cleanup functions header in PeCoffLoaderEx.c

2. fixed link error in EnablePaging64.asm

git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@1175 6f19259b-4bc3-4df7-8a09-765794883524

diff --git a/MdePkg/Library/BaseLib/X64/EnablePaging64.asm b/MdePkg/Library/BaseLib/X64/EnablePaging64.asm
index 0d64c5513453128a29a6870a1d2f2129bca84b02..459120a886cce71005364a05b89af7ce8394cb55 100644 (file)
--- a/MdePkg/Library/BaseLib/X64/EnablePaging64.asm
+++ b/MdePkg/Library/BaseLib/X64/EnablePaging64.asm
@@ -36,7 +36,10 @@
 ;------------------------------------------------------------------------------\r
 InternalX86EnablePaging64 PROC\r
     cli\r
-    mov     dword ptr [rsp], @F         ; offset for far retf, seg is the 1st arg\r
+    pop     rax\r
+    call    @Base\r
+@Base:\r
+    add     dword ptr [rsp], @F - @Base ; offset for far retf, seg is the 1st arg\r
     mov     rax, cr4                    ; mov eax, cr4\r
     or      al, (1 SHL 5)\r
     mov     cr4, rax                    ; enable PAE\r

diff --git a/MdePkg/Library/BasePeCoffLib/Ipf/PeCoffLoaderEx.c b/MdePkg/Library/BasePeCoffLib/Ipf/PeCoffLoaderEx.c
index adbd3fca81939da96c3440e696ebf3eac73fe594..babf7ca3a2367574fae874d0605795304d77b097 100644 (file)
--- a/MdePkg/Library/BasePeCoffLib/Ipf/PeCoffLoaderEx.c
+++ b/MdePkg/Library/BasePeCoffLib/Ipf/PeCoffLoaderEx.c
@@ -25,45 +25,45 @@
     *(UINT32*)Address = (*(UINT32*)Address & ~(((1 << Size) - 1) << InstPos)) | \\r
           ((UINT32)((((UINT64)Value >> ValPos) & (((UINT64)1 << Size) - 1))) << InstPos)\r
 \r
-#define IMM64_IMM7B_INST_WORD_X         3  \r
-#define IMM64_IMM7B_SIZE_X              7  \r
-#define IMM64_IMM7B_INST_WORD_POS_X     4  \r
-#define IMM64_IMM7B_VAL_POS_X           0  \r
-\r
-#define IMM64_IMM9D_INST_WORD_X         3  \r
-#define IMM64_IMM9D_SIZE_X              9  \r
-#define IMM64_IMM9D_INST_WORD_POS_X     18  \r
-#define IMM64_IMM9D_VAL_POS_X           7  \r
-\r
-#define IMM64_IMM5C_INST_WORD_X         3  \r
-#define IMM64_IMM5C_SIZE_X              5  \r
-#define IMM64_IMM5C_INST_WORD_POS_X     13  \r
-#define IMM64_IMM5C_VAL_POS_X           16  \r
-\r
-#define IMM64_IC_INST_WORD_X            3  \r
-#define IMM64_IC_SIZE_X                 1  \r
-#define IMM64_IC_INST_WORD_POS_X        12  \r
-#define IMM64_IC_VAL_POS_X              21  \r
-\r
-#define IMM64_IMM41a_INST_WORD_X        1  \r
-#define IMM64_IMM41a_SIZE_X             10  \r
-#define IMM64_IMM41a_INST_WORD_POS_X    14  \r
-#define IMM64_IMM41a_VAL_POS_X          22  \r
-\r
-#define IMM64_IMM41b_INST_WORD_X        1  \r
-#define IMM64_IMM41b_SIZE_X             8  \r
-#define IMM64_IMM41b_INST_WORD_POS_X    24  \r
-#define IMM64_IMM41b_VAL_POS_X          32  \r
-\r
-#define IMM64_IMM41c_INST_WORD_X        2  \r
-#define IMM64_IMM41c_SIZE_X             23  \r
-#define IMM64_IMM41c_INST_WORD_POS_X    0  \r
-#define IMM64_IMM41c_VAL_POS_X          40  \r
-\r
-#define IMM64_SIGN_INST_WORD_X          3  \r
-#define IMM64_SIGN_SIZE_X               1  \r
-#define IMM64_SIGN_INST_WORD_POS_X      27  \r
-#define IMM64_SIGN_VAL_POS_X            63  \r
+#define IMM64_IMM7B_INST_WORD_X         3\r
+#define IMM64_IMM7B_SIZE_X              7\r
+#define IMM64_IMM7B_INST_WORD_POS_X     4\r
+#define IMM64_IMM7B_VAL_POS_X           0\r
+\r
+#define IMM64_IMM9D_INST_WORD_X         3\r
+#define IMM64_IMM9D_SIZE_X              9\r
+#define IMM64_IMM9D_INST_WORD_POS_X     18\r
+#define IMM64_IMM9D_VAL_POS_X           7\r
+\r
+#define IMM64_IMM5C_INST_WORD_X         3\r
+#define IMM64_IMM5C_SIZE_X              5\r
+#define IMM64_IMM5C_INST_WORD_POS_X     13\r
+#define IMM64_IMM5C_VAL_POS_X           16\r
+\r
+#define IMM64_IC_INST_WORD_X            3\r
+#define IMM64_IC_SIZE_X                 1\r
+#define IMM64_IC_INST_WORD_POS_X        12\r
+#define IMM64_IC_VAL_POS_X              21\r
+\r
+#define IMM64_IMM41a_INST_WORD_X        1\r
+#define IMM64_IMM41a_SIZE_X             10\r
+#define IMM64_IMM41a_INST_WORD_POS_X    14\r
+#define IMM64_IMM41a_VAL_POS_X          22\r
+\r
+#define IMM64_IMM41b_INST_WORD_X        1\r
+#define IMM64_IMM41b_SIZE_X             8\r
+#define IMM64_IMM41b_INST_WORD_POS_X    24\r
+#define IMM64_IMM41b_VAL_POS_X          32\r
+\r
+#define IMM64_IMM41c_INST_WORD_X        2\r
+#define IMM64_IMM41c_SIZE_X             23\r
+#define IMM64_IMM41c_INST_WORD_POS_X    0\r
+#define IMM64_IMM41c_VAL_POS_X          40\r
+\r
+#define IMM64_SIGN_INST_WORD_X          3\r
+#define IMM64_SIGN_SIZE_X               1\r
+#define IMM64_SIGN_INST_WORD_POS_X      27\r
+#define IMM64_SIGN_VAL_POS_X            63\r
 \r
 /**\r
   Performs an Itanium-based specific relocation fixup.\r
@@ -79,7 +79,7 @@
 RETURN_STATUS\r
 PeCoffLoaderRelocateImageEx (\r
   IN UINT16      *Reloc,\r
-  IN OUT CHAR8   *Fixup, \r
+  IN OUT CHAR8   *Fixup,\r
   IN OUT CHAR8   **FixupData,\r
   IN UINT64      Adjust\r
   )\r
@@ -97,8 +97,8 @@ PeCoffLoaderRelocateImageEx (
 \r
       Fixup = (CHAR8 *)((UINTN) Fixup & (UINTN) ~(15));\r
       FixupVal = (UINT64)0;\r
-                       \r
-      // \r
+\r
+      //\r
       // Extract the lower 32 bits of IMM64 from bundle\r
       //\r
       EXT_IMM64(FixupVal,\r
@@ -135,13 +135,13 @@ PeCoffLoaderRelocateImageEx (
                 IMM64_IMM41a_INST_WORD_POS_X,\r
                 IMM64_IMM41a_VAL_POS_X\r
                 );\r
-                       \r
-      // \r
+\r
+      //\r
       // Update 64-bit address\r
       //\r
       FixupVal += Adjust;\r
 \r
-      // \r
+      //\r
       // Insert IMM64 into bundle\r
       //\r
       INS_IMM64(FixupVal,\r
@@ -216,15 +216,15 @@ PeCoffLoaderRelocateImageEx (
 }\r
 \r
 /**\r
-  Returns TRUE if the machine type of PE/COFF image is supported. Supported \r
+  Returns TRUE if the machine type of PE/COFF image is supported. Supported\r
   does not mean the image can be executed it means the PE/COFF loader supports\r
   loading and relocating of the image type. It's up to the caller to support\r
-  the entry point. \r
+  the entry point.\r
 \r
   This function implies the basic PE/COFF loader/relocator supports IA32, EBC,\r
-  & X64 images. Calling the entry point in a correct mannor is up to the \r
+  & X64 images. Calling the entry point in a correct mannor is up to the\r
   consumer of this library. This version also supports the special relocations\r
-  for Itanium. \r
+  for Itanium.\r
 \r
   @param  Machine   Machine type from the PE Header.\r
 \r
@@ -238,7 +238,7 @@ PeCoffLoaderImageFormatSupported (
 {\r
   if ((Machine == EFI_IMAGE_MACHINE_IPF) || (Machine == EFI_IMAGE_MACHINE_IA32) ||\r
       (Machine ==  EFI_IMAGE_MACHINE_EBC) || (Machine == EFI_IMAGE_MACHINE_X64)) {\r
-    return TRUE; \r
+    return TRUE;\r
   }\r
 \r
   return FALSE;\r
@@ -247,14 +247,14 @@ PeCoffLoaderImageFormatSupported (
 \r
 /**\r
   ImageRead function that operates on a memory buffer whos base is passed into\r
-  FileHandle. \r
+  FileHandle.\r
 \r
   @param  Reloc             Ponter to baes of the input stream\r
   @param  Fixup             Offset to the start of the buffer\r
   @param  FixupData         Number of bytes to copy into the buffer\r
   @param  Adjust            Location to place results of read\r
 \r
-  @retval RETURN_SUCCESS    Data is read from FileOffset from the Handle into \r
+  @retval RETURN_SUCCESS    Data is read from FileOffset from the Handle into\r
                             the buffer.\r
 **/\r
 RETURN_STATUS\r
@@ -264,27 +264,6 @@ PeHotRelocateImageEx (
   IN OUT CHAR8   **FixupData,\r
   IN UINT64      Adjust\r
   )\r
-/*++\r
-\r
-Routine Description:\r
-\r
-  Performs an IPF specific relocation fixup\r
-\r
-Arguments:\r
-\r
-  Reloc      - Pointer to the relocation record\r
-\r
-  Fixup      - Pointer to the address to fix up\r
-\r
-  FixupData  - Pointer to a buffer to log the fixups\r
-\r
-  Adjust     - The offset to adjust the fixup\r
-\r
-Returns:\r
-\r
-  None\r
-\r
---*/\r
 {\r
   UINT64  *F64;\r
   UINT64  FixupVal;\r