REF: https://bugzilla.tianocore.org/show_bug.cgi?id=2642
This patch resolves the problem of using memory protection
attributes when OVMF firmware is compiled with XCODE5 and CLANGPDB.
Cc: Andrew Fish <afish@apple.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Marvin Häuser <mhaeuser@outlook.de>
Signed-off-by: Vitaly Cheptsov <vit9696@protonmail.com>
Message-Id: <
20200329132158.35259-2-cheptsov@ispras.ru>
Acked-by: Laszlo Ersek <lersek@redhat.com>
[lersek@redhat.com: fix whitespace issues reported by git-am]
[lersek@redhat.com: replace "CC:" tags with "Cc:" ones for PatchCheck.py]
\r
[BuildOptions.common.EDKII.DXE_RUNTIME_DRIVER]\r
GCC:*_*_*_DLINK_FLAGS = -z common-page-size=0x1000\r
- XCODE:*_*_*_DLINK_FLAGS =\r
+ XCODE:*_*_*_DLINK_FLAGS = -seg1addr 0x1000 -segalign 0x1000\r
+ XCODE:*_*_*_MTOC_FLAGS = -align 0x1000\r
CLANGPDB:*_*_*_DLINK_FLAGS = /ALIGN:4096\r
\r
# Force PE/COFF sections to be aligned at 4KB boundaries to support page level\r
# protection of DXE_SMM_DRIVER/SMM_CORE modules\r
[BuildOptions.common.EDKII.DXE_SMM_DRIVER, BuildOptions.common.EDKII.SMM_CORE]\r
GCC:*_*_*_DLINK_FLAGS = -z common-page-size=0x1000\r
- XCODE:*_*_*_DLINK_FLAGS =\r
+ XCODE:*_*_*_DLINK_FLAGS = -seg1addr 0x1000 -segalign 0x1000\r
+ XCODE:*_*_*_MTOC_FLAGS = -align 0x1000\r
CLANGPDB:*_*_*_DLINK_FLAGS = /ALIGN:4096\r
\r
################################################################################\r
\r
[BuildOptions.common.EDKII.DXE_RUNTIME_DRIVER]\r
GCC:*_*_*_DLINK_FLAGS = -z common-page-size=0x1000\r
- XCODE:*_*_*_DLINK_FLAGS =\r
+ XCODE:*_*_*_DLINK_FLAGS = -seg1addr 0x1000 -segalign 0x1000\r
+ XCODE:*_*_*_MTOC_FLAGS = -align 0x1000\r
CLANGPDB:*_*_*_DLINK_FLAGS = /ALIGN:4096\r
\r
# Force PE/COFF sections to be aligned at 4KB boundaries to support page level\r
# protection of DXE_SMM_DRIVER/SMM_CORE modules\r
[BuildOptions.common.EDKII.DXE_SMM_DRIVER, BuildOptions.common.EDKII.SMM_CORE]\r
GCC:*_*_*_DLINK_FLAGS = -z common-page-size=0x1000\r
- XCODE:*_*_*_DLINK_FLAGS =\r
+ XCODE:*_*_*_DLINK_FLAGS = -seg1addr 0x1000 -segalign 0x1000\r
+ XCODE:*_*_*_MTOC_FLAGS = -align 0x1000\r
CLANGPDB:*_*_*_DLINK_FLAGS = /ALIGN:4096\r
\r
################################################################################\r
\r
[BuildOptions.common.EDKII.DXE_RUNTIME_DRIVER]\r
GCC:*_*_*_DLINK_FLAGS = -z common-page-size=0x1000\r
- XCODE:*_*_*_DLINK_FLAGS =\r
+ XCODE:*_*_*_DLINK_FLAGS = -seg1addr 0x1000 -segalign 0x1000\r
+ XCODE:*_*_*_MTOC_FLAGS = -align 0x1000\r
CLANGPDB:*_*_*_DLINK_FLAGS = /ALIGN:4096\r
\r
# Force PE/COFF sections to be aligned at 4KB boundaries to support page level\r
# protection of DXE_SMM_DRIVER/SMM_CORE modules\r
[BuildOptions.common.EDKII.DXE_SMM_DRIVER, BuildOptions.common.EDKII.SMM_CORE]\r
GCC:*_*_*_DLINK_FLAGS = -z common-page-size=0x1000\r
- XCODE:*_*_*_DLINK_FLAGS =\r
+ XCODE:*_*_*_DLINK_FLAGS = -seg1addr 0x1000 -segalign 0x1000\r
+ XCODE:*_*_*_MTOC_FLAGS = -align 0x1000\r
CLANGPDB:*_*_*_DLINK_FLAGS = /ALIGN:4096\r
\r
################################################################################\r
\r
[BuildOptions.common.EDKII.DXE_RUNTIME_DRIVER]\r
GCC:*_*_*_DLINK_FLAGS = -z common-page-size=0x1000\r
- XCODE:*_*_*_DLINK_FLAGS =\r
+ XCODE:*_*_*_DLINK_FLAGS = -seg1addr 0x1000 -segalign 0x1000\r
+ XCODE:*_*_*_MTOC_FLAGS = -align 0x1000\r
+ CLANGPDB:*_*_*_DLINK_FLAGS = /ALIGN:4096\r
\r
# Force PE/COFF sections to be aligned at 4KB boundaries to support page level\r
# protection of DXE_SMM_DRIVER/SMM_CORE modules\r
[BuildOptions.common.EDKII.DXE_SMM_DRIVER, BuildOptions.common.EDKII.SMM_CORE]\r
GCC:*_*_*_DLINK_FLAGS = -z common-page-size=0x1000\r
- XCODE:*_*_*_DLINK_FLAGS =\r
+ XCODE:*_*_*_DLINK_FLAGS = -seg1addr 0x1000 -segalign 0x1000\r
+ XCODE:*_*_*_MTOC_FLAGS = -align 0x1000\r
+ CLANGPDB:*_*_*_DLINK_FLAGS = /ALIGN:4096\r
\r
################################################################################\r
#\r