+/** @file\r
+ Support for the latest PCI standard.\r
+\r
+ Copyright (c) 2006 - 2009, Intel Corporation\r
+ All rights reserved. This program and the accompanying materials \r
+ are licensed and made available under the terms and conditions of the BSD License \r
+ which accompanies this distribution. The full text of the license may be found at \r
+ http://opensource.org/licenses/bsd-license.php \r
+\r
+ THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
+ WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
+\r
+**/\r
+\r
+#ifndef _PCIEXPRESS21_H_\r
+#define _PCIEXPRESS21_H_\r
+\r
+#define EFI_PCIE_CAPABILITY_BASE_OFFSET 0x100\r
+#define EFI_PCIE_CAPABILITY_ID_SRIOV_CONTROL_ARI_HIERARCHY 0x10\r
+#define EFI_PCIE_CAPABILITY_DEVICE_CAPABILITIES_2_OFFSET 0x24\r
+#define EFI_PCIE_CAPABILITY_DEVICE_CAPABILITIES_2_ARI_FORWARDING 0x20\r
+#define EFI_PCIE_CAPABILITY_DEVICE_CONTROL_2_OFFSET 0x28\r
+#define EFI_PCIE_CAPABILITY_DEVICE_CONTROL_2_ARI_FORWARDING 0x20\r
+\r
+//\r
+// for SR-IOV\r
+//\r
+#define EFI_PCIE_CAPABILITY_ID_ARI 0x0E\r
+#define EFI_PCIE_CAPABILITY_ID_ATS 0x0F\r
+#define EFI_PCIE_CAPABILITY_ID_SRIOV 0x10\r
+#define EFI_PCIE_CAPABILITY_ID_MRIOV 0x11\r
+\r
+typedef struct {\r
+ UINT32 CapabilityHeader;\r
+ UINT32 Capability;\r
+ UINT16 Control;\r
+ UINT16 Status;\r
+ UINT16 InitialVFs;\r
+ UINT16 TotalVFs;\r
+ UINT16 NumVFs;\r
+ UINT8 FunctionDependencyLink;\r
+ UINT8 Reserved0;\r
+ UINT16 FirstVFOffset;\r
+ UINT16 VFStride;\r
+ UINT16 Reserved1;\r
+ UINT16 VFDeviceID;\r
+ UINT32 SupportedPageSize;\r
+ UINT32 SystemPageSize;\r
+ UINT32 VFBar[6];\r
+ UINT32 VFMigrationStateArrayOffset;\r
+} SR_IOV_CAPABILITY_REGISTER;\r
+\r
+#define EFI_PCIE_CAPABILITY_ID_SRIOV_CAPABILITIES 0x04\r
+#define EFI_PCIE_CAPABILITY_ID_SRIOV_CONTROL 0x08\r
+#define EFI_PCIE_CAPABILITY_ID_SRIOV_STATUS 0x0A\r
+#define EFI_PCIE_CAPABILITY_ID_SRIOV_INITIALVFS 0x0C\r
+#define EFI_PCIE_CAPABILITY_ID_SRIOV_TOTALVFS 0x0E\r
+#define EFI_PCIE_CAPABILITY_ID_SRIOV_NUMVFS 0x10\r
+#define EFI_PCIE_CAPABILITY_ID_SRIOV_FUNCTION_DEPENDENCY_LINK 0x12\r
+#define EFI_PCIE_CAPABILITY_ID_SRIOV_FIRSTVF 0x14\r
+#define EFI_PCIE_CAPABILITY_ID_SRIOV_VFSTRIDE 0x16\r
+#define EFI_PCIE_CAPABILITY_ID_SRIOV_VFDEVICEID 0x1A\r
+#define EFI_PCIE_CAPABILITY_ID_SRIOV_SUPPORTED_PAGE_SIZE 0x1C\r
+#define EFI_PCIE_CAPABILITY_ID_SRIOV_SYSTEM_PAGE_SIZE 0x20\r
+#define EFI_PCIE_CAPABILITY_ID_SRIOV_BAR0 0x24\r
+#define EFI_PCIE_CAPABILITY_ID_SRIOV_BAR1 0x28\r
+#define EFI_PCIE_CAPABILITY_ID_SRIOV_BAR2 0x2C\r
+#define EFI_PCIE_CAPABILITY_ID_SRIOV_BAR3 0x30\r
+#define EFI_PCIE_CAPABILITY_ID_SRIOV_BAR4 0x34\r
+#define EFI_PCIE_CAPABILITY_ID_SRIOV_BAR5 0x38\r
+#define EFI_PCIE_CAPABILITY_ID_SRIOV_VF_MIGRATION_STATE 0x3C\r
+\r
+#endif\r