/** @file\r
FADT table parser\r
\r
- Copyright (c) 2016 - 2019, ARM Limited. All rights reserved.\r
+ Copyright (c) 2016 - 2020, ARM Limited. All rights reserved.\r
SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
@par Reference(s):\r
);\r
\r
if (Trace) {\r
- Print (L"\nSummary:\n");\r
- PrintFieldName (2, L"FADT Version");\r
- Print (L"%d.%d\n", *AcpiHdrInfo.Revision, *FadtMinorRevision);\r
+ if (FadtMinorRevision != NULL) {\r
+ Print (L"\nSummary:\n");\r
+ PrintFieldName (2, L"FADT Version");\r
+ Print (L"%d.%d\n", *AcpiHdrInfo.Revision, *FadtMinorRevision);\r
+ }\r
\r
if (*GetAcpiXsdtHeaderInfo ()->OemTableId != *AcpiHdrInfo.OemTableId) {\r
IncrementErrorCount ();\r
);\r
}\r
\r
- // If X_DSDT is not zero then use X_DSDT and ignore DSDT,\r
- // else use DSDT.\r
- if (*X_DsdtAddress != 0) {\r
+ // If X_DSDT is valid then use X_DSDT and ignore DSDT, else use DSDT.\r
+ if ((X_DsdtAddress != NULL) && (*X_DsdtAddress != 0)) {\r
DsdtPtr = (UINT8*)(UINTN)(*X_DsdtAddress);\r
- } else if (*DsdtAddress != 0) {\r
+ } else if ((DsdtAddress != NULL) && (*DsdtAddress != 0)) {\r
DsdtPtr = (UINT8*)(UINTN)(*DsdtAddress);\r
} else {\r
- // Both DSDT and X_DSDT cannot be zero.\r
+ // Both DSDT and X_DSDT cannot be invalid.\r
#if defined (MDE_CPU_ARM) || defined (MDE_CPU_AARCH64)\r
if (Trace) {\r
// The DSDT Table is mandatory for ARM systems\r
// as the CPU information MUST be presented in\r
// the DSDT.\r
IncrementErrorCount ();\r
- Print (L"ERROR: Both X_DSDT and DSDT are NULL.\n");\r
+ Print (L"ERROR: Both X_DSDT and DSDT are invalid.\n");\r
}\r
#endif\r
return;\r