UefiCpuPkg PiSmmCpuDxeSmm: Update Ia32/MpFuncs.nasm

Use 16bit assembly code to replace hard code db.

In V2:
Add 0x67 prefix to far jump

When we enter protected mode, with the far jump still in big real mode,
the JMP instruction not only needs the 0x66 prefix (for 32-bit operand
size), but also the 0x67 prefix (for 32-bit address size). Use the a32
nasm modifier to enforce this.

This bug breaks S3 resume in the Ia32 + SMM_REQUIRE build of OVMF.

Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Liming Gao <liming.gao@intel.com>
Signed-off-by: Laszlo Ersek <lersek@redhat.com>

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/MpFuncs.nasm b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/MpFuncs.nasm
index fceaaf2689062b283280f4ebcc7ee30ad667d2e2..f7cdcce9a7b365b60a7d6528049d922f47ed7b41 100644 (file)
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/MpFuncs.nasm
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/MpFuncs.nasm
@@ -42,49 +42,44 @@ extern ASM_PFX(InitializeFloatingPointUnits)
 ;-------------------------------------------------------------------------------------\r
 ;RendezvousFunnelProc (&WakeUpBuffer,MemAddress);\r
 \r
+BITS 16\r
 global ASM_PFX(RendezvousFunnelProc)\r
 ASM_PFX(RendezvousFunnelProc):\r
 RendezvousFunnelProcStart:\r
 \r
 ; At this point CS = 0x(vv00) and ip= 0x0.\r
 \r
-        db 0x8c,  0xc8                 ; mov        ax,  cs\r
-        db 0x8e,  0xd8                 ; mov        ds,  ax\r
-        db 0x8e,  0xc0                 ; mov        es,  ax\r
-        db 0x8e,  0xd0                 ; mov        ss,  ax\r
-        db 0x33,  0xc0                 ; xor        ax,  ax\r
-        db 0x8e,  0xe0                 ; mov        fs,  ax\r
-        db 0x8e,  0xe8                 ; mov        gs,  ax\r
+        mov        ax,  cs\r
+        mov        ds,  ax\r
+        mov        es,  ax\r
+        mov        ss,  ax\r
+        xor        ax,  ax\r
+        mov        fs,  ax\r
+        mov        gs,  ax\r
 \r
 flat32Start:\r
 \r
-        db 0xBE\r
-        dw BufferStart                ; mov        si, BufferStart\r
-        db 0x66,  0x8B, 0x14             ; mov        edx,dword ptr [si]          ; EDX is keeping the start address of wakeup buffer\r
+        mov        si, BufferStart\r
+        mov        edx,dword [si]          ; EDX is keeping the start address of wakeup buffer\r
 \r
-        db 0xBE\r
-        dw GdtrProfile                ; mov        si, GdtrProfile\r
-        db 0x66                        ; db         66h\r
-        db 0x2E,  0xF, 0x1, 0x14        ; lgdt       fword ptr cs:[si]\r
+        mov        si, GdtrProfile\r
+o32     lgdt       [cs:si]\r
 \r
-        db 0xBE\r
-        dw IdtrProfile                ; mov        si, IdtrProfile\r
-        db 0x66                        ; db         66h\r
-        db 0x2E,  0xF, 0x1, 0x1C        ; lidt       fword ptr cs:[si]\r
+        mov        si, IdtrProfile\r
+o32     lidt       [cs:si]\r
 \r
-        db 0x33,  0xC0                 ; xor        ax,  ax\r
-        db 0x8E,  0xD8                 ; mov        ds,  ax\r
+        xor        ax,  ax\r
+        mov        ds,  ax\r
 \r
-        db 0xF,  0x20, 0xC0            ; mov        eax, cr0                    ; Get control register 0\r
-        db 0x66,  0x83, 0xC8, 0x1       ; or         eax, 000000001h             ; Set PE bit (bit #0)\r
-        db 0xF,  0x22, 0xC0            ; mov        cr0, eax\r
+        mov        eax, cr0                    ; Get control register 0\r
+        or         eax, 0x000000001            ; Set PE bit (bit #0)\r
+        mov        cr0, eax\r
 \r
 FLAT32_JUMP:\r
 \r
-        db 0x66,  0x67, 0xEA            ; far jump\r
-        dd 0x0                         ; 32-bit offset\r
-        dw 0x20                        ; 16-bit selector\r
+a32     jmp   dword 0x20:0x0\r
 \r
+BITS 32\r
 PMODE_ENTRY:                         ; protected mode entry point\r
 \r
         mov         ax,  0x8\r