UefiCpuPkg/S3Resume2Pei: disable paging before creating new page table.

V5:
1. Add ASSERT to indicate this assumption that environment is 32 bit mode.
2. Add description in INF about this driver's expected result
   in different environment.

V4:
Only disable paging when it is enabled.

V3 changes:
No need to change inf file.

V2 changes:
Only disable paging in 32 bit mode, no matter it is enable or not.

V1 changes:
PEI Stack Guard needs to enable paging. This might cause #GP if code
trying to write CR3 register with PML4 page table while the processor
is enabled with PAE paging.

Simply disabling paging before updating CR3 can solve this conflict.

It's an regression caused by change: 0a0d5296e448fc350de1594c49b9c0deff7fad60

BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=1232

Cc: Ruiyu Ni <ruiyu.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Jian J Wang <jian.j.wang@intel.com>
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Eric Dong <eric.dong@intel.com>
Reviewed-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Ruiyu Ni <ruiyu.ni@intel.com>
Regression-tested-by: Laszlo Ersek <lersek@redhat.com>

diff --git a/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume.c b/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume.c
index f164c1713b8976e48e03ded1610cc508ab3ed149..05234a63120a158e9b5efa0f0feff7f06db63ffe 100644 (file)
--- a/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume.c
+++ b/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume.c
@@ -964,6 +964,7 @@ S3RestoreConfig2 (
   VOID                                          *GuidHob;\r
   BOOLEAN                                       Build4GPageTableOnly;\r
   BOOLEAN                                       InterruptStatus;\r
+  IA32_CR0                                      Cr0;\r
 \r
   TempAcpiS3Context = 0;\r
   TempEfiBootScriptExecutorVariable = 0;\r
@@ -1045,6 +1046,13 @@ S3RestoreConfig2 (
   //\r
   GuidHob = GetFirstGuidHob (&gEfiAcpiVariableGuid);\r
   if (GuidHob != NULL) {\r
+    //\r
+    // Below SwitchStack/AsmEnablePaging64 function has\r
+    // assumption that it's in 32 bits mode now.\r
+    // Add ASSERT code to indicate this assumption.\r
+    //\r
+    ASSERT(sizeof (UINTN) == sizeof (UINT32));\r
+\r
     Status = PeiServicesLocatePpi (\r
                               &gPeiSmmAccessPpiGuid,\r
                               0,\r
@@ -1105,6 +1113,15 @@ S3RestoreConfig2 (
       //\r
       SetInterruptState (InterruptStatus);\r
 \r
+      Cr0.UintN = AsmReadCr0 ();\r
+      if (Cr0.Bits.PG != 0) {\r
+        //\r
+        // We're in 32-bit mode, with paging enabled. We can't set CR3 to\r
+        // the 64-bit page tables without first disabling paging.\r
+        //\r
+        Cr0.Bits.PG = 0;\r
+        AsmWriteCr0 (Cr0.UintN);\r
+      }\r
       AsmWriteCr3 ((UINTN)SmmS3ResumeState->SmmS3Cr3);\r
 \r
       //\r

diff --git a/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf b/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf
index 6ce1bf944c8f2e9956951e4de029482ff498f105..4395daec5d027c46b34b20e24a6e88da88b26429 100644 (file)
--- a/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf
+++ b/UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf
@@ -33,6 +33,16 @@
 #  VALID_ARCHITECTURES           = IA32 X64\r
 #\r
 \r
+#\r
+# This module is not always workable in IA32 and X64 mode. It has below result:\r
+# when it works with SMM mode:\r
+# ===============================\r
+#           SMM:used  SMM:unused\r
+# PEI:IA32   works      works\r
+# PEI:X64    fails      works\r
+# ===============================\r
+#\r
+\r
 [Sources]\r
   S3Resume.c\r
 \r